From patchwork Wed Oct 20 11:27:54 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Akhil Goyal X-Patchwork-Id: 102428 X-Patchwork-Delegate: gakhil@marvell.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id BB57DA0C43; Wed, 20 Oct 2021 13:29:12 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id DB339411F2; Wed, 20 Oct 2021 13:29:09 +0200 (CEST) Received: from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com [67.231.156.173]) by mails.dpdk.org (Postfix) with ESMTP id 8929340142 for ; Wed, 20 Oct 2021 13:29:08 +0200 (CEST) Received: from pps.filterd (m0045851.ppops.net [127.0.0.1]) by mx0b-0016f401.pphosted.com (8.16.1.2/8.16.1.2) with SMTP id 19K84Xms021040; Wed, 20 Oct 2021 04:29:04 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=pfpt0220; bh=mia7aV3q5K09J5OiFcfpKo85e0K9H0Pe6FFafNb0j+k=; b=b2JUVMVFA2BEkd9ECFVDIQev0wjHXjWbsBYNesTDTDrDKZCUjIcm28OYqT9dvQ784JJE WDO7N8Zak1Z07wR4j5OMDeuFOUoiB7a0XwXoqbbB1XgsALd+nJfccJRFC54ag85pnr8c +OTRClR4ASlYoZAx4+XM+mu798JhED69TTCTMx5B94HCiOFESuRue0tuOP9mkrsWg1Jr P11Jz6ZkiwGY5VoPFadYC6wpGPaO+FbU/g/pErQwoLVv+vLOBeIv5EwoFlwUUiPY3VWv BFzB8WArYfKPQIZwNwHSS51iGUu9RkIoAGOPgMbJDK7H2jVOSvBnhiuA9/M3m3Ome6FW zg== Received: from dc5-exch01.marvell.com ([199.233.59.181]) by mx0b-0016f401.pphosted.com with ESMTP id 3bt05g4q0h-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT); Wed, 20 Oct 2021 04:29:04 -0700 Received: from DC5-EXCH02.marvell.com (10.69.176.39) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server (TLS) id 15.0.1497.18; Wed, 20 Oct 2021 04:29:02 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.18 via Frontend Transport; Wed, 20 Oct 2021 04:29:02 -0700 Received: from localhost.localdomain (unknown [10.28.36.185]) by maili.marvell.com (Postfix) with ESMTP id D82D23F7080; Wed, 20 Oct 2021 04:28:54 -0700 (PDT) From: Akhil Goyal To: CC: , , , , , , , , , , , , , , , , , , , Akhil Goyal , Rebecca Troy Date: Wed, 20 Oct 2021 16:57:54 +0530 Message-ID: <20211020112754.1270163-9-gakhil@marvell.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211020112754.1270163-1-gakhil@marvell.com> References: <20211018144201.2028022-1-gakhil@marvell.com> <20211020112754.1270163-1-gakhil@marvell.com> MIME-Version: 1.0 X-Proofpoint-GUID: bZ-8BfsH5eNQP6h3e0j9yYarmryO_XMk X-Proofpoint-ORIG-GUID: bZ-8BfsH5eNQP6h3e0j9yYarmryO_XMk X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.182.1,Aquarius:18.0.790,Hydra:6.0.425,FMLib:17.0.607.475 definitions=2021-10-20_04,2021-10-20_02,2020-04-07_01 Subject: [dpdk-dev] [PATCH v4 8/8] cryptodev: move device specific structures X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" The device specific structures - rte_cryptodev and rte_cryptodev_data are moved to cryptodev_pmd.h to hide it from the applications. Signed-off-by: Akhil Goyal Tested-by: Rebecca Troy Acked-by: Fan Zhang Acked-by: Konstantin Ananyev --- doc/guides/rel_notes/release_21_11.rst | 6 ++ drivers/crypto/ccp/ccp_dev.h | 2 +- drivers/crypto/cnxk/cn10k_ipsec.c | 2 +- drivers/crypto/cnxk/cn9k_ipsec.c | 2 +- .../crypto/cnxk/cnxk_cryptodev_capabilities.c | 2 +- drivers/crypto/cnxk/cnxk_cryptodev_sec.c | 2 +- drivers/crypto/nitrox/nitrox_sym_reqmgr.c | 2 +- drivers/crypto/octeontx/otx_cryptodev.c | 1 - .../crypto/octeontx/otx_cryptodev_hw_access.c | 2 +- .../crypto/octeontx/otx_cryptodev_hw_access.h | 2 +- drivers/crypto/octeontx/otx_cryptodev_ops.h | 2 +- .../crypto/octeontx2/otx2_cryptodev_mbox.c | 2 +- drivers/crypto/scheduler/scheduler_failover.c | 2 +- .../crypto/scheduler/scheduler_multicore.c | 2 +- .../scheduler/scheduler_pkt_size_distr.c | 2 +- .../crypto/scheduler/scheduler_roundrobin.c | 2 +- drivers/event/cnxk/cnxk_eventdev.h | 2 +- drivers/event/dpaa/dpaa_eventdev.c | 2 +- drivers/event/dpaa2/dpaa2_eventdev.c | 2 +- drivers/event/octeontx/ssovf_evdev.c | 2 +- .../event/octeontx2/otx2_evdev_crypto_adptr.c | 2 +- lib/cryptodev/cryptodev_pmd.h | 65 ++++++++++++++++++ lib/cryptodev/rte_cryptodev_core.h | 67 ------------------- lib/cryptodev/version.map | 2 +- 24 files changed, 91 insertions(+), 88 deletions(-) diff --git a/doc/guides/rel_notes/release_21_11.rst b/doc/guides/rel_notes/release_21_11.rst index faa9164546..23bc854d16 100644 --- a/doc/guides/rel_notes/release_21_11.rst +++ b/doc/guides/rel_notes/release_21_11.rst @@ -328,6 +328,12 @@ ABI Changes Also, make sure to start the actual text at the margin. ======================================================= +* cryptodev: Made ``rte_cryptodev``, ``rte_cryptodev_data`` private + structures internal to DPDK. ``rte_cryptodevs`` can't be accessed directly + by user any more. While it is an ABI breakage, this change is intended + to be transparent for both users (no changes in user app is required) and + PMD developers (no changes in PMD is required). + * security: ``rte_security_set_pkt_metadata`` and ``rte_security_get_userdata`` routines used by inline outbound and inline inbound security processing were made inline and enhanced to do simple 64-bit set/get for PMDs that do not diff --git a/drivers/crypto/ccp/ccp_dev.h b/drivers/crypto/ccp/ccp_dev.h index ca5145c278..85c8fc47a2 100644 --- a/drivers/crypto/ccp/ccp_dev.h +++ b/drivers/crypto/ccp/ccp_dev.h @@ -17,7 +17,7 @@ #include #include #include -#include +#include /**< CCP sspecific */ #define MAX_HW_QUEUES 5 diff --git a/drivers/crypto/cnxk/cn10k_ipsec.c b/drivers/crypto/cnxk/cn10k_ipsec.c index defc792aa8..27df1dcd64 100644 --- a/drivers/crypto/cnxk/cn10k_ipsec.c +++ b/drivers/crypto/cnxk/cn10k_ipsec.c @@ -3,7 +3,7 @@ */ #include -#include +#include #include #include #include diff --git a/drivers/crypto/cnxk/cn9k_ipsec.c b/drivers/crypto/cnxk/cn9k_ipsec.c index 9ca4d20c62..53fb793654 100644 --- a/drivers/crypto/cnxk/cn9k_ipsec.c +++ b/drivers/crypto/cnxk/cn9k_ipsec.c @@ -2,7 +2,7 @@ * Copyright(C) 2021 Marvell. */ -#include +#include #include #include #include diff --git a/drivers/crypto/cnxk/cnxk_cryptodev_capabilities.c b/drivers/crypto/cnxk/cnxk_cryptodev_capabilities.c index a227e6981c..a53b489a04 100644 --- a/drivers/crypto/cnxk/cnxk_cryptodev_capabilities.c +++ b/drivers/crypto/cnxk/cnxk_cryptodev_capabilities.c @@ -2,7 +2,7 @@ * Copyright(C) 2021 Marvell. */ -#include +#include #include #include "roc_api.h" diff --git a/drivers/crypto/cnxk/cnxk_cryptodev_sec.c b/drivers/crypto/cnxk/cnxk_cryptodev_sec.c index 8d04d4b575..2021d5c77e 100644 --- a/drivers/crypto/cnxk/cnxk_cryptodev_sec.c +++ b/drivers/crypto/cnxk/cnxk_cryptodev_sec.c @@ -2,7 +2,7 @@ * Copyright(C) 2021 Marvell. */ -#include +#include #include #include #include diff --git a/drivers/crypto/nitrox/nitrox_sym_reqmgr.c b/drivers/crypto/nitrox/nitrox_sym_reqmgr.c index fe3ca25a0c..9edb0cc00f 100644 --- a/drivers/crypto/nitrox/nitrox_sym_reqmgr.c +++ b/drivers/crypto/nitrox/nitrox_sym_reqmgr.c @@ -3,7 +3,7 @@ */ #include -#include +#include #include #include diff --git a/drivers/crypto/octeontx/otx_cryptodev.c b/drivers/crypto/octeontx/otx_cryptodev.c index 05b78329d6..337d06aab8 100644 --- a/drivers/crypto/octeontx/otx_cryptodev.c +++ b/drivers/crypto/octeontx/otx_cryptodev.c @@ -4,7 +4,6 @@ #include #include -#include #include #include #include diff --git a/drivers/crypto/octeontx/otx_cryptodev_hw_access.c b/drivers/crypto/octeontx/otx_cryptodev_hw_access.c index 7b89a62d81..20b288334a 100644 --- a/drivers/crypto/octeontx/otx_cryptodev_hw_access.c +++ b/drivers/crypto/octeontx/otx_cryptodev_hw_access.c @@ -7,7 +7,7 @@ #include #include -#include +#include #include #include #include diff --git a/drivers/crypto/octeontx/otx_cryptodev_hw_access.h b/drivers/crypto/octeontx/otx_cryptodev_hw_access.h index 7c6b1e45b4..e48805fb09 100644 --- a/drivers/crypto/octeontx/otx_cryptodev_hw_access.h +++ b/drivers/crypto/octeontx/otx_cryptodev_hw_access.h @@ -7,7 +7,7 @@ #include #include -#include +#include #include #include #include diff --git a/drivers/crypto/octeontx/otx_cryptodev_ops.h b/drivers/crypto/octeontx/otx_cryptodev_ops.h index f234f16970..83b82ea059 100644 --- a/drivers/crypto/octeontx/otx_cryptodev_ops.h +++ b/drivers/crypto/octeontx/otx_cryptodev_ops.h @@ -5,7 +5,7 @@ #ifndef _OTX_CRYPTODEV_OPS_H_ #define _OTX_CRYPTODEV_OPS_H_ -#include +#include #define OTX_CPT_MIN_HEADROOM_REQ (24) #define OTX_CPT_MIN_TAILROOM_REQ (8) diff --git a/drivers/crypto/octeontx2/otx2_cryptodev_mbox.c b/drivers/crypto/octeontx2/otx2_cryptodev_mbox.c index 1a8edae7eb..f9e7b0b474 100644 --- a/drivers/crypto/octeontx2/otx2_cryptodev_mbox.c +++ b/drivers/crypto/octeontx2/otx2_cryptodev_mbox.c @@ -1,7 +1,7 @@ /* SPDX-License-Identifier: BSD-3-Clause * Copyright (C) 2019 Marvell International Ltd. */ -#include +#include #include #include "otx2_cryptodev.h" diff --git a/drivers/crypto/scheduler/scheduler_failover.c b/drivers/crypto/scheduler/scheduler_failover.c index 844312dd1b..5023577ef8 100644 --- a/drivers/crypto/scheduler/scheduler_failover.c +++ b/drivers/crypto/scheduler/scheduler_failover.c @@ -2,7 +2,7 @@ * Copyright(c) 2017 Intel Corporation */ -#include +#include #include #include "rte_cryptodev_scheduler_operations.h" diff --git a/drivers/crypto/scheduler/scheduler_multicore.c b/drivers/crypto/scheduler/scheduler_multicore.c index 1e2e8dbf9f..900ab4049d 100644 --- a/drivers/crypto/scheduler/scheduler_multicore.c +++ b/drivers/crypto/scheduler/scheduler_multicore.c @@ -3,7 +3,7 @@ */ #include -#include +#include #include #include "rte_cryptodev_scheduler_operations.h" diff --git a/drivers/crypto/scheduler/scheduler_pkt_size_distr.c b/drivers/crypto/scheduler/scheduler_pkt_size_distr.c index 57e330a744..933a5c6978 100644 --- a/drivers/crypto/scheduler/scheduler_pkt_size_distr.c +++ b/drivers/crypto/scheduler/scheduler_pkt_size_distr.c @@ -2,7 +2,7 @@ * Copyright(c) 2017 Intel Corporation */ -#include +#include #include #include "rte_cryptodev_scheduler_operations.h" diff --git a/drivers/crypto/scheduler/scheduler_roundrobin.c b/drivers/crypto/scheduler/scheduler_roundrobin.c index bc4a632106..ace2dec2ec 100644 --- a/drivers/crypto/scheduler/scheduler_roundrobin.c +++ b/drivers/crypto/scheduler/scheduler_roundrobin.c @@ -2,7 +2,7 @@ * Copyright(c) 2017 Intel Corporation */ -#include +#include #include #include "rte_cryptodev_scheduler_operations.h" diff --git a/drivers/event/cnxk/cnxk_eventdev.h b/drivers/event/cnxk/cnxk_eventdev.h index 8a5c737e4b..b57004c0dc 100644 --- a/drivers/event/cnxk/cnxk_eventdev.h +++ b/drivers/event/cnxk/cnxk_eventdev.h @@ -7,7 +7,7 @@ #include -#include +#include #include #include #include diff --git a/drivers/event/dpaa/dpaa_eventdev.c b/drivers/event/dpaa/dpaa_eventdev.c index ec74160325..1d7ddfe1d1 100644 --- a/drivers/event/dpaa/dpaa_eventdev.c +++ b/drivers/event/dpaa/dpaa_eventdev.c @@ -28,7 +28,7 @@ #include #include #include -#include +#include #include #include #include diff --git a/drivers/event/dpaa2/dpaa2_eventdev.c b/drivers/event/dpaa2/dpaa2_eventdev.c index 5ccf22f77f..e03afb2958 100644 --- a/drivers/event/dpaa2/dpaa2_eventdev.c +++ b/drivers/event/dpaa2/dpaa2_eventdev.c @@ -25,7 +25,7 @@ #include #include #include -#include +#include #include #include diff --git a/drivers/event/octeontx/ssovf_evdev.c b/drivers/event/octeontx/ssovf_evdev.c index b93f6ec8c6..9846fce34b 100644 --- a/drivers/event/octeontx/ssovf_evdev.c +++ b/drivers/event/octeontx/ssovf_evdev.c @@ -5,7 +5,7 @@ #include #include -#include +#include #include #include #include diff --git a/drivers/event/octeontx2/otx2_evdev_crypto_adptr.c b/drivers/event/octeontx2/otx2_evdev_crypto_adptr.c index d9a002625c..d59d6c53f6 100644 --- a/drivers/event/octeontx2/otx2_evdev_crypto_adptr.c +++ b/drivers/event/octeontx2/otx2_evdev_crypto_adptr.c @@ -2,7 +2,7 @@ * Copyright (C) 2020-2021 Marvell. */ -#include +#include #include #include "otx2_cryptodev.h" diff --git a/lib/cryptodev/cryptodev_pmd.h b/lib/cryptodev/cryptodev_pmd.h index 9bb1e47ae4..89bf2af399 100644 --- a/lib/cryptodev/cryptodev_pmd.h +++ b/lib/cryptodev/cryptodev_pmd.h @@ -52,6 +52,71 @@ struct rte_cryptodev_pmd_init_params { unsigned int max_nb_queue_pairs; }; +/** + * @internal + * The data part, with no function pointers, associated with each device. + * + * This structure is safe to place in shared memory to be common among + * different processes in a multi-process configuration. + */ +struct rte_cryptodev_data { + /** Device ID for this instance */ + uint8_t dev_id; + /** Socket ID where memory is allocated */ + uint8_t socket_id; + /** Unique identifier name */ + char name[RTE_CRYPTODEV_NAME_MAX_LEN]; + + __extension__ + /** Device state: STARTED(1)/STOPPED(0) */ + uint8_t dev_started : 1; + + /** Session memory pool */ + struct rte_mempool *session_pool; + /** Array of pointers to queue pairs. */ + void **queue_pairs; + /** Number of device queue pairs. */ + uint16_t nb_queue_pairs; + + /** PMD-specific private data */ + void *dev_private; +} __rte_cache_aligned; + +/** @internal The data structure associated with each crypto device. */ +struct rte_cryptodev { + /** Pointer to PMD dequeue function. */ + dequeue_pkt_burst_t dequeue_burst; + /** Pointer to PMD enqueue function. */ + enqueue_pkt_burst_t enqueue_burst; + + /** Pointer to device data */ + struct rte_cryptodev_data *data; + /** Functions exported by PMD */ + struct rte_cryptodev_ops *dev_ops; + /** Feature flags exposes HW/SW features for the given device */ + uint64_t feature_flags; + /** Backing device */ + struct rte_device *device; + + /** Crypto driver identifier*/ + uint8_t driver_id; + + /** User application callback for interrupts if present */ + struct rte_cryptodev_cb_list link_intr_cbs; + + /** Context for security ops */ + void *security_ctx; + + __extension__ + /** Flag indicating the device is attached */ + uint8_t attached : 1; + + /** User application callback for pre enqueue processing */ + struct rte_cryptodev_cb_rcu *enq_cbs; + /** User application callback for post dequeue processing */ + struct rte_cryptodev_cb_rcu *deq_cbs; +} __rte_cache_aligned; + /** Global structure used for maintaining state of allocated crypto devices */ struct rte_cryptodev_global { struct rte_cryptodev *devs; /**< Device information array */ diff --git a/lib/cryptodev/rte_cryptodev_core.h b/lib/cryptodev/rte_cryptodev_core.h index 2bb9a228c1..16832f645d 100644 --- a/lib/cryptodev/rte_cryptodev_core.h +++ b/lib/cryptodev/rte_cryptodev_core.h @@ -54,73 +54,6 @@ struct rte_crypto_fp_ops { extern struct rte_crypto_fp_ops rte_crypto_fp_ops[RTE_CRYPTO_MAX_DEVS]; -/** - * @internal - * The data part, with no function pointers, associated with each device. - * - * This structure is safe to place in shared memory to be common among - * different processes in a multi-process configuration. - */ -struct rte_cryptodev_data { - uint8_t dev_id; - /**< Device ID for this instance */ - uint8_t socket_id; - /**< Socket ID where memory is allocated */ - char name[RTE_CRYPTODEV_NAME_MAX_LEN]; - /**< Unique identifier name */ - - __extension__ - uint8_t dev_started : 1; - /**< Device state: STARTED(1)/STOPPED(0) */ - - struct rte_mempool *session_pool; - /**< Session memory pool */ - void **queue_pairs; - /**< Array of pointers to queue pairs. */ - uint16_t nb_queue_pairs; - /**< Number of device queue pairs. */ - - void *dev_private; - /**< PMD-specific private data */ -} __rte_cache_aligned; - - -/** @internal The data structure associated with each crypto device. */ -struct rte_cryptodev { - dequeue_pkt_burst_t dequeue_burst; - /**< Pointer to PMD receive function. */ - enqueue_pkt_burst_t enqueue_burst; - /**< Pointer to PMD transmit function. */ - - struct rte_cryptodev_data *data; - /**< Pointer to device data */ - struct rte_cryptodev_ops *dev_ops; - /**< Functions exported by PMD */ - uint64_t feature_flags; - /**< Feature flags exposes HW/SW features for the given device */ - struct rte_device *device; - /**< Backing device */ - - uint8_t driver_id; - /**< Crypto driver identifier*/ - - struct rte_cryptodev_cb_list link_intr_cbs; - /**< User application callback for interrupts if present */ - - void *security_ctx; - /**< Context for security ops */ - - __extension__ - uint8_t attached : 1; - /**< Flag indicating the device is attached */ - - struct rte_cryptodev_cb_rcu *enq_cbs; - /**< User application callback for pre enqueue processing */ - - struct rte_cryptodev_cb_rcu *deq_cbs; - /**< User application callback for post dequeue processing */ -} __rte_cache_aligned; - /** * The pool of rte_cryptodev structures. */ diff --git a/lib/cryptodev/version.map b/lib/cryptodev/version.map index 157dac521d..b55b4b8e7e 100644 --- a/lib/cryptodev/version.map +++ b/lib/cryptodev/version.map @@ -43,7 +43,6 @@ DPDK_22 { rte_cryptodev_sym_session_create; rte_cryptodev_sym_session_free; rte_cryptodev_sym_session_init; - rte_cryptodevs; #added in 21.11 rte_crypto_fp_ops; @@ -125,4 +124,5 @@ INTERNAL { rte_cryptodev_pmd_parse_input_args; rte_cryptodev_pmd_probing_finish; rte_cryptodev_pmd_release_device; + rte_cryptodevs; };