From patchwork Fri Oct 22 09:11:42 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Xueming Li X-Patchwork-Id: 102638 X-Patchwork-Delegate: rasland@nvidia.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 67B4CA0C43; Fri, 22 Oct 2021 11:13:03 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 2BB41411AE; Fri, 22 Oct 2021 11:12:50 +0200 (CEST) Received: from NAM12-MW2-obe.outbound.protection.outlook.com (mail-mw2nam12on2060.outbound.protection.outlook.com [40.107.244.60]) by mails.dpdk.org (Postfix) with ESMTP id 5D24D4118F for ; Fri, 22 Oct 2021 11:12:46 +0200 (CEST) ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=HR9BcaBPpHQF2/LBBzQ+2Ut0Gwd0H/swsLAG3ySnCycPhHdmDcxL+EGHGzOBMDBceiRKVCHabEeM4Et5yB/7UAdnzF+9Uf7Qk2u8PHaUgEzyVM9lpKEnc68evPrMowbTOAzOL39fnHiVt5QeJaUreWqy7AmjRLno9i7FIp8OMSHZC6xNBXfHMQ1X+T7aDlyEvisPFpelML0x+WQm0th7IbeUBEbrTc6dowQhCHq9oFbBHgxBCW+e4iV53jXju9Q0MEdbUrFajmFNmEUY4HslOtlqaz5ybV4ojIc4cW964yhQGDAbPRR1jv3EneoRRggnFLjC0cYBUtT5Dif0oDa+yA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=SOMWY5tjDZfVh5D2T8cciaLdY01R64xyE9BMV/9GIfw=; b=NH08WggXSV73kxUvTbX5CLxcyMR3CiEu+L6+SunZxZ+27vg8cjyuJGueWcilPaOO0guDndrIV38jy48MYn/TJduFJtCXnk3IeexoBTJzIdbqLfmuWWBsabgcOwq9HAJuXTj4ZjwrwuhOPkT0hAoTM1Sith4V0MKhcYOoWwgrRMLEuSibsRi91zsIpz5rdgCHSAzKzA8vp8FFTa9WW5thhn4ceg2x7gDvct8O0kg472pEINgJFqoAtLlx2AviFAQv/1jKzQESeOO93MO5AebXfPbBEwOw/dG+PcNpiWJmvEuHBjk3W7vEfVVB5J245CB3W7DAZkmEvq8Df+btNDOTVg== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 216.228.112.34) smtp.rcpttodomain=dpdk.org smtp.mailfrom=nvidia.com; dmarc=pass (p=quarantine sp=quarantine pct=100) action=none header.from=nvidia.com; dkim=none (message not signed); arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=Nvidia.com; s=selector2; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=SOMWY5tjDZfVh5D2T8cciaLdY01R64xyE9BMV/9GIfw=; b=CLWg6aWwA1iS0uaWlPgWaq2FfAvPps1JlQwYNZyLGZDazgYPpxEoMYmTocXA06GFfmKW7c/5llPN4yshoYTyUqxhXcImPC4e0Tg2fmqeYjFtobanaDAQ0mczUNT8AGFGHxw7saUAObwQqXpCnqwduzPsY7N1yDJBtimj4lYLntibYIk/jSHPLH7WofjzZAITaP6zq5V7rRSMbQAagUXQtJMLoPGvwEBRQ/PCf6PETX7zXH2a8oPBuP0eU+QJPDCjvIW9exRs/XDUWbgelUQh7FWlLDV3vSRwl/JKJ8y+1elyJDGpdWsRxDCunJFKWRteC7Juw28LdhhnbW7lDY5mXA== Received: from MW4PR03CA0175.namprd03.prod.outlook.com (2603:10b6:303:8d::30) by DM6PR12MB5568.namprd12.prod.outlook.com (2603:10b6:5:20c::8) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4628.18; Fri, 22 Oct 2021 09:12:45 +0000 Received: from CO1NAM11FT005.eop-nam11.prod.protection.outlook.com (2603:10b6:303:8d:cafe::d3) by MW4PR03CA0175.outlook.office365.com (2603:10b6:303:8d::30) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4628.18 via Frontend Transport; Fri, 22 Oct 2021 09:12:45 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 216.228.112.34) smtp.mailfrom=nvidia.com; dpdk.org; dkim=none (message not signed) header.d=none;dpdk.org; dmarc=pass action=none header.from=nvidia.com; Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 216.228.112.34 as permitted sender) receiver=protection.outlook.com; client-ip=216.228.112.34; helo=mail.nvidia.com; Received: from mail.nvidia.com (216.228.112.34) by CO1NAM11FT005.mail.protection.outlook.com (10.13.174.147) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.20.4628.18 via Frontend Transport; Fri, 22 Oct 2021 09:12:44 +0000 Received: from nvidia.com (172.20.187.6) by HQMAIL107.nvidia.com (172.20.187.13) with Microsoft SMTP Server (TLS) id 15.0.1497.18; Fri, 22 Oct 2021 09:12:42 +0000 From: Xueming Li To: CC: , Viacheslav Ovsiienko , Lior Margalit , Matan Azrad Date: Fri, 22 Oct 2021 17:11:42 +0800 Message-ID: <20211022091142.51397-9-xuemingl@nvidia.com> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20211022091142.51397-1-xuemingl@nvidia.com> References: <20210927083256.337450-1-xuemingl@nvidia.com> <20211022091142.51397-1-xuemingl@nvidia.com> MIME-Version: 1.0 X-Originating-IP: [172.20.187.6] X-ClientProxiedBy: HQMAIL111.nvidia.com (172.20.187.18) To HQMAIL107.nvidia.com (172.20.187.13) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 5d7ba0ff-9cd9-4712-8cf5-08d9953c1bfb X-MS-TrafficTypeDiagnostic: DM6PR12MB5568: X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:346; X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: JljAb4u5IgFMPevrrsxXm1f8wLeYGVuHNINu/zy0gPPgO1K/tWGyJb2eOpXvmauKQ0b3qHZlRHw5biob5mDNH/H4z72SBudkhCUC8sPQDf5ZosvEhVud3bNrVY9GHmcSx20igCy4sD+t+o9SVxxndXRG1b+oMUiZttfM92z0hAi8Qb6iO2+Tut+wLvbxx0WxLzRmNB46Z3sgAxU6I5kGaWRnAXxePAPcQ9bIYUEP0COgn+tOlHc9kTR1BgJvND/rLPa7rwBXvqmpSZjbCyUTpfHYOxpKNPBaKGi5XIq9wke9QJo/5vYEeBJlk7lzPk1QzUK+VrFkxm/EcNmThFFgAwAMZ//uAfxnVL6u3gXPo4JHbhR8lHzdFNR8TId1svFHvN/XROBSlG5V2byIdawDwiNVLQzmZxK3sS4fFD8G7SHTJ3meg3zItn42tZQNuEV+KHdri7muNOCu6U0OLn9IBjUxY314b7RLT9qF1Stf0YtBjp4fSHURDB9xPPu+j3lecpmyRVbqdjfoPgc9ClfVy2pGClSB7xrkzB7KAIYFxmBoLwJ69QiX8KuK8peW/r+xCiVU/keuxDahqk9X1L5K7DtDmUWrqRz+j97nSpFCBibtYet9vcv/pMaV78XeSE8hPCl9zQORQDG7H8gmnXDroe+MSchOB0P+TCnAsCC4OeTtSe1ztO8IZHfTZ+nDKJHupmMRtrHWV3KtN7ceTa7Y5g== X-Forefront-Antispam-Report: CIP:216.228.112.34; CTRY:US; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:mail.nvidia.com; PTR:schybrid03.nvidia.com; CAT:NONE; SFS:(4636009)(36840700001)(46966006)(16526019)(508600001)(70206006)(1076003)(186003)(2616005)(36756003)(4326008)(107886003)(426003)(47076005)(2906002)(7636003)(336012)(356005)(26005)(6916009)(5660300002)(70586007)(86362001)(82310400003)(8676002)(316002)(6286002)(54906003)(55016002)(36906005)(7696005)(83380400001)(36860700001)(8936002); DIR:OUT; SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 22 Oct 2021 09:12:44.8653 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 5d7ba0ff-9cd9-4712-8cf5-08d9953c1bfb X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.112.34]; Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: CO1NAM11FT005.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM6PR12MB5568 Subject: [dpdk-dev] [PATCH v4 8/8] net/mlx5: check DevX to support more Verbs ports X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Verbs API doesn't support device port number larger than 255 by design. To support more VF or SubFunction port representors, forces DevX API check when max Verbs device link ports larger than 255. Signed-off-by: Xueming Li Acked-by: Viacheslav Ovsiienko --- drivers/net/mlx5/linux/mlx5_os.c | 11 +++++------ 1 file changed, 5 insertions(+), 6 deletions(-) diff --git a/drivers/net/mlx5/linux/mlx5_os.c b/drivers/net/mlx5/linux/mlx5_os.c index 2db842cb983..17192c7fd55 100644 --- a/drivers/net/mlx5/linux/mlx5_os.c +++ b/drivers/net/mlx5/linux/mlx5_os.c @@ -1243,12 +1243,6 @@ mlx5_dev_spawn(struct rte_device *dpdk_dev, config->dv_flow_en = 0; } #endif - if (spawn->max_port > UINT8_MAX) { - /* Verbs can't support ports larger than 255 by design. */ - DRV_LOG(ERR, "can't support IB ports > UINT8_MAX"); - err = EINVAL; - goto error; - } config->ind_table_max_size = sh->device_attr.max_rwq_indirection_table_size; /* @@ -1699,6 +1693,11 @@ mlx5_dev_spawn(struct rte_device *dpdk_dev, mlx5_rxq_ibv_obj_dummy_lb_create; priv->obj_ops.lb_dummy_queue_release = mlx5_rxq_ibv_obj_dummy_lb_release; + } else if (spawn->max_port > UINT8_MAX) { + /* Verbs can't support ports larger than 255 by design. */ + DRV_LOG(ERR, "must enable DV and ESW when RDMA link ports > 255"); + err = ENOTSUP; + goto error; } else { priv->obj_ops = ibv_obj_ops; }