From patchwork Tue Oct 26 17:25:17 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Ji, Kai" X-Patchwork-Id: 102989 X-Patchwork-Delegate: gakhil@marvell.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id BBDDAA0547; Tue, 26 Oct 2021 19:26:16 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 101F54113B; Tue, 26 Oct 2021 19:25:59 +0200 (CEST) Received: from mga04.intel.com (mga04.intel.com [192.55.52.120]) by mails.dpdk.org (Postfix) with ESMTP id 7216241101 for ; Tue, 26 Oct 2021 19:25:53 +0200 (CEST) X-IronPort-AV: E=McAfee;i="6200,9189,10149"; a="228723421" X-IronPort-AV: E=Sophos;i="5.87,184,1631602800"; d="scan'208";a="228723421" Received: from fmsmga007.fm.intel.com ([10.253.24.52]) by fmsmga104.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 26 Oct 2021 10:25:29 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.87,184,1631602800"; d="scan'208";a="494306309" Received: from silpixa00400272.ir.intel.com (HELO silpixa00400272.ger.corp.intel.com) ([10.237.223.111]) by fmsmga007.fm.intel.com with ESMTP; 26 Oct 2021 10:25:28 -0700 From: Kai Ji To: dev@dpdk.org Cc: Kai Ji , pablo.de.lara.guarch@intel.com, adamx.dybkowski@intel.com Date: Tue, 26 Oct 2021 18:25:17 +0100 Message-Id: <20211026172518.20183-7-kai.ji@intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20211026172518.20183-1-kai.ji@intel.com> References: <20211026172518.20183-1-kai.ji@intel.com> Subject: [dpdk-dev] [dpdk-dev v1 6/7] app/test: cryptodev test fix X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" test_mixed_auth_cipher: ensure enough space allocate in ibuf & obuf for mbuf to vec conversion test_kasumi_decryption: cipher length update. qat/dev: support sgl oop operation Fixes: 681f540da52b ("cryptodev: do not use AAD in wireless algorithms") Cc: pablo.de.lara.guarch@intel.com Fixes: e847fc512817 ("test/crypto: add encrypted digest case for AES-CTR-CMAC") Cc: adamx.dybkowski@intel.com Signed-off-by: Kai Ji --- app/test/test_cryptodev.c | 52 ++++++++++++++---- drivers/crypto/qat/dev/qat_crypto_pmd_gen3.c | 28 ++++++++-- drivers/crypto/qat/dev/qat_crypto_pmd_gen4.c | 14 ++++- drivers/crypto/qat/dev/qat_sym_pmd_gen1.c | 55 +++++++++++++++++--- 4 files changed, 124 insertions(+), 25 deletions(-) diff --git a/app/test/test_cryptodev.c b/app/test/test_cryptodev.c index 814a0b401d..dd791a181a 100644 --- a/app/test/test_cryptodev.c +++ b/app/test/test_cryptodev.c @@ -179,6 +179,10 @@ post_process_raw_dp_op(void *user_data, uint32_t index __rte_unused, RTE_CRYPTO_OP_STATUS_ERROR; } +static struct crypto_testsuite_params testsuite_params = { NULL }; +struct crypto_testsuite_params *p_testsuite_params = &testsuite_params; +static struct crypto_unittest_params unittest_params; + void process_sym_raw_dp_op(uint8_t dev_id, uint16_t qp_id, struct rte_crypto_op *op, uint8_t is_cipher, uint8_t is_auth, @@ -193,6 +197,7 @@ process_sym_raw_dp_op(uint8_t dev_id, uint16_t qp_id, struct rte_crypto_sgl sgl, dest_sgl; uint32_t max_len; union rte_cryptodev_session_ctx sess; + uint64_t auth_end_iova; uint32_t count = 0; struct rte_crypto_raw_dp_ctx *ctx; uint32_t cipher_offset = 0, cipher_len = 0, auth_offset = 0, @@ -202,6 +207,9 @@ process_sym_raw_dp_op(uint8_t dev_id, uint16_t qp_id, int ctx_service_size; int32_t status = 0; int enqueue_status, dequeue_status; + struct crypto_unittest_params *ut_params = &unittest_params; + /* oop is not supported in raw hw dp api*/ + int is_sgl = sop->m_src->nb_segs > 1; ctx_service_size = rte_cryptodev_get_raw_dp_ctx_size(dev_id); if (ctx_service_size < 0) { @@ -267,6 +275,30 @@ process_sym_raw_dp_op(uint8_t dev_id, uint16_t qp_id, digest.va = (void *)sop->auth.digest.data; digest.iova = sop->auth.digest.phys_addr; + if (is_sgl) { + uint32_t remaining_off = auth_offset + auth_len; + struct rte_mbuf *sgl_buf = sop->m_src; + + while (remaining_off >= rte_pktmbuf_data_len(sgl_buf) + && sgl_buf->next != NULL) { + remaining_off -= rte_pktmbuf_data_len(sgl_buf); + sgl_buf = sgl_buf->next; + } + + auth_end_iova = (uint64_t)rte_pktmbuf_iova_offset( + sgl_buf, remaining_off); + } else { + /* oop is not supported in raw hw dp api */ + auth_end_iova = rte_pktmbuf_iova(op->sym->m_src) + + auth_offset + auth_len; + } + /* Then check if digest-encrypted conditions are met */ + if ((auth_offset + auth_len < cipher_offset + cipher_len) && + (digest.iova == auth_end_iova) && is_sgl) + max_len = RTE_MAX(max_len, + auth_offset + auth_len + + ut_params->auth_xform.auth.digest_length); + } else if (is_cipher) { cipher_offset = sop->cipher.data.offset; cipher_len = sop->cipher.data.length; @@ -503,10 +535,6 @@ process_crypto_request(uint8_t dev_id, struct rte_crypto_op *op) return op; } -static struct crypto_testsuite_params testsuite_params = { NULL }; -struct crypto_testsuite_params *p_testsuite_params = &testsuite_params; -static struct crypto_unittest_params unittest_params; - static int testsuite_setup(void) { @@ -4077,9 +4105,9 @@ test_kasumi_decryption(const struct kasumi_test_data *tdata) /* Create KASUMI operation */ retval = create_wireless_algo_cipher_operation(tdata->cipher_iv.data, - tdata->cipher_iv.len, - tdata->ciphertext.len, - tdata->validCipherOffsetInBits.len); + tdata->cipher_iv.len, + RTE_ALIGN_CEIL(tdata->validCipherLenInBits.len, 8), + tdata->validCipherOffsetInBits.len); if (retval < 0) return retval; @@ -7310,6 +7338,7 @@ test_mixed_auth_cipher(const struct mixed_cipher_auth_test_data *tdata, unsigned int plaintext_len; unsigned int ciphertext_pad_len; unsigned int ciphertext_len; + unsigned int data_len; struct rte_cryptodev_info dev_info; struct rte_crypto_op *op; @@ -7370,21 +7399,22 @@ test_mixed_auth_cipher(const struct mixed_cipher_auth_test_data *tdata, plaintext_len = ceil_byte_length(tdata->plaintext.len_bits); ciphertext_pad_len = RTE_ALIGN_CEIL(ciphertext_len, 16); plaintext_pad_len = RTE_ALIGN_CEIL(plaintext_len, 16); + data_len = RTE_MAX(ciphertext_pad_len, plaintext_pad_len); if (verify) { ciphertext = (uint8_t *)rte_pktmbuf_append(ut_params->ibuf, - ciphertext_pad_len); + data_len); memcpy(ciphertext, tdata->ciphertext.data, ciphertext_len); if (op_mode == OUT_OF_PLACE) - rte_pktmbuf_append(ut_params->obuf, ciphertext_pad_len); + rte_pktmbuf_append(ut_params->obuf, data_len); debug_hexdump(stdout, "ciphertext:", ciphertext, ciphertext_len); } else { plaintext = (uint8_t *)rte_pktmbuf_append(ut_params->ibuf, - plaintext_pad_len); + data_len); memcpy(plaintext, tdata->plaintext.data, plaintext_len); if (op_mode == OUT_OF_PLACE) - rte_pktmbuf_append(ut_params->obuf, plaintext_pad_len); + rte_pktmbuf_append(ut_params->obuf, data_len); debug_hexdump(stdout, "plaintext:", plaintext, plaintext_len); } diff --git a/drivers/crypto/qat/dev/qat_crypto_pmd_gen3.c b/drivers/crypto/qat/dev/qat_crypto_pmd_gen3.c index 6494019050..c59c25fe8f 100644 --- a/drivers/crypto/qat/dev/qat_crypto_pmd_gen3.c +++ b/drivers/crypto/qat/dev/qat_crypto_pmd_gen3.c @@ -467,8 +467,18 @@ qat_sym_dp_enqueue_aead_jobs_gen3(void *qp_data, uint8_t *drv_ctx, (uint8_t *)tx_queue->base_addr + tail); rte_mov128((uint8_t *)req, (const uint8_t *)&(ctx->fw_req)); - data_len = qat_sym_build_req_set_data(req, user_data[i], cookie, - vec->src_sgl[i].vec, vec->src_sgl[i].num, NULL, 0); + if (vec->dest_sgl) { + data_len = qat_sym_build_req_set_data(req, + user_data[i], cookie, + vec->src_sgl[i].vec, vec->src_sgl[i].num, + vec->dest_sgl[i].vec, vec->dest_sgl[i].num); + } else { + data_len = qat_sym_build_req_set_data(req, + user_data[i], cookie, + vec->src_sgl[i].vec, + vec->src_sgl[i].num, NULL, 0); + } + if (unlikely(data_len < 0)) break; @@ -564,8 +574,18 @@ qat_sym_dp_enqueue_auth_jobs_gen3(void *qp_data, uint8_t *drv_ctx, (uint8_t *)tx_queue->base_addr + tail); rte_mov128((uint8_t *)req, (const uint8_t *)&(ctx->fw_req)); - data_len = qat_sym_build_req_set_data(req, user_data[i], cookie, - vec->src_sgl[i].vec, vec->src_sgl[i].num, NULL, 0); + if (vec->dest_sgl) { + data_len = qat_sym_build_req_set_data(req, + user_data[i], cookie, + vec->src_sgl[i].vec, vec->src_sgl[i].num, + vec->dest_sgl[i].vec, vec->dest_sgl[i].num); + } else { + data_len = qat_sym_build_req_set_data(req, + user_data[i], cookie, + vec->src_sgl[i].vec, + vec->src_sgl[i].num, NULL, 0); + } + if (unlikely(data_len < 0)) break; enqueue_one_auth_job_gen3(ctx, cookie, req, &vec->digest[i], diff --git a/drivers/crypto/qat/dev/qat_crypto_pmd_gen4.c b/drivers/crypto/qat/dev/qat_crypto_pmd_gen4.c index 108e07ee7f..1b6cf10589 100644 --- a/drivers/crypto/qat/dev/qat_crypto_pmd_gen4.c +++ b/drivers/crypto/qat/dev/qat_crypto_pmd_gen4.c @@ -295,8 +295,18 @@ qat_sym_dp_enqueue_aead_jobs_gen4(void *qp_data, uint8_t *drv_ctx, (uint8_t *)tx_queue->base_addr + tail); rte_mov128((uint8_t *)req, (const uint8_t *)&(ctx->fw_req)); - data_len = qat_sym_build_req_set_data(req, user_data[i], cookie, - vec->src_sgl[i].vec, vec->src_sgl[i].num, NULL, 0); + if (vec->dest_sgl) { + data_len = qat_sym_build_req_set_data(req, + user_data[i], cookie, + vec->src_sgl[i].vec, vec->src_sgl[i].num, + vec->dest_sgl[i].vec, vec->dest_sgl[i].num); + } else { + data_len = qat_sym_build_req_set_data(req, + user_data[i], cookie, + vec->src_sgl[i].vec, + vec->src_sgl[i].num, NULL, 0); + } + if (unlikely(data_len < 0)) break; diff --git a/drivers/crypto/qat/dev/qat_sym_pmd_gen1.c b/drivers/crypto/qat/dev/qat_sym_pmd_gen1.c index aea56fba4c..85d5e45a42 100644 --- a/drivers/crypto/qat/dev/qat_sym_pmd_gen1.c +++ b/drivers/crypto/qat/dev/qat_sym_pmd_gen1.c @@ -529,9 +529,18 @@ qat_sym_dp_enqueue_cipher_jobs_gen1(void *qp_data, uint8_t *drv_ctx, (uint8_t *)tx_queue->base_addr + tail); rte_mov128((uint8_t *)req, (const uint8_t *)&(ctx->fw_req)); - data_len = qat_sym_build_req_set_data(req, user_data[i], - cookie, vec->src_sgl[i].vec, + if (vec->dest_sgl) { + data_len = qat_sym_build_req_set_data(req, + user_data[i], cookie, + vec->src_sgl[i].vec, vec->src_sgl[i].num, + vec->dest_sgl[i].vec, vec->dest_sgl[i].num); + } else { + data_len = qat_sym_build_req_set_data(req, + user_data[i], cookie, + vec->src_sgl[i].vec, vec->src_sgl[i].num, NULL, 0); + } + if (unlikely(data_len < 0)) break; enqueue_one_cipher_job_gen1(ctx, req, &vec->iv[i], ofs, @@ -628,8 +637,18 @@ qat_sym_dp_enqueue_auth_jobs_gen1(void *qp_data, uint8_t *drv_ctx, (uint8_t *)tx_queue->base_addr + tail); rte_mov128((uint8_t *)req, (const uint8_t *)&(ctx->fw_req)); - data_len = qat_sym_build_req_set_data(req, user_data[i], cookie, - vec->src_sgl[i].vec, vec->src_sgl[i].num, NULL, 0); + if (vec->dest_sgl) { + data_len = qat_sym_build_req_set_data(req, + user_data[i], cookie, + vec->src_sgl[i].vec, vec->src_sgl[i].num, + vec->dest_sgl[i].vec, vec->dest_sgl[i].num); + } else { + data_len = qat_sym_build_req_set_data(req, + user_data[i], cookie, + vec->src_sgl[i].vec, + vec->src_sgl[i].num, NULL, 0); + } + if (unlikely(data_len < 0)) break; enqueue_one_auth_job_gen1(ctx, req, &vec->digest[i], @@ -728,8 +747,18 @@ qat_sym_dp_enqueue_chain_jobs_gen1(void *qp_data, uint8_t *drv_ctx, (uint8_t *)tx_queue->base_addr + tail); rte_mov128((uint8_t *)req, (const uint8_t *)&(ctx->fw_req)); - data_len = qat_sym_build_req_set_data(req, user_data[i], cookie, - vec->src_sgl[i].vec, vec->src_sgl[i].num, NULL, 0); + if (vec->dest_sgl) { + data_len = qat_sym_build_req_set_data(req, + user_data[i], cookie, + vec->src_sgl[i].vec, vec->src_sgl[i].num, + vec->dest_sgl[i].vec, vec->dest_sgl[i].num); + } else { + data_len = qat_sym_build_req_set_data(req, + user_data[i], cookie, + vec->src_sgl[i].vec, + vec->src_sgl[i].num, NULL, 0); + } + if (unlikely(data_len < 0)) break; @@ -833,8 +862,18 @@ qat_sym_dp_enqueue_aead_jobs_gen1(void *qp_data, uint8_t *drv_ctx, (uint8_t *)tx_queue->base_addr + tail); rte_mov128((uint8_t *)req, (const uint8_t *)&(ctx->fw_req)); - data_len = qat_sym_build_req_set_data(req, user_data[i], cookie, - vec->src_sgl[i].vec, vec->src_sgl[i].num, NULL, 0); + if (vec->dest_sgl) { + data_len = qat_sym_build_req_set_data(req, + user_data[i], cookie, + vec->src_sgl[i].vec, vec->src_sgl[i].num, + vec->dest_sgl[i].vec, vec->dest_sgl[i].num); + } else { + data_len = qat_sym_build_req_set_data(req, + user_data[i], cookie, + vec->src_sgl[i].vec, + vec->src_sgl[i].num, NULL, 0); + } + if (unlikely(data_len < 0)) break;