From patchwork Tue Nov 16 09:42:01 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Joyce Kong X-Patchwork-Id: 104387 X-Patchwork-Delegate: david.marchand@redhat.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 03F77A0C43; Tue, 16 Nov 2021 10:43:29 +0100 (CET) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id EF11E411DB; Tue, 16 Nov 2021 10:43:13 +0100 (CET) Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by mails.dpdk.org (Postfix) with ESMTP id C678A411DB for ; Tue, 16 Nov 2021 10:43:12 +0100 (CET) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 606841FB; Tue, 16 Nov 2021 01:43:12 -0800 (PST) Received: from net-arm-n1amp-02.shanghai.arm.com (net-arm-n1amp-02.shanghai.arm.com [10.169.210.110]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 0ED0C3F5A1; Tue, 16 Nov 2021 01:43:09 -0800 (PST) From: Joyce Kong To: Declan Doherty , Ciara Power Cc: dev@dpdk.org, honnappa.nagarahalli@arm.com, nd@arm.com, Joyce Kong , Ruifeng Wang Subject: [PATCH v2 08/12] app/crypto: use compiler atomic builtins for display sync Date: Tue, 16 Nov 2021 09:42:01 +0000 Message-Id: <20211116094205.750359-9-joyce.kong@arm.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211116094205.750359-1-joyce.kong@arm.com> References: <20211116094205.750359-1-joyce.kong@arm.com> MIME-Version: 1.0 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Convert rte_atomic_test_and_set usage to compiler atomic CAS operation for display sync in crypto cases. Signed-off-by: Joyce Kong Reviewed-by: Ruifeng Wang Reviewed-by: Honnappa Nagarahalli --- app/test-crypto-perf/cperf_test_latency.c | 6 ++++-- app/test-crypto-perf/cperf_test_pmd_cyclecount.c | 9 ++++++--- app/test-crypto-perf/cperf_test_throughput.c | 9 ++++++--- app/test-crypto-perf/cperf_test_verify.c | 9 ++++++--- 4 files changed, 22 insertions(+), 11 deletions(-) diff --git a/app/test-crypto-perf/cperf_test_latency.c b/app/test-crypto-perf/cperf_test_latency.c index 69f55de50a..ce49feaba9 100644 --- a/app/test-crypto-perf/cperf_test_latency.c +++ b/app/test-crypto-perf/cperf_test_latency.c @@ -126,7 +126,7 @@ cperf_latency_test_runner(void *arg) uint8_t burst_size_idx = 0; uint32_t imix_idx = 0; - static rte_atomic16_t display_once = RTE_ATOMIC16_INIT(0); + static uint16_t display_once; if (ctx == NULL) return 0; @@ -307,8 +307,10 @@ cperf_latency_test_runner(void *arg) time_max = tunit*(double)(tsc_max) / tsc_hz; time_min = tunit*(double)(tsc_min) / tsc_hz; + uint16_t exp = 0; if (ctx->options->csv) { - if (rte_atomic16_test_and_set(&display_once)) + if (__atomic_compare_exchange_n(&display_once, &exp, 1, 0, + __ATOMIC_RELAXED, __ATOMIC_RELAXED)) printf("\n# lcore, Buffer Size, Burst Size, Pakt Seq #, " "cycles, time (us)"); diff --git a/app/test-crypto-perf/cperf_test_pmd_cyclecount.c b/app/test-crypto-perf/cperf_test_pmd_cyclecount.c index fda97e8ab9..ba1f104f72 100644 --- a/app/test-crypto-perf/cperf_test_pmd_cyclecount.c +++ b/app/test-crypto-perf/cperf_test_pmd_cyclecount.c @@ -404,7 +404,7 @@ cperf_pmd_cyclecount_test_runner(void *test_ctx) state.lcore = rte_lcore_id(); state.linearize = 0; - static rte_atomic16_t display_once = RTE_ATOMIC16_INIT(0); + static uint16_t display_once; static bool warmup = true; /* @@ -449,8 +449,10 @@ cperf_pmd_cyclecount_test_runner(void *test_ctx) continue; } + uint16_t exp = 0; if (!opts->csv) { - if (rte_atomic16_test_and_set(&display_once)) + if (__atomic_compare_exchange_n(&display_once, &exp, 1, 0, + __ATOMIC_RELAXED, __ATOMIC_RELAXED)) printf(PRETTY_HDR_FMT, "lcore id", "Buf Size", "Burst Size", "Enqueued", "Dequeued", "Enq Retries", @@ -466,7 +468,8 @@ cperf_pmd_cyclecount_test_runner(void *test_ctx) state.cycles_per_enq, state.cycles_per_deq); } else { - if (rte_atomic16_test_and_set(&display_once)) + if (__atomic_compare_exchange_n(&display_once, &exp, 1, 0, + __ATOMIC_RELAXED, __ATOMIC_RELAXED)) printf(CSV_HDR_FMT, "# lcore id", "Buf Size", "Burst Size", "Enqueued", "Dequeued", "Enq Retries", diff --git a/app/test-crypto-perf/cperf_test_throughput.c b/app/test-crypto-perf/cperf_test_throughput.c index 739ed9e573..51512af2ad 100644 --- a/app/test-crypto-perf/cperf_test_throughput.c +++ b/app/test-crypto-perf/cperf_test_throughput.c @@ -113,7 +113,7 @@ cperf_throughput_test_runner(void *test_ctx) uint8_t burst_size_idx = 0; uint32_t imix_idx = 0; - static rte_atomic16_t display_once = RTE_ATOMIC16_INIT(0); + static uint16_t display_once; struct rte_crypto_op *ops[ctx->options->max_burst_size]; struct rte_crypto_op *ops_processed[ctx->options->max_burst_size]; @@ -281,8 +281,10 @@ cperf_throughput_test_runner(void *test_ctx) double cycles_per_packet = ((double)tsc_duration / ctx->options->total_ops); + uint16_t exp = 0; if (!ctx->options->csv) { - if (rte_atomic16_test_and_set(&display_once)) + if (__atomic_compare_exchange_n(&display_once, &exp, 1, 0, + __ATOMIC_RELAXED, __ATOMIC_RELAXED)) printf("%12s%12s%12s%12s%12s%12s%12s%12s%12s%12s\n\n", "lcore id", "Buf Size", "Burst Size", "Enqueued", "Dequeued", "Failed Enq", @@ -302,7 +304,8 @@ cperf_throughput_test_runner(void *test_ctx) throughput_gbps, cycles_per_packet); } else { - if (rte_atomic16_test_and_set(&display_once)) + if (__atomic_compare_exchange_n(&display_once, &exp, 1, 0, + __ATOMIC_RELAXED, __ATOMIC_RELAXED)) printf("#lcore id,Buffer Size(B)," "Burst Size,Enqueued,Dequeued,Failed Enq," "Failed Deq,Ops(Millions),Throughput(Gbps)," diff --git a/app/test-crypto-perf/cperf_test_verify.c b/app/test-crypto-perf/cperf_test_verify.c index 1962438034..496eb0de00 100644 --- a/app/test-crypto-perf/cperf_test_verify.c +++ b/app/test-crypto-perf/cperf_test_verify.c @@ -241,7 +241,7 @@ cperf_verify_test_runner(void *test_ctx) uint64_t ops_deqd = 0, ops_deqd_total = 0, ops_deqd_failed = 0; uint64_t ops_failed = 0; - static rte_atomic16_t display_once = RTE_ATOMIC16_INIT(0); + static uint16_t display_once; uint64_t i; uint16_t ops_unused = 0; @@ -383,8 +383,10 @@ cperf_verify_test_runner(void *test_ctx) ops_deqd_total += ops_deqd; } + uint16_t exp = 0; if (!ctx->options->csv) { - if (rte_atomic16_test_and_set(&display_once)) + if (__atomic_compare_exchange_n(&display_once, &exp, 1, 0, + __ATOMIC_RELAXED, __ATOMIC_RELAXED)) printf("%12s%12s%12s%12s%12s%12s%12s%12s\n\n", "lcore id", "Buf Size", "Burst size", "Enqueued", "Dequeued", "Failed Enq", @@ -401,7 +403,8 @@ cperf_verify_test_runner(void *test_ctx) ops_deqd_failed, ops_failed); } else { - if (rte_atomic16_test_and_set(&display_once)) + if (__atomic_compare_exchange_n(&display_once, &exp, 1, 0, + __ATOMIC_RELAXED, __ATOMIC_RELAXED)) printf("\n# lcore id, Buffer Size(B), " "Burst Size,Enqueued,Dequeued,Failed Enq," "Failed Deq,Failed Ops\n");