diff mbox series

net/mlx5: fix modify field destination bit offset

Message ID 20211117111435.13553-1-viacheslavo@nvidia.com (mailing list archive)
State Accepted, archived
Delegated to: Raslan Darawsheh
Headers show
Series net/mlx5: fix modify field destination bit offset | expand

Checks

Context Check Description
ci/iol-intel-Performance success Performance Testing PASS
ci/iol-intel-Functional success Functional Testing PASS
ci/iol-x86_64-compile-testing success Testing PASS
ci/iol-x86_64-unit-testing success Testing PASS
ci/iol-aarch64-compile-testing success Testing PASS
ci/intel-Testing success Testing PASS
ci/Intel-compilation success Compilation OK
ci/iol-aarch64-unit-testing success Testing PASS
ci/github-robot: build success github build: passed
ci/iol-broadcom-Performance success Performance Testing PASS
ci/iol-mellanox-Performance success Performance Testing PASS
ci/iol-broadcom-Functional success Functional Testing PASS
ci/checkpatch success coding style OK

Commit Message

Slava Ovsiienko Nov. 17, 2021, 11:14 a.m. UTC
If the modify field action requests the field copy/set transaction
from other field, the destination field hardware bit offset was
assigned incorrectly with non-zero byte offset, causing wrong
translations for the fields with sizes larger than 32 bits.

Fixes: 40c8fb1fd3b3 ("net/mlx5: update modify field action")

Signed-off-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
---
 drivers/net/mlx5/mlx5_flow_dv.c | 16 ++++++++--------
 1 file changed, 8 insertions(+), 8 deletions(-)

Comments

Raslan Darawsheh Nov. 17, 2021, 2:45 p.m. UTC | #1
Hi,

> -----Original Message-----
> From: Slava Ovsiienko <viacheslavo@nvidia.com>
> Sent: Wednesday, November 17, 2021 1:15 PM
> To: dev@dpdk.org
> Cc: ferruh.yigit@intel.com; Raslan Darawsheh <rasland@nvidia.com>; Matan
> Azrad <matan@nvidia.com>
> Subject: [PATCH] net/mlx5: fix modify field destination bit offset
> 
> If the modify field action requests the field copy/set transaction
> from other field, the destination field hardware bit offset was
> assigned incorrectly with non-zero byte offset, causing wrong
> translations for the fields with sizes larger than 32 bits.
> 
> Fixes: 40c8fb1fd3b3 ("net/mlx5: update modify field action")
> 
> Signed-off-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>

Patch applied to next-net-mlx,

Kindest regards,
Raslan Darawsheh
diff mbox series

Patch

diff --git a/drivers/net/mlx5/mlx5_flow_dv.c b/drivers/net/mlx5/mlx5_flow_dv.c
index 7b32c06fc6..2705cadaf1 100644
--- a/drivers/net/mlx5/mlx5_flow_dv.c
+++ b/drivers/net/mlx5/mlx5_flow_dv.c
@@ -1501,7 +1501,7 @@  mlx5_flow_field_id_to_modify_info
 						    (32 - width)) << off);
 		} else {
 			if (data->offset < 16)
-				info[idx++] = (struct field_modify_info){2, 4,
+				info[idx++] = (struct field_modify_info){2, 0,
 						MLX5_MODI_OUT_DMAC_15_0};
 			info[idx] = (struct field_modify_info){4, 0,
 						MLX5_MODI_OUT_DMAC_47_16};
@@ -1531,7 +1531,7 @@  mlx5_flow_field_id_to_modify_info
 						    (32 - width)) << off);
 		} else {
 			if (data->offset < 16)
-				info[idx++] = (struct field_modify_info){2, 4,
+				info[idx++] = (struct field_modify_info){2, 0,
 						MLX5_MODI_OUT_SMAC_15_0};
 			info[idx] = (struct field_modify_info){4, 0,
 						MLX5_MODI_OUT_SMAC_47_16};
@@ -1645,13 +1645,13 @@  mlx5_flow_field_id_to_modify_info
 			mask[0] = rte_cpu_to_be_32(0xffffffff >> (32 - width));
 		} else {
 			if (data->offset < 32)
-				info[idx++] = (struct field_modify_info){4, 12,
+				info[idx++] = (struct field_modify_info){4, 0,
 						MLX5_MODI_OUT_SIPV6_31_0};
 			if (data->offset < 64)
-				info[idx++] = (struct field_modify_info){4, 8,
+				info[idx++] = (struct field_modify_info){4, 0,
 						MLX5_MODI_OUT_SIPV6_63_32};
 			if (data->offset < 96)
-				info[idx++] = (struct field_modify_info){4, 4,
+				info[idx++] = (struct field_modify_info){4, 0,
 						MLX5_MODI_OUT_SIPV6_95_64};
 			if (data->offset < 128)
 				info[idx++] = (struct field_modify_info){4, 0,
@@ -1713,13 +1713,13 @@  mlx5_flow_field_id_to_modify_info
 			mask[0] = rte_cpu_to_be_32(0xffffffff >> (32 - width));
 		} else {
 			if (data->offset < 32)
-				info[idx++] = (struct field_modify_info){4, 12,
+				info[idx++] = (struct field_modify_info){4, 0,
 						MLX5_MODI_OUT_DIPV6_31_0};
 			if (data->offset < 64)
-				info[idx++] = (struct field_modify_info){4, 8,
+				info[idx++] = (struct field_modify_info){4, 0,
 						MLX5_MODI_OUT_DIPV6_63_32};
 			if (data->offset < 96)
-				info[idx++] = (struct field_modify_info){4, 4,
+				info[idx++] = (struct field_modify_info){4, 0,
 						MLX5_MODI_OUT_DIPV6_95_64};
 			if (data->offset < 128)
 				info[idx++] = (struct field_modify_info){4, 0,