From patchwork Tue Nov 30 06:07:00 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ashwin Sekhar T K X-Patchwork-Id: 104771 X-Patchwork-Delegate: jerinj@marvell.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 54D88A0C58; Tue, 30 Nov 2021 07:09:06 +0100 (CET) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 4175E40DF7; Tue, 30 Nov 2021 07:09:06 +0100 (CET) Received: from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com [67.231.148.174]) by mails.dpdk.org (Postfix) with ESMTP id 7BC0F4068B for ; Tue, 30 Nov 2021 07:09:04 +0100 (CET) Received: from pps.filterd (m0045849.ppops.net [127.0.0.1]) by mx0a-0016f401.pphosted.com (8.16.1.2/8.16.1.2) with ESMTP id 1ATNsHTk026068 for ; Mon, 29 Nov 2021 22:09:03 -0800 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=pfpt0220; bh=JLLrV6h1X5R2upnTPkHAE+fcN9ILkZBWbDV1gs+hsWc=; b=HukX+vprKON1CpHAMGtBFkHtZ9iQiUAmSD8EFohsSQZsAs1H+uJdsMdv+WerLxL1Jb1M oEdsmmF70sJnJB00FsJst3NL5jexL/kGxPv4Amlk5z4Wpfh1pRHv9jlYIIiQDzvUB1It NusFxbJEATps5/DfF0d9fOqR8wSSdLd1JV5DoeZDwavUCrm8zFsaD2eMJvrmqzkKbJxX taXBx/k/W839YOSfh37+3uonpYX4ADBsQXvo+w1g4zOsHg0fapPODDwBGrBH6hchsxrR shnoJ3FI5mxTjqkoj3e8CjQX1cUPkCghN+IZOefW7UJ5W0fxciRnBLx1knOlrzd7lFec oA== Received: from dc5-exch01.marvell.com ([199.233.59.181]) by mx0a-0016f401.pphosted.com (PPS) with ESMTPS id 3cn23wu3v6-2 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT) for ; Mon, 29 Nov 2021 22:09:03 -0800 Received: from DC5-EXCH02.marvell.com (10.69.176.39) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Mon, 29 Nov 2021 22:09:01 -0800 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.18 via Frontend Transport; Mon, 29 Nov 2021 22:09:01 -0800 Received: from lab-ci-142.marvell.com (unknown [10.28.36.142]) by maili.marvell.com (Postfix) with ESMTP id 923D53F7073; Mon, 29 Nov 2021 22:08:58 -0800 (PST) From: Ashwin Sekhar T K To: CC: , , , , , , , , , Subject: [PATCH 1/3] common/cnxk: add support to wait for pool filling Date: Tue, 30 Nov 2021 11:37:00 +0530 Message-ID: <20211130060702.2697517-2-asekhar@marvell.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20211130060702.2697517-1-asekhar@marvell.com> References: <20211130060702.2697517-1-asekhar@marvell.com> MIME-Version: 1.0 X-Proofpoint-ORIG-GUID: eEEUcgkucjtvdV-IdOzb1fg12A-I-Rs2 X-Proofpoint-GUID: eEEUcgkucjtvdV-IdOzb1fg12A-I-Rs2 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.790,Hydra:6.0.425,FMLib:17.0.607.475 definitions=2021-11-30_05,2021-11-28_01,2020-04-07_01 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Add roc_npa_aura_op_available_wait() API which can be used to wait until an NPA pool gets filled up to a certain count of pointers. Signed-off-by: Ashwin Sekhar T K --- drivers/common/cnxk/roc_npa.h | 26 ++++++++++++++++++++++++++ 1 file changed, 26 insertions(+) diff --git a/drivers/common/cnxk/roc_npa.h b/drivers/common/cnxk/roc_npa.h index 46350fdb48..d05c5c4af4 100644 --- a/drivers/common/cnxk/roc_npa.h +++ b/drivers/common/cnxk/roc_npa.h @@ -155,6 +155,32 @@ roc_npa_aura_op_available(uint64_t aura_handle) return reg & 0xFFFFFFFFF; } +/* Wait for a given timeout, repeatedly checking whether the available + * pointers has reached the given count. Returns the available pointer + * count if it has reached the given count or if timeout has expired + */ +static inline uint32_t +roc_npa_aura_op_available_wait(uint64_t aura_handle, uint32_t count, + uint32_t tmo_ms) +{ +#define OP_AVAIL_WAIT_MS_DEFAULT (100) +#define OP_AVAIL_CHECK_INTERVAL_MS (1) + uint32_t op_avail; + int retry; + + tmo_ms = tmo_ms ? tmo_ms : OP_AVAIL_WAIT_MS_DEFAULT; + + retry = tmo_ms / OP_AVAIL_CHECK_INTERVAL_MS; + op_avail = roc_npa_aura_op_available(aura_handle); + while (retry && (op_avail < count)) { + plt_delay_ms(OP_AVAIL_CHECK_INTERVAL_MS); + op_avail = roc_npa_aura_op_available(aura_handle); + retry--; + } + + return op_avail; +} + static inline uint64_t roc_npa_pool_op_performance_counter(uint64_t aura_handle, const int drop) {