From patchwork Tue Nov 30 06:07:02 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ashwin Sekhar T K X-Patchwork-Id: 104773 X-Patchwork-Delegate: jerinj@marvell.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 7BDF2A0C58; Tue, 30 Nov 2021 07:09:18 +0100 (CET) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id C0636411E6; Tue, 30 Nov 2021 07:09:14 +0100 (CET) Received: from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com [67.231.148.174]) by mails.dpdk.org (Postfix) with ESMTP id 247A24068B for ; Tue, 30 Nov 2021 07:09:12 +0100 (CET) Received: from pps.filterd (m0045849.ppops.net [127.0.0.1]) by mx0a-0016f401.pphosted.com (8.16.1.2/8.16.1.2) with ESMTP id 1ATNsHTl026068 for ; Mon, 29 Nov 2021 22:09:12 -0800 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=pfpt0220; bh=1HC9FHVz8iHAfOKttK8kEyv47ne3bOJgQryz0fQmkD4=; b=Kco0rwm+eoLPRD1wMocwJM0pDXUZoonxJNtKRI5LkIynrZodwj9awxQcPN6zHtoHiS6m lQXPw+SJfN2QcAjoSWPchlDYbKbEBT8iH56hOjqu4Ra3WVcBeLdYB4f0DajUxTt1Eux7 rHyr5skrSYc/cDuVK6e8EM/56HhfA+kIUo5QPineZzRwvRa8ajg6227pyVph3sTeZ9+b +hcvnRCRN8ikCso6DP9pyqgYC0XqWrMpWp9wGJkWqFJPpMl+9J6sEI9VDeHvREksk00M 0ziWMUFHCqV1/q1kZBU1geg1ScZgQvN/M80u+SYXdqfx42IlIycKD1yrXMiiflvw5XhY Yg== Received: from dc5-exch01.marvell.com ([199.233.59.181]) by mx0a-0016f401.pphosted.com (PPS) with ESMTPS id 3cn23wu3w2-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT) for ; Mon, 29 Nov 2021 22:09:12 -0800 Received: from DC5-EXCH01.marvell.com (10.69.176.38) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Mon, 29 Nov 2021 22:09:10 -0800 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Mon, 29 Nov 2021 22:09:10 -0800 Received: from lab-ci-142.marvell.com (unknown [10.28.36.142]) by maili.marvell.com (Postfix) with ESMTP id 8B3C05C68E1; Mon, 29 Nov 2021 22:09:07 -0800 (PST) From: Ashwin Sekhar T K To: CC: , , , , , , , , , Subject: [PATCH 3/3] common/cnxk: wait for xaq pool to fill Date: Tue, 30 Nov 2021 11:37:02 +0530 Message-ID: <20211130060702.2697517-4-asekhar@marvell.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20211130060702.2697517-1-asekhar@marvell.com> References: <20211130060702.2697517-1-asekhar@marvell.com> MIME-Version: 1.0 X-Proofpoint-ORIG-GUID: 3LTgJCl_1tshOMYC8NtiTsq5IqO0R7Gx X-Proofpoint-GUID: 3LTgJCl_1tshOMYC8NtiTsq5IqO0R7Gx X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.790,Hydra:6.0.425,FMLib:17.0.607.475 definitions=2021-11-30_05,2021-11-28_01,2020-04-07_01 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Wait for XAQ pool to get filled with the freed pointers before proceeding. Signed-off-by: Ashwin Sekhar T K --- drivers/common/cnxk/roc_sso.c | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/drivers/common/cnxk/roc_sso.c b/drivers/common/cnxk/roc_sso.c index 45ff16ca0e..c1aa3324be 100644 --- a/drivers/common/cnxk/roc_sso.c +++ b/drivers/common/cnxk/roc_sso.c @@ -453,6 +453,13 @@ sso_hwgrp_init_xaq_aura(struct dev *dev, struct roc_sso_xaq_data *xaq, } roc_npa_aura_op_range_set(xaq->aura_handle, (uint64_t)xaq->mem, iova); + if (roc_npa_aura_op_available_wait(xaq->aura_handle, xaq->nb_xaq, 0) != + xaq->nb_xaq) { + plt_err("Failed to free all pointers to the pool"); + rc = -ENOMEM; + goto npa_fill_fail; + } + /* When SW does addwork (enqueue) check if there is space in XAQ by * comparing fc_addr above against the xaq_lmt calculated below. * There should be a minimum headroom of 7 XAQs per HWGRP for SSO @@ -461,6 +468,8 @@ sso_hwgrp_init_xaq_aura(struct dev *dev, struct roc_sso_xaq_data *xaq, xaq->xaq_lmt = xaq->nb_xaq - (nb_hwgrp * SSO_XAQ_CACHE_CNT); return 0; +npa_fill_fail: + roc_npa_pool_destroy(xaq->aura_handle); npa_fail: plt_free(xaq->mem); free_fc: