[3/7] net/ixgbe: Check that SFF-8472 soft rate select is supported before write
Checks
Commit Message
Make sure an SFP is really a SFF-8472 device that supports the optional
soft rate select feature before just blindly poking those I2C registers.
Skip all I2C traffic if we know there's no SFP.
Fixes: f3430431aba ("ixgbe/base: add SFP+ dual-speed support")
Cc: stable@dpdk.org
Signed-off-by: Stephen Douthit <stephend@silicom-usa.com>
---
drivers/net/ixgbe/base/ixgbe_common.c | 46 +++++++++++++++++++++++++++
drivers/net/ixgbe/base/ixgbe_phy.h | 3 ++
2 files changed, 49 insertions(+)
@@ -5371,6 +5371,7 @@ s32 ixgbe_setup_mac_link_multispeed_fiber(struct ixgbe_hw *hw,
void ixgbe_set_soft_rate_select_speed(struct ixgbe_hw *hw,
ixgbe_link_speed speed)
{
+ enum ixgbe_sfp_cage_status sfp_cage_status;
s32 status;
u8 rs, eeprom_data;
@@ -5387,6 +5388,51 @@ void ixgbe_set_soft_rate_select_speed(struct ixgbe_hw *hw,
return;
}
+ /* Can't set rate on missing devices, skip all I2C access */
+ sfp_cage_status = ixgbe_check_sfp_cage(hw);
+ if (sfp_cage_status == IXGBE_SFP_CAGE_EMPTY ||
+ sfp_cage_status == IXGBE_SFP_CAGE_NOCAGE) {
+ DEBUGOUT("No SFP\n");
+ return;
+ }
+
+ /* This only applies to SFF-8472 devices, so check that this device has
+ * a non-zero SFF8472 compliance code @ device 0xA0 byte 94
+ */
+ status = hw->phy.ops.read_i2c_eeprom(hw,
+ IXGBE_SFF_SFF_8472_COMP,
+ &eeprom_data);
+ if (status || !eeprom_data) {
+ DEBUGOUT("Not a SFF-8472 device\n");
+ goto out;
+ }
+
+ /* (read|write)_i2c_byte() don't support the address change mechanism
+ * outlined in section 8.9 "Addressing Modes" of SFF_8472, so if that
+ * is a requirement give up
+ */
+ status = hw->phy.ops.read_i2c_eeprom(hw,
+ IXGBE_SFF_SFF_8472_SWAP,
+ &eeprom_data);
+ if (status || (eeprom_data & IXGBE_SFF_ADDRESSING_MODE)) {
+ DEBUGOUT("Address change not supported\n");
+ goto out;
+ }
+ /* Digital diagnostic monitoring must be supported for rate select */
+ if (!(eeprom_data & IXGBE_SFF_DDM_IMPLEMENTED)) {
+ DEBUGOUT("DDM not implemented\n");
+ goto out;
+ }
+
+ /* Finally check if the optional rate select feature is implemented */
+ status = hw->phy.ops.read_i2c_eeprom(hw,
+ IXGBE_SFF_SFF_8472_EOPT,
+ &eeprom_data);
+ if (status || !(eeprom_data & IXGBE_SFF_HAVE_RS)) {
+ DEBUGOUT("Rate select not supported");
+ goto out;
+ }
+
/* Set RS0 */
status = hw->phy.ops.read_i2c_byte(hw, IXGBE_SFF_SFF_8472_OSCB,
IXGBE_I2C_EEPROM_DEV_ADDR2,
@@ -21,6 +21,7 @@
#define IXGBE_SFF_CABLE_TECHNOLOGY 0x8
#define IXGBE_SFF_CABLE_SPEC_COMP 0x3C
#define IXGBE_SFF_SFF_8472_SWAP 0x5C
+#define IXGBE_SFF_SFF_8472_EOPT 0x5D
#define IXGBE_SFF_SFF_8472_COMP 0x5E
#define IXGBE_SFF_SFF_8472_OSCB 0x6E
#define IXGBE_SFF_SFF_8472_ESCB 0x76
@@ -48,6 +49,8 @@
#define IXGBE_SFF_SOFT_RS_SELECT_10G 0x8
#define IXGBE_SFF_SOFT_RS_SELECT_1G 0x0
#define IXGBE_SFF_ADDRESSING_MODE 0x4
+#define IXGBE_SFF_DDM_IMPLEMENTED 0x40
+#define IXGBE_SFF_HAVE_RS 0x2
#define IXGBE_SFF_QSFP_DA_ACTIVE_CABLE 0x1
#define IXGBE_SFF_QSFP_DA_PASSIVE_CABLE 0x8
#define IXGBE_SFF_QSFP_CONNECTOR_NOT_SEPARABLE 0x23