[v4,03/11] raw/cnxk_gpio: support reading queue count

Message ID 20220105140020.1615256-4-tduszynski@marvell.com (mailing list archive)
State Superseded, archived
Delegated to: Thomas Monjalon
Headers
Series Add cnxk_gpio |

Checks

Context Check Description
ci/checkpatch success coding style OK

Commit Message

Tomasz Duszynski Jan. 5, 2022, 2 p.m. UTC
  Add support for reading number of available queues. Single queue
corresponds to GPIO.

Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com>
---
 drivers/raw/cnxk_gpio/cnxk_gpio.c | 9 +++++++++
 1 file changed, 9 insertions(+)
  

Patch

diff --git a/drivers/raw/cnxk_gpio/cnxk_gpio.c b/drivers/raw/cnxk_gpio/cnxk_gpio.c
index f80788f7fb..3455d6258c 100644
--- a/drivers/raw/cnxk_gpio/cnxk_gpio.c
+++ b/drivers/raw/cnxk_gpio/cnxk_gpio.c
@@ -156,8 +156,17 @@  cnxk_gpio_queue_def_conf(struct rte_rawdev *dev, uint16_t queue_id,
 	return 0;
 }
 
+static uint16_t
+cnxk_gpio_queue_count(struct rte_rawdev *dev)
+{
+	struct cnxk_gpiochip *gpiochip = dev->dev_private;
+
+	return gpiochip->num_gpios;
+}
+
 static const struct rte_rawdev_ops cnxk_gpio_rawdev_ops = {
 	.queue_def_conf = cnxk_gpio_queue_def_conf,
+	.queue_count = cnxk_gpio_queue_count,
 };
 
 static int