diff mbox series

[06/15] net/hns3: extract a function to handle reset fail

Message ID 20220107101558.39219-7-humin29@huawei.com (mailing list archive)
State Changes Requested, archived
Delegated to: Ferruh Yigit
Headers
Series fix and feature for hns3 PMD |

Checks

Context Check Description
ci/checkpatch warning coding style issues

Commit Message

humin (Q) Jan. 7, 2022, 10:15 a.m. UTC 
  From: Huisong Li <lihuisong@huawei.com>

Extract a function to handle reset fail for clearer code logic.

Signed-off-by: Huisong Li <lihuisong@huawei.com>
---
 drivers/net/hns3/hns3_intr.c | 54 +++++++++++++++++++++---------------
 1 file changed, 32 insertions(+), 22 deletions(-)
diff mbox series

Patch

diff --git a/drivers/net/hns3/hns3_intr.c b/drivers/net/hns3/hns3_intr.c
index 66dc509086..3ca2e1e338 100644
--- a/drivers/net/hns3/hns3_intr.c
+++ b/drivers/net/hns3/hns3_intr.c
@@ -2770,6 +2770,37 @@  hns3_reset_post(struct hns3_adapter *hns)
 	return -EIO;
 }
 
+static void
+hns3_reset_fail_handle(struct hns3_adapter *hns)
+{
+	struct hns3_hw *hw = &hns->hw;
+	struct timeval tv_delta;
+	struct timeval tv;
+
+	hns3_clear_reset_level(hw, &hw->reset.pending);
+	if (hns3_reset_err_handle(hns)) {
+		hw->reset.stage = RESET_STAGE_PREWAIT;
+		hns3_schedule_reset(hns);
+		return;
+	}
+
+	rte_spinlock_lock(&hw->lock);
+	if (hw->reset.mbuf_deferred_free) {
+		hns3_dev_release_mbufs(hns);
+		hw->reset.mbuf_deferred_free = false;
+	}
+	rte_spinlock_unlock(&hw->lock);
+	__atomic_store_n(&hns->hw.reset.resetting, 0, __ATOMIC_RELAXED);
+	hw->reset.stage = RESET_STAGE_NONE;
+	hns3_clock_gettime(&tv);
+	timersub(&tv, &hw->reset.start_time, &tv_delta);
+	hns3_warn(hw, "%s reset fail delta %" PRIu64 " ms time=%ld.%.6ld",
+		  reset_string[hw->reset.level],
+		  hns3_clock_calctime_ms(&tv_delta),
+		  tv.tv_sec, tv.tv_usec);
+	hw->reset.level = HNS3_NONE_RESET;
+}
+
 /*
  * There are three scenarios as follows:
  * When the reset is not in progress, the reset process starts.
@@ -2784,7 +2815,6 @@  int
 hns3_reset_process(struct hns3_adapter *hns, enum hns3_reset_level new_level)
 {
 	struct hns3_hw *hw = &hns->hw;
-	struct timeval tv_delta;
 	struct timeval tv;
 	int ret;
 
@@ -2843,27 +2873,7 @@  hns3_reset_process(struct hns3_adapter *hns, enum hns3_reset_level new_level)
 	if (ret == -EAGAIN)
 		return ret;
 err:
-	hns3_clear_reset_level(hw, &hw->reset.pending);
-	if (hns3_reset_err_handle(hns)) {
-		hw->reset.stage = RESET_STAGE_PREWAIT;
-		hns3_schedule_reset(hns);
-	} else {
-		rte_spinlock_lock(&hw->lock);
-		if (hw->reset.mbuf_deferred_free) {
-			hns3_dev_release_mbufs(hns);
-			hw->reset.mbuf_deferred_free = false;
-		}
-		rte_spinlock_unlock(&hw->lock);
-		__atomic_store_n(&hns->hw.reset.resetting, 0, __ATOMIC_RELAXED);
-		hw->reset.stage = RESET_STAGE_NONE;
-		hns3_clock_gettime(&tv);
-		timersub(&tv, &hw->reset.start_time, &tv_delta);
-		hns3_warn(hw, "%s reset fail delta %" PRIu64 " ms time=%ld.%.6ld",
-			  reset_string[hw->reset.level],
-			  hns3_clock_calctime_ms(&tv_delta),
-			  tv.tv_sec, tv.tv_usec);
-		hw->reset.level = HNS3_NONE_RESET;
-	}
+	hns3_reset_fail_handle(hns);
 
 	return -EIO;
 }