[v2,03/10] common/cnxk: fix byte order of frag sizes and infos

Message ID 20220121120424.28166-3-ndabilpuram@marvell.com (mailing list archive)
State Accepted, archived
Delegated to: Jerin Jacob
Headers
Series [v2,01/10] common/cnxk: fix shift offset for TL3 length disable |

Checks

Context Check Description
ci/checkpatch success coding style OK

Commit Message

Nithin Dabilpuram Jan. 21, 2022, 12:04 p.m. UTC
  Change the byte order of frag sizes and infos to match HW
implementation.

Fixes: 64a73ebd87bd ("common/cnxk: add CPT hardware definitions")
Cc: stable@dpdk.org

Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Signed-off-by: Vidya Sagar Velumuri <vvelumuri@marvell.com>
---
 drivers/common/cnxk/hw/cpt.h | 14 ++++++++------
 1 file changed, 8 insertions(+), 6 deletions(-)
  

Patch

diff --git a/drivers/common/cnxk/hw/cpt.h b/drivers/common/cnxk/hw/cpt.h
index 919f842..3ade4dc 100644
--- a/drivers/common/cnxk/hw/cpt.h
+++ b/drivers/common/cnxk/hw/cpt.h
@@ -286,10 +286,11 @@  struct cpt_frag_info_s {
 	union {
 		uint64_t u64;
 		struct {
-			union cpt_frag_info f3;
-			union cpt_frag_info f2;
-			union cpt_frag_info f1;
+			/* CPT HW swaps each 8B word implicitly */
 			union cpt_frag_info f0;
+			union cpt_frag_info f1;
+			union cpt_frag_info f2;
+			union cpt_frag_info f3;
 		};
 	} w0;
 
@@ -297,10 +298,11 @@  struct cpt_frag_info_s {
 	union {
 		uint64_t u64;
 		struct {
-			uint16_t frag_size3;
-			uint16_t frag_size2;
-			uint16_t frag_size1;
+			/* CPT HW swaps each 8B word implicitly */
 			uint16_t frag_size0;
+			uint16_t frag_size1;
+			uint16_t frag_size2;
+			uint16_t frag_size3;
 		};
 	} w1;
 };