diff mbox series

[v2,05/10] common/cnxk: always use single interrupt ID with NIX

Message ID 20220121120424.28166-5-ndabilpuram@marvell.com (mailing list archive)
State Accepted, archived
Delegated to: Jerin Jacob
Headers
Series [v2,01/10] common/cnxk: fix shift offset for TL3 length disable |

Checks

Context Check Description
ci/checkpatch success coding style OK

Commit Message

Nithin Dabilpuram Jan. 21, 2022, 12:04 p.m. UTC 
  From: Harman Kalra <hkalra@marvell.com>

An errata exists whereby, in certain cases NIX may use an
incorrect QINT_IDX for SQ interrupts. As a result, the
interrupt may not be delivered to software, or may not be
associated with the correct SQ.
When NIX uses an incorrect QINT_IDX :
1. NIX_LF_QINT(0..63)_CNT[COUNT] will be incremented for
incorrect QINT.
2. NIX_LF_QINT(0..63)_INT[INTR] will be set for incorrect
QINT.

Signed-off-by: Harman Kalra <hkalra@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
---
 drivers/common/cnxk/roc_nix_queue.c | 13 ++++++++++---
 1 file changed, 10 insertions(+), 3 deletions(-)

Comments

Kevin Traynor Jan. 21, 2022, 5:16 p.m. UTC | #1 
On 21/01/2022 12:04, Nithin Dabilpuram wrote:
> From: Harman Kalra<hkalra@marvell.com>
> 
> An errata exists whereby, in certain cases NIX may use an
> incorrect QINT_IDX for SQ interrupts. As a result, the
> interrupt may not be delivered to software, or may not be
> associated with the correct SQ.
> When NIX uses an incorrect QINT_IDX :
> 1. NIX_LF_QINT(0..63)_CNT[COUNT] will be incremented for
> incorrect QINT.
> 2. NIX_LF_QINT(0..63)_INT[INTR] will be set for incorrect
> QINT.
> 
> Signed-off-by: Harman Kalra<hkalra@marvell.com>
> Acked-by: Jerin Jacob<jerinj@marvell.com>
> ---

Patches 4/10 and 5/10 look like fixes, that should have Fixes: tags. 
Also, please mark them for stable if you would like them backported to LTS.
Jerin Jacob Jan. 23, 2022, 7:45 a.m. UTC | #2 
On Fri, Jan 21, 2022 at 10:46 PM Kevin Traynor <ktraynor@redhat.com> wrote:
>
> On 21/01/2022 12:04, Nithin Dabilpuram wrote:
> > From: Harman Kalra<hkalra@marvell.com>
> >
> > An errata exists whereby, in certain cases NIX may use an
> > incorrect QINT_IDX for SQ interrupts. As a result, the
> > interrupt may not be delivered to software, or may not be
> > associated with the correct SQ.
> > When NIX uses an incorrect QINT_IDX :
> > 1. NIX_LF_QINT(0..63)_CNT[COUNT] will be incremented for
> > incorrect QINT.
> > 2. NIX_LF_QINT(0..63)_INT[INTR] will be set for incorrect
> > QINT.
> >
> > Signed-off-by: Harman Kalra<hkalra@marvell.com>
> > Acked-by: Jerin Jacob<jerinj@marvell.com>
> > ---
>
> Patches 4/10 and 5/10 look like fixes, that should have Fixes: tags.
> Also, please mark them for stable if you would like them backported to LTS.

Added Fixes tag and CCed stable@dpdk.org and
Series applied to dpdk-next-net-mrvl/for-next-net. Thanks.


>
diff mbox series

Patch

diff --git a/drivers/common/cnxk/roc_nix_queue.c b/drivers/common/cnxk/roc_nix_queue.c
index c638cd4..80e1c9f 100644
--- a/drivers/common/cnxk/roc_nix_queue.c
+++ b/drivers/common/cnxk/roc_nix_queue.c
@@ -690,7 +690,11 @@  sq_cn9k_init(struct nix *nix, struct roc_nix_sq *sq, uint32_t rr_quantum,
 	aq->sq.sq_int_ena |= BIT(NIX_SQINT_MNQ_ERR);
 
 	/* Many to one reduction */
-	aq->sq.qint_idx = sq->qid % nix->qints;
+	/* Assigning QINT 0 to all the SQs, an errata exists where NIXTX can
+	 * send incorrect QINT_IDX when reporting queue interrupt (QINT). This
+	 * might result in software missing the interrupt.
+	 */
+	aq->sq.qint_idx = 0;
 }
 
 static int
@@ -789,8 +793,11 @@  sq_init(struct nix *nix, struct roc_nix_sq *sq, uint32_t rr_quantum,
 	aq->sq.sq_int_ena |= BIT(NIX_SQINT_SEND_ERR);
 	aq->sq.sq_int_ena |= BIT(NIX_SQINT_MNQ_ERR);
 
-	/* Many to one reduction */
-	aq->sq.qint_idx = sq->qid % nix->qints;
+	/* Assigning QINT 0 to all the SQs, an errata exists where NIXTX can
+	 * send incorrect QINT_IDX when reporting queue interrupt (QINT). This
+	 * might result in software missing the interrupt.
+	 */
+	aq->sq.qint_idx = 0;
 }
 
 static int