From patchwork Thu Jan 27 15:39:31 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michael Baum X-Patchwork-Id: 106620 X-Patchwork-Delegate: rasland@nvidia.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 37346A04A6; Thu, 27 Jan 2022 16:40:08 +0100 (CET) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 1551A427F0; Thu, 27 Jan 2022 16:40:03 +0100 (CET) Received: from NAM10-BN7-obe.outbound.protection.outlook.com (mail-bn7nam10on2074.outbound.protection.outlook.com [40.107.92.74]) by mails.dpdk.org (Postfix) with ESMTP id 098304067C; Thu, 27 Jan 2022 16:40:01 +0100 (CET) ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=kUZiwflqgb92MQu2yvg1l32RG/G+xBvXiSBgTf6y5XhO6NHnhsobsEP1StWh93zel15jVyB50s+IjGX2dzsXv+b9spbXnx/BgCXQ9vMSJferJElx3bU8/auHtUgTUBMauNCh+xNjNZv3Sd4bV/jzB824er1AdKcmpF/03EuLcx7mvEw+OSeWD1y0s1+mhCtwe0QHZ6MgLkHPYkZF7d3Dnpz4dvv31Ei3mbJk3hT737/C+xo251An8nJtJAbuvN9KXgse3LfiEd+Tg08Qu3bF3TlHgNo8P5l89bsTjNXOpT+EGRqyMvvT+NEI7xXB+ytRAhun5TNYcIIpQQ3jjuLPcQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=zBl7ZcS1lilodAgQ1G74nzHAFi1z71rz2FIB2O2RoaY=; b=l/GahmDe4lQRlOpsOiKlyjYvASbzPdg8aW/31svmjaDSyL+YS992XME4RSzJJYQ2qtP8UZZtz6llQsJzG7nEI/tOcd84MHDPwbcTTHHuBrd7GIM/+T1WxmSXb1wkdSNs9Eh8ZG5FblY2O07axHuPYeyIPzcpV2AKkAFYoIZ0bTbiwDitLdEX5Oc0wWWdMCow7jM9Bj9sL3ILWJ+foMVMyn6T3MOWayWGrnJOr4PAfvi3Bkj2hErY3FmGg7uWXA5B3QUSUCZUFlpwghbBaH1Tn9mzT7JjBIju0JpkQxjBiVEdHLTcjm+IACQvpyAxXEo259BMUw859g3RS4zzYsLSRQ== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 12.22.5.236) smtp.rcpttodomain=dpdk.org smtp.mailfrom=nvidia.com; dmarc=pass (p=reject sp=reject pct=100) action=none header.from=nvidia.com; dkim=none (message not signed); arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=Nvidia.com; s=selector2; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=zBl7ZcS1lilodAgQ1G74nzHAFi1z71rz2FIB2O2RoaY=; b=FcHJhcTUpAu1bScbpK3AP0dq8Y/nyvQR2hMHHofm6zKxaoHkPSYqebJzYI9f+zCxdEqx5s5Oi68sSICgkRnES8cQIfKwiZ94RrsgqgEaCuRgfCWz0/UfbpCOHF59U68/tquet6QZz5w9BysIBDtZNj2zwL/yInFZ0bIo01PyUjoUMxLR3bXLbAYdLxAZu6nOReVJu3CVzBKyc6OPsbos3wkNsplZHTcX5hXEzZtm8jfz0D6prv+4Zikf8t+vndeJrSd4nX28al8cxd+tgKa2BwHQpnAWYDUZNYhYlKJxKtiHfBjKCwwS1LtFCNPIwziNmaAQnwoXPHqSp0jTY16UxA== Received: from BN0PR08CA0010.namprd08.prod.outlook.com (2603:10b6:408:142::11) by CH2PR12MB4857.namprd12.prod.outlook.com (2603:10b6:610:64::9) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4930.15; Thu, 27 Jan 2022 15:39:59 +0000 Received: from BN8NAM11FT051.eop-nam11.prod.protection.outlook.com (2603:10b6:408:142:cafe::66) by BN0PR08CA0010.outlook.office365.com (2603:10b6:408:142::11) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4930.15 via Frontend Transport; Thu, 27 Jan 2022 15:39:59 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 12.22.5.236) smtp.mailfrom=nvidia.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=nvidia.com; Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 12.22.5.236 as permitted sender) receiver=protection.outlook.com; client-ip=12.22.5.236; helo=mail.nvidia.com; Received: from mail.nvidia.com (12.22.5.236) by BN8NAM11FT051.mail.protection.outlook.com (10.13.177.66) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.20.4930.15 via Frontend Transport; Thu, 27 Jan 2022 15:39:58 +0000 Received: from drhqmail202.nvidia.com (10.126.190.181) by DRHQMAIL109.nvidia.com (10.27.9.19) with Microsoft SMTP Server (TLS) id 15.0.1497.18; Thu, 27 Jan 2022 15:39:58 +0000 Received: from drhqmail202.nvidia.com (10.126.190.181) by drhqmail202.nvidia.com (10.126.190.181) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.9; Thu, 27 Jan 2022 07:39:58 -0800 Received: from nvidia.com (10.127.8.13) by mail.nvidia.com (10.126.190.181) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.9 via Frontend Transport; Thu, 27 Jan 2022 07:39:56 -0800 From: Michael Baum To: CC: Matan Azrad , Raslan Darawsheh , Viacheslav Ovsiienko , Subject: [PATCH 01/20] net/mlx5: fix wrong check sibling device config mismatch Date: Thu, 27 Jan 2022 17:39:31 +0200 Message-ID: <20220127153950.812953-2-michaelba@nvidia.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220127153950.812953-1-michaelba@nvidia.com> References: <20220127153950.812953-1-michaelba@nvidia.com> MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: a6e2e11f-1840-4967-9237-08d9e1ab468d X-MS-TrafficTypeDiagnostic: CH2PR12MB4857:EE_ X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:5797; X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: EiFgp2pdeJ0/lgJzMCX0K3B60bky11pvD9z6wcR2WKT+9rhymXJdtzhOGNbhJ6ikHxS287K/j55RBPQ3oLMCbn5KG2dAv3RgW/cIu8jnMcYlOrNPK3mKnU/MuRq9kfNXF99wTj8dh3wXiwi7EAgA7l+Pc29AbgmpqZFvIypqfpcqQm694/BJdgEhVi9lhaAaEfftqpLipc3bgfZKwRcKd6bMafOm6fOQWlDpnEEbA4P3G0BuBNTiEFOcltmirKD9i/XlCRgJJrz8RVEJZ32Njklu9caatpy1A4hY2T7vK9+VW+vLVQxrCzPehvvbGelSvhx5iCnpVC9R2aORKABUv+OO21M/40fxpjvc6CaZhPlN5o5xe38aNMoOfStjOodj/OcpYdBZalh+n/LIXmlstMmlaIbKhLJkO8xhqMGMIxn33GOUb+iaXV7v3VLE0DCVyA8E9qeGkGRN/vOrtliWuW1h725PjNHf1UDzOmXZAdhB1/ZMLI/h+dA6ReHSx/9WWuzfAdFTBOL1vMlLEjLXpFz42NuyfvDUmDoelbft18g9gTOIC1xOG6+oVim/aoxppSr5VOpXPhsoZ+pviTWMXt+BQS+MQGc/iOYK6IZXyiWtaBD337B795defefZhinC2TbJU9ATu1V+2PtW6c7pGBv6dwqo3cewT8ZrnT2Sr4yVcI3S5FfJBb3PGWUrxWNVrXx/bCByFqUSRoWk5IhWVQ== X-Forefront-Antispam-Report: CIP:12.22.5.236; CTRY:US; LANG:en; SCL:1; SRV:; IPV:CAL; SFV:NSPM; H:mail.nvidia.com; PTR:InfoNoRecords; CAT:NONE; SFS:(13230001)(4636009)(40470700004)(36840700001)(46966006)(26005)(1076003)(2616005)(6286002)(186003)(426003)(8676002)(450100002)(316002)(336012)(70206006)(83380400001)(8936002)(2906002)(70586007)(55016003)(81166007)(40460700003)(86362001)(36756003)(6666004)(5660300002)(82310400004)(47076005)(356005)(6916009)(508600001)(4326008)(7696005)(36860700001)(54906003)(36900700001)(20210929001); DIR:OUT; SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 27 Jan 2022 15:39:58.7101 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: a6e2e11f-1840-4967-9237-08d9e1ab468d X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[12.22.5.236]; Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BN8NAM11FT051.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CH2PR12MB4857 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org The MLX5 net driver supports "probe again". In probing again, it creates a new ethdev under an existing infiniband device context. Sibling devices sharing infiniband device context should have compatible configurations, so some of the devargs given in the probe again, the ones that are mainly relevant to the sharing device context are sent to the mlx5_dev_check_sibling_config function which makes sure that they compatible its siblings. However, the arguments are adjusted according to the capability of the device, and the function compares the arguments of the probe again before the adjustment with the arguments of the siblings after the adjustment. A user who sends the same values to all siblings may fail in this comparison if he requested something that the device does not support and adjusted. This patch moves the call to the mlx5_dev_check_sibling_config function after the relevant adjustments. Fixes: 92d5dd483450 ("net/mlx5: check sibling device configurations mismatch") Fixes: 2d241515ebaf ("net/mlx5: add devarg for extensive metadata support") Cc: stable@dpdk.org Signed-off-by: Michael Baum Acked-by: Matan Azrad --- drivers/net/mlx5/linux/mlx5_os.c | 41 ++++++++++++++++-------------- drivers/net/mlx5/windows/mlx5_os.c | 28 ++++++++++++-------- 2 files changed, 39 insertions(+), 30 deletions(-) diff --git a/drivers/net/mlx5/linux/mlx5_os.c b/drivers/net/mlx5/linux/mlx5_os.c index aecdc5a68a..de0bb87460 100644 --- a/drivers/net/mlx5/linux/mlx5_os.c +++ b/drivers/net/mlx5/linux/mlx5_os.c @@ -1241,6 +1241,28 @@ mlx5_dev_spawn(struct rte_device *dpdk_dev, } /* Override some values set by hardware configuration. */ mlx5_args(config, dpdk_dev->devargs); + /* Update final values for devargs before check sibling config. */ +#if !defined(HAVE_IBV_FLOW_DV_SUPPORT) || !defined(HAVE_MLX5DV_DR) + if (config->dv_flow_en) { + DRV_LOG(WARNING, "DV flow is not supported."); + config->dv_flow_en = 0; + } +#endif +#ifdef HAVE_MLX5DV_DR_ESWITCH + if (!(sh->cdev->config.hca_attr.eswitch_manager && config->dv_flow_en && + (switch_info->representor || switch_info->master))) + config->dv_esw_en = 0; +#else + config->dv_esw_en = 0; +#endif + if (!priv->config.dv_esw_en && + priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) { + DRV_LOG(WARNING, + "Metadata mode %u is not supported (no E-Switch).", + priv->config.dv_xmeta_en); + priv->config.dv_xmeta_en = MLX5_XMETA_MODE_LEGACY; + } + /* Check sibling device configurations. */ err = mlx5_dev_check_sibling_config(priv, config, dpdk_dev); if (err) goto error; @@ -1251,12 +1273,6 @@ mlx5_dev_spawn(struct rte_device *dpdk_dev, #if !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V42) && \ !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V45) DRV_LOG(DEBUG, "counters are not supported"); -#endif -#if !defined(HAVE_IBV_FLOW_DV_SUPPORT) || !defined(HAVE_MLX5DV_DR) - if (config->dv_flow_en) { - DRV_LOG(WARNING, "DV flow is not supported"); - config->dv_flow_en = 0; - } #endif config->ind_table_max_size = sh->device_attr.max_rwq_indirection_table_size; @@ -1652,13 +1668,6 @@ mlx5_dev_spawn(struct rte_device *dpdk_dev, * Verbs context returned by ibv_open_device(). */ mlx5_link_update(eth_dev, 0); -#ifdef HAVE_MLX5DV_DR_ESWITCH - if (!(config->hca_attr.eswitch_manager && config->dv_flow_en && - (switch_info->representor || switch_info->master))) - config->dv_esw_en = 0; -#else - config->dv_esw_en = 0; -#endif /* Detect minimal data bytes to inline. */ mlx5_set_min_inline(spawn, config); /* Store device configuration on private structure. */ @@ -1725,12 +1734,6 @@ mlx5_dev_spawn(struct rte_device *dpdk_dev, err = -err; goto error; } - if (!priv->config.dv_esw_en && - priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) { - DRV_LOG(WARNING, "metadata mode %u is not supported " - "(no E-Switch)", priv->config.dv_xmeta_en); - priv->config.dv_xmeta_en = MLX5_XMETA_MODE_LEGACY; - } mlx5_set_metadata_mask(eth_dev); if (priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY && !priv->sh->dv_regc0_mask) { diff --git a/drivers/net/mlx5/windows/mlx5_os.c b/drivers/net/mlx5/windows/mlx5_os.c index ac0af0ff7d..8eb53f2cb7 100644 --- a/drivers/net/mlx5/windows/mlx5_os.c +++ b/drivers/net/mlx5/windows/mlx5_os.c @@ -439,6 +439,21 @@ mlx5_dev_spawn(struct rte_device *dpdk_dev, } /* Override some values set by hardware configuration. */ mlx5_args(config, dpdk_dev->devargs); + /* Update final values for devargs before check sibling config. */ + config->dv_esw_en = 0; + if (!config->dv_flow_en) { + DRV_LOG(ERR, "Windows flow mode must be DV flow enable."); + err = ENOTSUP; + goto error; + } + if (!priv->config.dv_esw_en && + priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) { + DRV_LOG(WARNING, + "Metadata mode %u is not supported (no E-Switch).", + priv->config.dv_xmeta_en); + priv->config.dv_xmeta_en = MLX5_XMETA_MODE_LEGACY; + } + /* Check sibling device configurations. */ err = mlx5_dev_check_sibling_config(priv, config, dpdk_dev); if (err) goto error; @@ -600,7 +615,6 @@ mlx5_dev_spawn(struct rte_device *dpdk_dev, * Verbs context returned by ibv_open_device(). */ mlx5_link_update(eth_dev, 0); - config->dv_esw_en = 0; /* Detect minimal data bytes to inline. */ mlx5_set_min_inline(spawn, config); /* Store device configuration on private structure. */ @@ -622,12 +636,6 @@ mlx5_dev_spawn(struct rte_device *dpdk_dev, } /* No supported flow priority number detection. */ priv->sh->flow_max_priority = -1; - if (!priv->config.dv_esw_en && - priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) { - DRV_LOG(WARNING, "metadata mode %u is not supported " - "(no E-Switch)", priv->config.dv_xmeta_en); - priv->config.dv_xmeta_en = MLX5_XMETA_MODE_LEGACY; - } mlx5_set_metadata_mask(eth_dev); if (priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY && !priv->sh->dv_regc0_mask) { @@ -661,12 +669,10 @@ mlx5_dev_spawn(struct rte_device *dpdk_dev, goto error; } } - if (sh->devx && config->dv_flow_en) { + if (sh->devx) { priv->obj_ops = devx_obj_ops; } else { - DRV_LOG(ERR, "Flow mode %u is not supported " - "(Windows flow must be DevX with DV flow enabled).", - priv->config.dv_flow_en); + DRV_LOG(ERR, "Windows flow must be DevX."); err = ENOTSUP; goto error; }