From patchwork Mon Jan 31 12:30:25 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tejasree Kondoj X-Patchwork-Id: 106733 X-Patchwork-Delegate: gakhil@marvell.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 972D3A04A2; Mon, 31 Jan 2022 12:38:58 +0100 (CET) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 7E0CC4116D; Mon, 31 Jan 2022 12:38:58 +0100 (CET) Received: from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com [67.231.148.174]) by mails.dpdk.org (Postfix) with ESMTP id 129744116D for ; Mon, 31 Jan 2022 12:38:55 +0100 (CET) Received: from pps.filterd (m0045849.ppops.net [127.0.0.1]) by mx0a-0016f401.pphosted.com (8.16.1.2/8.16.1.2) with ESMTP id 20V3Y3He028297 for ; Mon, 31 Jan 2022 03:38:55 -0800 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=pfpt0220; bh=7vau/jjYlt4CqwjHDl6k3zQrf8vgxCVVZFv4rTAGKXo=; b=E6CHI1XJ7xeAWCEIHshYqjTJMUeKZYXeucdd0mxSqfifDRv+78C2ZtoE9ozZnW+mB7MZ T0ugUyTcKXfTuLC3YpzBjrJOKAc1XWM1Ng+8R9GyW41FAoT9dpfTTI8slqPjpZjusHnJ tjXGz6B7H00F8wi/YwqUYm5F406epfSXeKzpPFd6j+kL+VFf+whbsxFa4SB2VY/up03W Mdq2urdZ1dR+XNHiZZuiSDAe/FJLoqzyolsdu98zfHnOsWePJQ0yYfBBRS42/YWocsgt dOO6/Vr4/bMMyEUiY4ffTro2CKBMq2j1TKtJgzldH8oWasJ6/Xm2ulQjl4miZmDBQ4/N GA== Received: from dc5-exch01.marvell.com ([199.233.59.181]) by mx0a-0016f401.pphosted.com (PPS) with ESMTPS id 3dx1pa1n23-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT) for ; Mon, 31 Jan 2022 03:38:55 -0800 Received: from DC5-EXCH01.marvell.com (10.69.176.38) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Mon, 31 Jan 2022 03:38:53 -0800 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Mon, 31 Jan 2022 03:38:53 -0800 Received: from hyd1554T5810.caveonetworks.com.com (unknown [10.29.57.11]) by maili.marvell.com (Postfix) with ESMTP id 474DB5B6944; Mon, 31 Jan 2022 03:38:51 -0800 (PST) From: Tejasree Kondoj To: Akhil Goyal CC: Anoob Joseph , Ankur Dwivedi , Archana Muniganti , Tejasree Kondoj , Subject: [PATCH 1/5] common/cnxk: add err ctl Date: Mon, 31 Jan 2022 18:00:25 +0530 Message-ID: <20220131123029.4024-2-ktejasree@marvell.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20220131123029.4024-1-ktejasree@marvell.com> References: <20220131123029.4024-1-ktejasree@marvell.com> MIME-Version: 1.0 X-Proofpoint-ORIG-GUID: 5H5u4Sr8QCwDh40XkIiserbh-TqNzdPT X-Proofpoint-GUID: 5H5u4Sr8QCwDh40XkIiserbh-TqNzdPT X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.816,Hydra:6.0.425,FMLib:17.11.62.513 definitions=2022-01-31_04,2022-01-28_01,2021-12-02_01 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org From: Anoob Joseph Add err ctl field in SA context. Signed-off-by: Anoob Joseph --- drivers/common/cnxk/cnxk_security.c | 6 ++++-- drivers/common/cnxk/roc_ie_ot.h | 17 ++++++++++++++++- 2 files changed, 20 insertions(+), 3 deletions(-) diff --git a/drivers/common/cnxk/cnxk_security.c b/drivers/common/cnxk/cnxk_security.c index 6ebf0846f5..035d61180a 100644 --- a/drivers/common/cnxk/cnxk_security.c +++ b/drivers/common/cnxk/cnxk_security.c @@ -500,8 +500,10 @@ cnxk_ot_ipsec_outb_sa_fill(struct roc_ot_ipsec_outb_sa *sa, offset = offsetof(struct roc_ot_ipsec_outb_sa, ctx); /* Word offset for HW managed SA field */ sa->w0.s.hw_ctx_off = offset / 8; - /* Context push size is up to hmac_opad_ipad */ - sa->w0.s.ctx_push_size = sa->w0.s.hw_ctx_off; + + /* Context push size is up to err ctl in HW ctx */ + sa->w0.s.ctx_push_size = sa->w0.s.hw_ctx_off + 1; + /* Entire context size in 128B units */ offset = sizeof(struct roc_ot_ipsec_outb_sa); sa->w0.s.ctx_size = (PLT_ALIGN_CEIL(offset, ROC_CTX_UNIT_128B) / diff --git a/drivers/common/cnxk/roc_ie_ot.h b/drivers/common/cnxk/roc_ie_ot.h index 923656f4a5..c502c7983f 100644 --- a/drivers/common/cnxk/roc_ie_ot.h +++ b/drivers/common/cnxk/roc_ie_ot.h @@ -153,6 +153,13 @@ enum { ROC_IE_OT_REAS_STS_L3P_ERR = 8, ROC_IE_OT_REAS_STS_MAX = 9 }; + +enum { + ROC_IE_OT_ERR_CTL_MODE_NONE = 0, + ROC_IE_OT_ERR_CTL_MODE_CLEAR = 1, + ROC_IE_OT_ERR_CTL_MODE_RING = 2, +}; + /* Context units in bytes */ #define ROC_CTX_UNIT_8B 8 #define ROC_CTX_UNIT_128B 128 @@ -235,7 +242,15 @@ union roc_ot_ipsec_outb_iv { }; struct roc_ot_ipsec_outb_ctx_update_reg { - uint64_t rsvd; + union { + struct { + uint64_t reserved_0_2 : 3; + uint64_t address : 57; + uint64_t mode : 4; + } s; + uint64_t u64; + } err_ctl; + uint64_t esn_val; uint64_t hard_life; uint64_t soft_life;