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Tue, 22 Feb 2022 04:48:22 -0800 From: Michael Baum To: CC: Matan Azrad , Raslan Darawsheh , Viacheslav Ovsiienko , Subject: [PATCH 1/5] doc: remove obsolete explanations from mlx5 guide Date: Tue, 22 Feb 2022 14:48:11 +0200 Message-ID: <20220222124815.2587851-2-michaelba@nvidia.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220222124815.2587851-1-michaelba@nvidia.com> References: <20220222124815.2587851-1-michaelba@nvidia.com> MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: ef703807-ce59-4c43-ba0b-08d9f6019fa9 X-MS-TrafficTypeDiagnostic: BL0PR12MB4865:EE_ X-Microsoft-Antispam-PRVS: X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: tKVN+3+GicsDuz2Gyunt5PglSEJGttpDs8zWXLwFT9YWmhmTnxZIGKdAZUuVFXY5LX42qmblU6MDFpUhnWujfX5Xhi9a9fB9c7fT8dWTARkLR0Hv/LMuWxUEtj7EAFke1POoKgIcwaZkj/w5S5jjH/rBnJvk+yODF1qQmL2mHdfyVQKRFTs16xDOB4Ofd92FyxRXY3tuhcV0L6S66IfFncf4eZMAo0p88xgwThA/tCgqHru6RcLh1+w+1MvQxpYJDGA5SoPbjZ5l1pMTw0PtZctU4xUJMuMqvrjsHedkglIz6nemnjgUh/pGNIM8kTiz3Z8rNLl9ZulIXkU2b4h9n9Fk+Z1qBGWMu61FEZGfXvdtlCvnbGaramuO7wrGQXbc02UcWAdEBvijnLOf/hgfxpFyc0BKEjif/GFLit0Xf2QyCsrio4bRfAOwbNp+VwSKj0KNWpvlxgtqgh+eEBEyKtG3+IfpLKJgDNebSMLIARKb9pjem4vtLy+Dh+VHxy1XEbNye+z6JcyV9JsZwbwzOl2HEAFjFAVu42IKVl/NbUL/+ecxaSKj3XlOuAy4V+biWWFInNnE7MktPdHepJHE16ZuFBp3NpZ5bwWkzoqmyjTVU9lLiL5jJctSQe6Gx1d0zTOhkjRcPK48GbuMWuhZgS6f0z3oJEg8qaJ/v05+P+Q443ViNUkYZIEc+Be/qIUQ+mfuLP7/e/9wHjHdyypeXw== X-Forefront-Antispam-Report: CIP:12.22.5.236; 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However, more updating should have been done. In environment variables doc, there was explanation according to vectorized Tx which isn't relevant anymore. This patch removes this irrelevant explanation. Fixes: a6bd4911ad93 ("net/mlx5: remove Tx implementation") Cc: stable@dpdk.org Signed-off-by: Michael Baum Acked-by: Viacheslav Ovsiienko --- doc/guides/nics/mlx5.rst | 9 --------- 1 file changed, 9 deletions(-) diff --git a/doc/guides/nics/mlx5.rst b/doc/guides/nics/mlx5.rst index c3cc0c0f41..3f5c8bb303 100644 --- a/doc/guides/nics/mlx5.rst +++ b/doc/guides/nics/mlx5.rst @@ -557,15 +557,6 @@ Environment variables The register would be flushed to HW usually when the write-combining buffer becomes full, but it depends on CPU design. - Except for vectorized Tx burst routines, a write memory barrier is enforced - after updating the register so that the update can be immediately visible to - HW. - - When vectorized Tx burst is called, the barrier is set only if the burst size - is not aligned to MLX5_VPMD_TX_MAX_BURST. However, setting this environmental - variable will bring better latency even though the maximum throughput can - slightly decline. - Run-time configuration ~~~~~~~~~~~~~~~~~~~~~~