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Tue, 1 Mar 2022 23:58:36 -0800 From: Michael Baum To: CC: Matan Azrad , Raslan Darawsheh , Viacheslav Ovsiienko Subject: [PATCH v2 2/2] net/mlx5: fix external RQ referencing Date: Wed, 2 Mar 2022 09:58:23 +0200 Message-ID: <20220302075823.4141453-3-michaelba@nvidia.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220302075823.4141453-1-michaelba@nvidia.com> References: <20220302074801.4140079-1-michaelba@nvidia.com> <20220302075823.4141453-1-michaelba@nvidia.com> MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 31527b2a-9fc8-4183-0669-08d9fc227666 X-MS-TrafficTypeDiagnostic: CH2PR12MB3750:EE_ X-Microsoft-Antispam-PRVS: X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: qtJ4Yts0cBGLSeW71zIZhm0caPkmZcEOCf62XhYK8VSC0gVGkHexvB3Yl+7fNwxGjRr9NNUiUuxSW7ocFRgm/iEcM2CQYcwjhs/eU8B5SLm8ymzA8vVkbNBbrR8tB9ULTFA6/inOQFR4WTtIPGDWdvcMOPAilQWNYSdFLRAcmx/ziovVH0mUl7yi+gTquyW8NBIsorevIvTld9bK5tdLXwOqVKpwZwAFOrZArfPKqSsi1XeiePTH+dSrH8X8Zn2mL8+H5Hn7HON1GZlMEYurcE8a5d2q4yd+nBqw0fUHYkjhUxpI1L3K7BPhrs/1FyURYs279vQKBehkgXZIVvhQGqH4Kh/gRZBjSpfs9VEAJ+HXv76bsMEF4/v0nc1cYQKxp2vWUOLGhwr5ljhkik53/EJNWWKpSiA6N9CbcjLNtyssRCnFNRY12W13CivagZKeANSZQEWtwXe6ikT20kmg4x1EopZrqvCLPntrrV8gQ70vinsLbO9JQWB/NS4ZyOSmI6+38NhAr6Dw/AFDxJh4A01WUvv370oq3tcR/abLVPgAnrS56gig0Q+iNa9h11VkPahTElDV9TlUtBYVpeqrEPZ1BlVJ7hDW31nyB8FsKTCKRUuqKpYwc/+DJwHXM2oKQz4MqunFoT2gE/Ar928GkXZ9OHQFXT6hUsFxFoxz7cxwmQj637MEafKV2YapDCBWPqdz4lzawThmBP0PlEo8aw== X-Forefront-Antispam-Report: CIP:12.22.5.234; CTRY:US; LANG:en; SCL:1; SRV:; IPV:CAL; SFV:NSPM; H:mail.nvidia.com; PTR:InfoNoRecords; CAT:NONE; SFS:(13230001)(4636009)(40470700004)(36840700001)(46966006)(86362001)(8936002)(508600001)(5660300002)(70206006)(82310400004)(4326008)(8676002)(70586007)(55016003)(54906003)(6916009)(316002)(83380400001)(6666004)(81166007)(356005)(36860700001)(47076005)(7696005)(426003)(336012)(2616005)(40460700003)(6286002)(186003)(26005)(107886003)(1076003)(2906002)(36756003)(36900700001); DIR:OUT; SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 02 Mar 2022 07:58:39.4027 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 31527b2a-9fc8-4183-0669-08d9fc227666 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[12.22.5.234]; Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: DM6NAM11FT014.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CH2PR12MB3750 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org When an indirection table object is modified, it updates the reference counter for each RX queue related to it. The reference counter for regular queues are indeed updated. However, the reference counter for external RxQs are not. This patch adds updating for external RxQs too. Fixes: 311b17e669ab ("net/mlx5: support queue/RSS actions for external Rx queue") Signed-off-by: Michael Baum Acked-by: Matan Azrad --- drivers/net/mlx5/mlx5_rxq.c | 121 +++++++++++++++++++++--------------- 1 file changed, 70 insertions(+), 51 deletions(-) diff --git a/drivers/net/mlx5/mlx5_rxq.c b/drivers/net/mlx5/mlx5_rxq.c index 19c75b7b32..f16795bac3 100644 --- a/drivers/net/mlx5/mlx5_rxq.c +++ b/drivers/net/mlx5/mlx5_rxq.c @@ -2167,6 +2167,41 @@ mlx5_rxqs_deref(struct rte_eth_dev *dev, uint16_t *queues, } } +/** + * Increase reference count for list of Rx queues. + * + * @param dev + * Pointer to Ethernet device. + * @param queues + * List of Rx queues to ref. + * @param queues_n + * Number of queues in the array. + * + * @return + * 0 on success, a negative errno value otherwise and rte_errno is set. + */ +static int +mlx5_rxqs_ref(struct rte_eth_dev *dev, uint16_t *queues, + const uint32_t queues_n) +{ + uint32_t i; + + for (i = 0; i != queues_n; ++i) { + if (mlx5_is_external_rxq(dev, queues[i])) { + if (mlx5_ext_rxq_ref(dev, queues[i]) == NULL) + goto error; + } else { + if (mlx5_rxq_ref(dev, queues[i]) == NULL) + goto error; + } + } + return 0; +error: + mlx5_rxqs_deref(dev, queues, i); + rte_errno = EINVAL; + return -rte_errno; +} + /** * Release a Rx queue. * @@ -2464,41 +2499,30 @@ mlx5_ind_table_obj_setup(struct rte_eth_dev *dev, { struct mlx5_priv *priv = dev->data->dev_private; uint32_t queues_n = ind_tbl->queues_n; - uint16_t *queues = ind_tbl->queues; - unsigned int i = 0; - int ret = 0, err; + int ret; const unsigned int n = rte_is_power_of_2(queues_n) ? log2above(queues_n) : log2above(priv->sh->dev_cap.ind_table_max_size); - if (ref_qs) - for (i = 0; i != queues_n; ++i) { - if (mlx5_is_external_rxq(dev, queues[i])) { - if (mlx5_ext_rxq_ref(dev, queues[i]) == NULL) { - ret = -rte_errno; - goto error; - } - } else { - if (mlx5_rxq_ref(dev, queues[i]) == NULL) { - ret = -rte_errno; - goto error; - } - } - } + if (ref_qs && mlx5_rxqs_ref(dev, ind_tbl->queues, queues_n) < 0) { + DRV_LOG(DEBUG, "Port %u invalid indirection table queues.", + dev->data->port_id); + return -rte_errno; + } ret = priv->obj_ops.ind_table_new(dev, n, ind_tbl); - if (ret) - goto error; + if (ret) { + DRV_LOG(DEBUG, "Port %u cannot create a new indirection table.", + dev->data->port_id); + if (ref_qs) { + int err = rte_errno; + + mlx5_rxqs_deref(dev, ind_tbl->queues, queues_n); + rte_errno = err; + } + return ret; + } __atomic_fetch_add(&ind_tbl->refcnt, 1, __ATOMIC_RELAXED); return 0; -error: - if (ref_qs) { - err = rte_errno; - mlx5_rxqs_deref(dev, queues, i); - rte_errno = err; - } - DRV_LOG(DEBUG, "Port %u cannot setup indirection table.", - dev->data->port_id); - return ret; } /** @@ -2603,8 +2627,7 @@ mlx5_ind_table_obj_modify(struct rte_eth_dev *dev, bool standalone, bool ref_new_qs, bool deref_old_qs) { struct mlx5_priv *priv = dev->data->dev_private; - unsigned int i = 0, j; - int ret = 0, err; + int ret; const unsigned int n = rte_is_power_of_2(queues_n) ? log2above(queues_n) : log2above(priv->sh->dev_cap.ind_table_max_size); @@ -2613,33 +2636,29 @@ mlx5_ind_table_obj_modify(struct rte_eth_dev *dev, RTE_SET_USED(standalone); if (mlx5_ind_table_obj_check_standalone(dev, ind_tbl) < 0) return -rte_errno; - if (ref_new_qs) - for (i = 0; i != queues_n; ++i) { - if (!mlx5_rxq_ref(dev, queues[i])) { - ret = -rte_errno; - goto error; - } - } + if (ref_new_qs && mlx5_rxqs_ref(dev, queues, queues_n) < 0) { + DRV_LOG(DEBUG, "Port %u invalid indirection table queues.", + dev->data->port_id); + return -rte_errno; + } MLX5_ASSERT(priv->obj_ops.ind_table_modify); ret = priv->obj_ops.ind_table_modify(dev, n, queues, queues_n, ind_tbl); - if (ret) - goto error; + if (ret) { + DRV_LOG(DEBUG, "Port %u cannot modify indirection table.", + dev->data->port_id); + if (ref_new_qs) { + int err = rte_errno; + + mlx5_rxqs_deref(dev, queues, queues_n); + rte_errno = err; + } + return ret; + } if (deref_old_qs) - for (i = 0; i < ind_tbl->queues_n; i++) - claim_nonzero(mlx5_rxq_deref(dev, ind_tbl->queues[i])); + mlx5_rxqs_deref(dev, ind_tbl->queues, ind_tbl->queues_n); ind_tbl->queues_n = queues_n; ind_tbl->queues = queues; return 0; -error: - if (ref_new_qs) { - err = rte_errno; - for (j = 0; j < i; j++) - mlx5_rxq_deref(dev, queues[j]); - rte_errno = err; - } - DRV_LOG(DEBUG, "Port %u cannot setup indirection table.", - dev->data->port_id); - return ret; } /**