diff mbox series

[v1] net/i40e: fix build issue with 16B descriptor on Arm

Message ID 20220304073517.2000817-1-joyce.kong@arm.com (mailing list archive)
State Accepted, archived
Delegated to: Thomas Monjalon
Headers
Series [v1] net/i40e: fix build issue with 16B descriptor on Arm |

Checks

Context Check Description
ci/checkpatch success coding style OK
ci/iol-broadcom-Functional success Functional Testing PASS
ci/iol-mellanox-Performance success Performance Testing PASS
ci/iol-intel-Functional success Functional Testing PASS
ci/iol-broadcom-Performance success Performance Testing PASS
ci/iol-intel-Performance success Performance Testing PASS
ci/Intel-compilation success Compilation OK
ci/github-robot: build success github build: passed
ci/intel-Testing success Testing PASS
ci/iol-aarch64-unit-testing success Testing PASS
ci/iol-x86_64-unit-testing success Testing PASS
ci/iol-x86_64-compile-testing success Testing PASS
ci/iol-aarch64-compile-testing success Testing PASS
ci/iol-abi-testing success Testing PASS

Commit Message

Joyce Kong March 4, 2022, 7:35 a.m. UTC 
  For NEON vector path, there is an issue when building
with 16B descriptor:
incompatible types when assigning to type ‘uint64x2_t’
from type ‘uint32x4_t’
180 |  descs[3] = vbslq_u32(v_desc3_mask, v_zeros,
			vreinterpretq_u32_u64(descs[3]));
    |             ^~~~~~~~~

The fix is to add interpretation between type 'uint64x2_t'
and type 'uint32x4_t'.

Fixes: dba9e3bcd9bb ("net/i40e: add flow mark capability to NEON Rx")

Signed-off-by: Joyce Kong <joyce.kong@arm.com>
Reviewed-by: Ruifeng Wang <ruifeng.wang@arm.com>
---
 drivers/net/i40e/i40e_rxtx_vec_neon.c | 12 ++++++++----
 1 file changed, 8 insertions(+), 4 deletions(-)

Comments

Qi Zhang March 8, 2022, 11:24 p.m. UTC | #1 
> -----Original Message-----
> From: Joyce Kong <joyce.kong@arm.com>
> Sent: Friday, March 4, 2022 3:35 PM
> To: Ruifeng Wang <ruifeng.wang@arm.com>; Xing, Beilei
> <beilei.xing@intel.com>; Joyce Kong <joyce.kong@arm.com>
> Cc: dev@dpdk.org; nd@arm.com
> Subject: [PATCH v1] net/i40e: fix build issue with 16B descriptor on Arm
> 
> For NEON vector path, there is an issue when building with 16B descriptor:
> incompatible types when assigning to type ‘uint64x2_t’
> from type ‘uint32x4_t’
> 180 |  descs[3] = vbslq_u32(v_desc3_mask, v_zeros,
> 			vreinterpretq_u32_u64(descs[3]));
>     |             ^~~~~~~~~
> 
> The fix is to add interpretation between type 'uint64x2_t'
> and type 'uint32x4_t'.
> 
> Fixes: dba9e3bcd9bb ("net/i40e: add flow mark capability to NEON Rx")
> 
> Signed-off-by: Joyce Kong <joyce.kong@arm.com>
> Reviewed-by: Ruifeng Wang <ruifeng.wang@arm.com>

Reviewed-by: Qi Zhang <qi.z.zhang@intel.com>

Applied to dpdk-next-net-intel.

Thanks
Qi
diff mbox series

Patch

diff --git a/drivers/net/i40e/i40e_rxtx_vec_neon.c b/drivers/net/i40e/i40e_rxtx_vec_neon.c
index 6433f9d051..fa9e6582c5 100644
--- a/drivers/net/i40e/i40e_rxtx_vec_neon.c
+++ b/drivers/net/i40e/i40e_rxtx_vec_neon.c
@@ -177,19 +177,23 @@  descs_to_fdir_16b(uint32x4_t fltstat, uint64x2_t descs[4], struct rte_mbuf **rx_
 	uint32x4_t v_zeros = {0, 0, 0, 0};
 	uint32x4_t v_desc3_shift = vextq_u32(v_fdir_id_mask, v_zeros, 2);
 	uint32x4_t v_desc3_mask = vandq_u32(v_desc_fdir_mask, v_desc3_shift);
-	descs[3] = vbslq_u32(v_desc3_mask, v_zeros, vreinterpretq_u32_u64(descs[3]));
+	descs[3] = vreinterpretq_u64_u32(vbslq_u32(v_desc3_mask, v_zeros,
+				vreinterpretq_u32_u64(descs[3])));
 
 	uint32x4_t v_desc2_shift = vextq_u32(v_fdir_id_mask, v_zeros, 1);
 	uint32x4_t v_desc2_mask = vandq_u32(v_desc_fdir_mask, v_desc2_shift);
-	descs[2] = vbslq_u32(v_desc2_mask, v_zeros, vreinterpretq_u32_u64(descs[2]));
+	descs[2] = vreinterpretq_u64_u32(vbslq_u32(v_desc2_mask, v_zeros,
+				vreinterpretq_u32_u64(descs[2])));
 
 	uint32x4_t v_desc1_shift = v_fdir_id_mask;
 	uint32x4_t v_desc1_mask = vandq_u32(v_desc_fdir_mask, v_desc1_shift);
-	descs[1] = vbslq_u32(v_desc1_mask, v_zeros, vreinterpretq_u32_u64(descs[1]));
+	descs[1] = vreinterpretq_u64_u32(vbslq_u32(v_desc1_mask, v_zeros,
+				vreinterpretq_u32_u64(descs[1])));
 
 	uint32x4_t v_desc0_shift = vextq_u32(v_zeros, v_fdir_id_mask, 3);
 	uint32x4_t v_desc0_mask = vandq_u32(v_desc_fdir_mask, v_desc0_shift);
-	descs[0] = vbslq_u32(v_desc0_mask, v_zeros, vreinterpretq_u32_u64(descs[0]));
+	descs[0] = vreinterpretq_u64_u32(vbslq_u32(v_desc0_mask, v_zeros,
+				vreinterpretq_u32_u64(descs[0])));
 
 	/* Shift to 1 or 0 bit per u32 lane, then to RTE_MBUF_F_RX_FDIR_ID offset */
 	RTE_BUILD_BUG_ON(RTE_MBUF_F_RX_FDIR_ID != (1 << 13));