From patchwork Fri Mar 25 13:03:49 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rahul Bhansali X-Patchwork-Id: 108871 X-Patchwork-Delegate: jerinj@marvell.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id E4B34A00C3; Fri, 25 Mar 2022 14:04:08 +0100 (CET) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id D4E6542867; Fri, 25 Mar 2022 14:04:05 +0100 (CET) Received: from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com [67.231.148.174]) by mails.dpdk.org (Postfix) with ESMTP id E695C4286C for ; Fri, 25 Mar 2022 14:04:03 +0100 (CET) Received: from pps.filterd (m0045849.ppops.net [127.0.0.1]) by mx0a-0016f401.pphosted.com (8.16.1.2/8.16.1.2) with ESMTP id 22P6URPs024133 for ; Fri, 25 Mar 2022 06:04:03 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=pfpt0220; bh=mcXNfL21KTgRLpY8h9//F0vXrsdhdR2grkhGZqfNIN8=; b=bKCc1f69FcHHdjoUW1W8CKb091dvhj40tGsN206TFzQprIcDn6wrsouOWQe1M6yoQ6Jx 9xI0lpnxSV1q0QvA9PBXAkWSFIYpXR0pVDdjAOJlGsH7UXu6TH8wZb3NKoP5IW/PEjCz AI7wYW8lkOEIYIa258pwJmTb8xr1ySO+MBzlxesf8VdbeLrufvMo8lz6wjKgtSwoodMF ntLcdlkXHzVpjcJNNK5td0tCC7CoQopwN2Mg4GYosLgxLhur2Z2B5TerT753/RleCAOV pQ9+cqmN5R0Rt/SbuUCjngORGx/aKYTawdgOOLGx/F17gABBP0qzwbCZEmBJA1c1hTuH fQ== Received: from dc5-exch02.marvell.com ([199.233.59.182]) by mx0a-0016f401.pphosted.com (PPS) with ESMTPS id 3f0mn6xgr9-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT) for ; Fri, 25 Mar 2022 06:04:03 -0700 Received: from DC5-EXCH02.marvell.com (10.69.176.39) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.18; Fri, 25 Mar 2022 06:04:01 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.18 via Frontend Transport; Fri, 25 Mar 2022 06:04:01 -0700 Received: from localhost.localdomain (unknown [10.28.48.107]) by maili.marvell.com (Postfix) with ESMTP id 63CB33F704D; Fri, 25 Mar 2022 06:03:59 -0700 (PDT) From: Rahul Bhansali To: , Nithin Dabilpuram , Kiran Kumar K , Sunil Kumar Kori , Satha Rao CC: , Rahul Bhansali Subject: [PATCH 2/4] net/cnxk: add CN103XX platform support Date: Fri, 25 Mar 2022 18:33:49 +0530 Message-ID: <20220325130351.3207019-2-rbhansali@marvell.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220325130351.3207019-1-rbhansali@marvell.com> References: <20220325130351.3207019-1-rbhansali@marvell.com> MIME-Version: 1.0 X-Proofpoint-GUID: oFje-ZejQYjKk3gyHIHXyxV7wlOKAyG8 X-Proofpoint-ORIG-GUID: oFje-ZejQYjKk3gyHIHXyxV7wlOKAyG8 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.850,Hydra:6.0.425,FMLib:17.11.64.514 definitions=2022-03-25_02,2022-03-24_01,2022-02-23_01 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Added PCI device ID for CN103XX (cn10kb) platform. Signed-off-by: Rahul Bhansali --- drivers/net/cnxk/cn10k_ethdev.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/net/cnxk/cn10k_ethdev.c b/drivers/net/cnxk/cn10k_ethdev.c index 15dbea2180..ce3707be6f 100644 --- a/drivers/net/cnxk/cn10k_ethdev.c +++ b/drivers/net/cnxk/cn10k_ethdev.c @@ -795,12 +795,15 @@ static const struct rte_pci_id cn10k_pci_nix_map[] = { CNXK_PCI_ID(PCI_SUBSYSTEM_DEVID_CN10KA, PCI_DEVID_CNXK_RVU_PF), CNXK_PCI_ID(PCI_SUBSYSTEM_DEVID_CN10KAS, PCI_DEVID_CNXK_RVU_PF), CNXK_PCI_ID(PCI_SUBSYSTEM_DEVID_CNF10KA, PCI_DEVID_CNXK_RVU_PF), + CNXK_PCI_ID(PCI_SUBSYSTEM_DEVID_CN10KB, PCI_DEVID_CNXK_RVU_PF), CNXK_PCI_ID(PCI_SUBSYSTEM_DEVID_CN10KA, PCI_DEVID_CNXK_RVU_VF), CNXK_PCI_ID(PCI_SUBSYSTEM_DEVID_CN10KAS, PCI_DEVID_CNXK_RVU_VF), CNXK_PCI_ID(PCI_SUBSYSTEM_DEVID_CNF10KA, PCI_DEVID_CNXK_RVU_VF), + CNXK_PCI_ID(PCI_SUBSYSTEM_DEVID_CN10KB, PCI_DEVID_CNXK_RVU_VF), CNXK_PCI_ID(PCI_SUBSYSTEM_DEVID_CN10KA, PCI_DEVID_CNXK_RVU_AF_VF), CNXK_PCI_ID(PCI_SUBSYSTEM_DEVID_CN10KAS, PCI_DEVID_CNXK_RVU_AF_VF), CNXK_PCI_ID(PCI_SUBSYSTEM_DEVID_CNF10KA, PCI_DEVID_CNXK_RVU_AF_VF), + CNXK_PCI_ID(PCI_SUBSYSTEM_DEVID_CN10KB, PCI_DEVID_CNXK_RVU_AF_VF), { .vendor_id = 0, },