From patchwork Fri Mar 25 13:03:51 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rahul Bhansali X-Patchwork-Id: 108873 X-Patchwork-Delegate: jerinj@marvell.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 21B0CA00C3; Fri, 25 Mar 2022 14:04:20 +0100 (CET) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 89F5E4286B; Fri, 25 Mar 2022 14:04:12 +0100 (CET) Received: from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com [67.231.148.174]) by mails.dpdk.org (Postfix) with ESMTP id B2C9F42873 for ; Fri, 25 Mar 2022 14:04:10 +0100 (CET) Received: from pps.filterd (m0045849.ppops.net [127.0.0.1]) by mx0a-0016f401.pphosted.com (8.16.1.2/8.16.1.2) with ESMTP id 22P5c6US022013 for ; Fri, 25 Mar 2022 06:04:09 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=pfpt0220; bh=zl6pm3zRks8X9N6RRHuBPVreNDJEd6U9U60T905DG+Y=; b=a5JP9Y4Xs0jC1Mvuvn2wNeupEEoR4Zrrd70D1BqujjaMi4TPmjCR5kyLcKyh2nsK/POG xoSvG7U6x0IVUkBslkbqZ88Jc+pXNaB6x4ssMY3lTauiyINe0/zIuB4ihwb46zmeRNth VSpL9cPUWqMJ5HUclnNwB6bKi4KIZfTAoAdLDwupQVyaD26Fd4GWWUeDdQudO3pYF310 iHF1FuhV1WGBU9kjF4DJ3rLmhA7G3zrg80u1vnX41zLzXaEC6E2+SAAG80Qhx3jE+npc wxJMqBfMq2UbUHENlZpC7Iebcy8s6N2D8M3C34TTMmmIA9pLPPVsC53bGO/RKdFdXe9o UA== Received: from dc5-exch01.marvell.com ([199.233.59.181]) by mx0a-0016f401.pphosted.com (PPS) with ESMTPS id 3f0mn6xgs0-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT) for ; Fri, 25 Mar 2022 06:04:09 -0700 Received: from DC5-EXCH01.marvell.com (10.69.176.38) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Fri, 25 Mar 2022 06:04:08 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Fri, 25 Mar 2022 06:04:07 -0700 Received: from localhost.localdomain (unknown [10.28.48.107]) by maili.marvell.com (Postfix) with ESMTP id 5193D3F704F; Fri, 25 Mar 2022 06:04:06 -0700 (PDT) From: Rahul Bhansali To: , Ashwin Sekhar T K , Pavan Nikhilesh CC: , Rahul Bhansali Subject: [PATCH 4/4] mempool/cnxk: add CN103XX platform support Date: Fri, 25 Mar 2022 18:33:51 +0530 Message-ID: <20220325130351.3207019-4-rbhansali@marvell.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220325130351.3207019-1-rbhansali@marvell.com> References: <20220325130351.3207019-1-rbhansali@marvell.com> MIME-Version: 1.0 X-Proofpoint-GUID: DO1chQDwf1vKmi58RNV-y9qPvJSkBGaD X-Proofpoint-ORIG-GUID: DO1chQDwf1vKmi58RNV-y9qPvJSkBGaD X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.850,Hydra:6.0.425,FMLib:17.11.64.514 definitions=2022-03-25_02,2022-03-24_01,2022-02-23_01 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Added PCI device ID for CN103XX (cn10kb) platform. Signed-off-by: Rahul Bhansali --- drivers/mempool/cnxk/cnxk_mempool.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/mempool/cnxk/cnxk_mempool.c b/drivers/mempool/cnxk/cnxk_mempool.c index ea473552dd..a28fe5406d 100644 --- a/drivers/mempool/cnxk/cnxk_mempool.c +++ b/drivers/mempool/cnxk/cnxk_mempool.c @@ -163,6 +163,7 @@ npa_probe(struct rte_pci_driver *pci_drv, struct rte_pci_device *pci_dev) static const struct rte_pci_id npa_pci_map[] = { CNXK_PCI_ID(PCI_SUBSYSTEM_DEVID_CN10KA, PCI_DEVID_CNXK_RVU_NPA_PF), CNXK_PCI_ID(PCI_SUBSYSTEM_DEVID_CN10KAS, PCI_DEVID_CNXK_RVU_NPA_PF), + CNXK_PCI_ID(PCI_SUBSYSTEM_DEVID_CN10KB, PCI_DEVID_CNXK_RVU_NPA_PF), CNXK_PCI_ID(PCI_SUBSYSTEM_DEVID_CN9KA, PCI_DEVID_CNXK_RVU_NPA_PF), CNXK_PCI_ID(PCI_SUBSYSTEM_DEVID_CN9KB, PCI_DEVID_CNXK_RVU_NPA_PF), CNXK_PCI_ID(PCI_SUBSYSTEM_DEVID_CN9KC, PCI_DEVID_CNXK_RVU_NPA_PF), @@ -170,6 +171,7 @@ static const struct rte_pci_id npa_pci_map[] = { CNXK_PCI_ID(PCI_SUBSYSTEM_DEVID_CN9KE, PCI_DEVID_CNXK_RVU_NPA_PF), CNXK_PCI_ID(PCI_SUBSYSTEM_DEVID_CN10KA, PCI_DEVID_CNXK_RVU_NPA_VF), CNXK_PCI_ID(PCI_SUBSYSTEM_DEVID_CN10KAS, PCI_DEVID_CNXK_RVU_NPA_VF), + CNXK_PCI_ID(PCI_SUBSYSTEM_DEVID_CN10KB, PCI_DEVID_CNXK_RVU_NPA_VF), CNXK_PCI_ID(PCI_SUBSYSTEM_DEVID_CN9KA, PCI_DEVID_CNXK_RVU_NPA_VF), CNXK_PCI_ID(PCI_SUBSYSTEM_DEVID_CN9KB, PCI_DEVID_CNXK_RVU_NPA_VF), CNXK_PCI_ID(PCI_SUBSYSTEM_DEVID_CN9KC, PCI_DEVID_CNXK_RVU_NPA_VF),