diff mbox series

[1/2] crypto/qat: add gen4 ecdsa functions

Message ID 20220408075813.23316-2-arkadiuszx.kusztal@intel.com (mailing list archive)
State Superseded, archived
Delegated to: akhil goyal
Headers
Series crypto/qat: add gen4 ecdsa and ecpm functions |

Checks

Context Check Description
ci/checkpatch success coding style OK
ci/iol-testing fail build patch failure

Commit Message

Arkadiusz Kusztal April 8, 2022, 7:58 a.m. UTC 
  This commit adds generation of ecdsa with named
curves. This will speed up calculation of
signature for curves P-256 and P-384.

Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
---
 .../common/qat/qat_adf/icp_qat_fw_mmp_ids.h   | 17 +++++
 drivers/common/qat/qat_adf/qat_pke.h          | 20 +++++
 drivers/crypto/qat/qat_asym.c                 | 75 +++++++++++++++++--
 3 files changed, 107 insertions(+), 5 deletions(-)

Comments

Fan Zhang June 17, 2022, 10:50 a.m. UTC | #1 
> -----Original Message-----
> From: Kusztal, ArkadiuszX <arkadiuszx.kusztal@intel.com>
> Sent: Friday, April 8, 2022 8:58 AM
> To: dev@dpdk.org
> Cc: gakhil@marvell.com; Zhang, Roy Fan <roy.fan.zhang@intel.com>; Kusztal,
> ArkadiuszX <arkadiuszx.kusztal@intel.com>
> Subject: [PATCH 1/2] crypto/qat: add gen4 ecdsa functions
> 
> This commit adds generation of ecdsa with named
> curves. This will speed up calculation of
> signature for curves P-256 and P-384.
> 
> Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
> ---
Acked-by: Fan Zhang <roy.fan.zhang@intel.com>
diff mbox series

Patch

diff --git a/drivers/common/qat/qat_adf/icp_qat_fw_mmp_ids.h b/drivers/common/qat/qat_adf/icp_qat_fw_mmp_ids.h
index 00813cffb9..9276f954f1 100644
--- a/drivers/common/qat/qat_adf/icp_qat_fw_mmp_ids.h
+++ b/drivers/common/qat/qat_adf/icp_qat_fw_mmp_ids.h
@@ -1524,6 +1524,23 @@  icp_qat_fw_mmp_ecdsa_verify_gfp_521_input::in in @endlink
  * icp_qat_fw_mmp_kpt_ecdsa_sign_rs_gfp_521_output::s s @endlink
  */
 
+#define PKE_ECDSA_SIGN_RS_P256 0x18133566
+/**< Functionality ID for ECC P256 ECDSA Sign RS
+ * @li 3 input parameters : @link icp_qat_fw_mmp_ecdsa_sign_rs_p256_input_s::k k
+ * @endlink @link icp_qat_fw_mmp_ecdsa_sign_rs_p256_input_s::e e @endlink @link
+ * icp_qat_fw_mmp_ecdsa_sign_rs_p256_input_s::d d @endlink
+ * @li 2 output parameters : @link icp_qat_fw_mmp_ecdsa_sign_rs_p256_output_s::r
+ * r @endlink @link icp_qat_fw_mmp_ecdsa_sign_rs_p256_output_s::s s @endlink
+ */
+#define PKE_ECDSA_SIGN_RS_P384 0x1a1335a6
+/**< Functionality ID for ECC P384 ECDSA Sign RS
+ * @li 3 input parameters : @link icp_qat_fw_mmp_ecdsa_sign_rs_p384_input_s::k k
+ * @endlink @link icp_qat_fw_mmp_ecdsa_sign_rs_p384_input_s::e e @endlink @link
+ * icp_qat_fw_mmp_ecdsa_sign_rs_p384_input_s::d d @endlink
+ * @li 2 output parameters : @link icp_qat_fw_mmp_ecdsa_sign_rs_p384_output_s::r
+ * r @endlink @link icp_qat_fw_mmp_ecdsa_sign_rs_p384_output_s::s s @endlink
+ */
+
 #define PKE_LIVENESS 0x00000001
 /**< Functionality ID for PKE_LIVENESS
  * @li 0 input parameter(s)
diff --git a/drivers/common/qat/qat_adf/qat_pke.h b/drivers/common/qat/qat_adf/qat_pke.h
index 6c12bfd989..87b6a383b3 100644
--- a/drivers/common/qat/qat_adf/qat_pke.h
+++ b/drivers/common/qat/qat_adf/qat_pke.h
@@ -266,6 +266,26 @@  get_ecdsa_function(struct rte_crypto_asym_xform *xform)
 	return qat_function;
 }
 
+static struct qat_asym_function
+get_ecdsa_named_function(struct rte_crypto_asym_xform *xform)
+{
+	struct qat_asym_function qat_function;
+
+	switch (xform->ec.curve_id) {
+	case RTE_CRYPTO_EC_GROUP_SECP256R1:
+		qat_function.func_id = PKE_ECDSA_SIGN_RS_P256;
+		qat_function.bytesize = 32;
+		break;
+	case RTE_CRYPTO_EC_GROUP_SECP384R1:
+		qat_function.func_id = PKE_ECDSA_SIGN_RS_P384;
+		qat_function.bytesize = 48;
+		break;
+	default:
+		qat_function.func_id = 0;
+	}
+	return qat_function;
+}
+
 static struct qat_asym_function
 get_ecpm_function(struct rte_crypto_asym_xform *xform)
 {
diff --git a/drivers/crypto/qat/qat_asym.c b/drivers/crypto/qat/qat_asym.c
index d2041b2efa..0ac2bf7405 100644
--- a/drivers/crypto/qat/qat_asym.c
+++ b/drivers/crypto/qat/qat_asym.c
@@ -548,7 +548,7 @@  rsa_collect(struct rte_crypto_asym_op *asym_op,
 }
 
 static int
-ecdsa_set_input(struct rte_crypto_asym_op *asym_op,
+ecdsa_set_generic_input(struct rte_crypto_asym_op *asym_op,
 		struct icp_qat_fw_pke_request *qat_req,
 		struct qat_asym_op_cookie *cookie,
 		struct rte_crypto_asym_xform *xform)
@@ -649,6 +649,70 @@  ecdsa_set_input(struct rte_crypto_asym_op *asym_op,
 	return 0;
 }
 
+static int
+ecdsa_set_named_input(struct rte_crypto_asym_op *asym_op,
+		struct icp_qat_fw_pke_request *qat_req,
+		struct qat_asym_op_cookie *cookie,
+		struct rte_crypto_asym_xform *xform)
+{
+	struct qat_asym_function qat_function;
+	uint32_t qat_func_alignsize, func_id;
+	int curve_id;
+
+	curve_id = pick_curve(xform);
+	if (curve_id < 0) {
+		QAT_LOG(DEBUG, "Incorrect elliptic curve");
+		return -EINVAL;
+	}
+
+	qat_function = get_ecdsa_named_function(xform);
+	func_id = qat_function.func_id;
+	if (func_id == 0) {
+		QAT_LOG(ERR, "Cannot obtain functionality id");
+		return -EINVAL;
+	}
+	qat_func_alignsize =
+		RTE_ALIGN_CEIL(qat_function.bytesize, 8);
+
+	SET_PKE_LN(asym_op->ecdsa.k, qat_func_alignsize, 0);
+	SET_PKE_LN(asym_op->ecdsa.message, qat_func_alignsize, 1);
+	SET_PKE_LN(asym_op->ecdsa.pkey, qat_func_alignsize, 2);
+
+	cookie->alg_bytesize = curve[curve_id].bytesize;
+	cookie->qat_func_alignsize = qat_func_alignsize;
+	qat_req->pke_hdr.cd_pars.func_id = func_id;
+	qat_req->input_param_count =
+			3;
+	qat_req->output_param_count =
+			2;
+
+	HEXDUMP("k", cookie->input_array[0], qat_func_alignsize);
+	HEXDUMP("e", cookie->input_array[1], qat_func_alignsize);
+	HEXDUMP("d", cookie->input_array[2], qat_func_alignsize);
+
+	return 0;
+}
+
+static int
+ecdsa_set_input(struct rte_crypto_asym_op *asym_op,
+		struct icp_qat_fw_pke_request *qat_req,
+		struct qat_asym_op_cookie *cookie,
+		struct rte_crypto_asym_xform *xform,
+		enum qat_device_gen qat_dev_gen)
+{
+	if (qat_dev_gen >= QAT_GEN4 && asym_op->ecdsa.op_type ==
+			RTE_CRYPTO_ASYM_OP_SIGN &&
+			(xform->ec.curve_id == RTE_CRYPTO_EC_GROUP_SECP256R1
+			|| xform->ec.curve_id ==
+				RTE_CRYPTO_EC_GROUP_SECP384R1)) {
+		return ecdsa_set_named_input(asym_op, qat_req,
+				cookie,	xform);
+	} else {
+		return ecdsa_set_generic_input(asym_op, qat_req,
+				cookie,	xform);
+	}
+}
+
 static uint8_t
 ecdsa_collect(struct rte_crypto_asym_op *asym_op,
 		struct qat_asym_op_cookie *cookie)
@@ -751,7 +815,8 @@  static int
 asym_set_input(struct rte_crypto_asym_op *asym_op,
 		struct icp_qat_fw_pke_request *qat_req,
 		struct qat_asym_op_cookie *cookie,
-		struct rte_crypto_asym_xform *xform)
+		struct rte_crypto_asym_xform *xform,
+		enum qat_device_gen qat_dev_gen)
 {
 	switch (xform->xform_type) {
 	case RTE_CRYPTO_ASYM_XFORM_MODEX:
@@ -765,7 +830,7 @@  asym_set_input(struct rte_crypto_asym_op *asym_op,
 				cookie, xform);
 	case RTE_CRYPTO_ASYM_XFORM_ECDSA:
 		return ecdsa_set_input(asym_op, qat_req,
-				cookie, xform);
+				cookie, xform, qat_dev_gen);
 	case RTE_CRYPTO_ASYM_XFORM_ECPM:
 		return ecpm_set_input(asym_op, qat_req,
 				cookie, xform);
@@ -779,7 +844,7 @@  asym_set_input(struct rte_crypto_asym_op *asym_op,
 static int
 qat_asym_build_request(void *in_op, uint8_t *out_msg, void *op_cookie,
 			__rte_unused uint64_t *opaque,
-			__rte_unused enum qat_device_gen qat_dev_gen)
+			enum qat_device_gen qat_dev_gen)
 {
 	struct rte_crypto_op *op = (struct rte_crypto_op *)in_op;
 	struct rte_crypto_asym_op *asym_op = op->asym;
@@ -813,7 +878,7 @@  qat_asym_build_request(void *in_op, uint8_t *out_msg, void *op_cookie,
 		goto error;
 	}
 	err = asym_set_input(asym_op, qat_req, cookie,
-			xform);
+			xform, qat_dev_gen);
 	if (err) {
 		op->status = RTE_CRYPTO_OP_STATUS_INVALID_ARGS;
 		goto error;