diff mbox series

[v2,26/28] common/cnxk: allow lesser inline inbound sa sizes

Message ID 20220422104709.20722-26-ndabilpuram@marvell.com (mailing list archive)
State Changes Requested, archived
Delegated to: Jerin Jacob
Headers
Series [v2,01/28] common/cnxk: add multi channel support for SDP send queues |

Checks

Context Check Description
ci/checkpatch success coding style OK

Commit Message

Nithin Dabilpuram April 22, 2022, 10:47 a.m. UTC 
  Restructure SA setup to allow lesser inbound SA sizes as opposed
to full Inbound SA size of 1024B with max possible Anti-Replay
window. Since inbound SA size is variable, move the memset logic
out of common code.

Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
---
 drivers/common/cnxk/roc_ie_ot.c   |  4 ----
 drivers/common/cnxk/roc_nix_inl.c |  9 ++++++++-
 drivers/common/cnxk/roc_nix_inl.h | 26 +++++++++++++++++++++++---
 3 files changed, 31 insertions(+), 8 deletions(-)
diff mbox series

Patch

diff --git a/drivers/common/cnxk/roc_ie_ot.c b/drivers/common/cnxk/roc_ie_ot.c
index d0b7ad3..4b5823d 100644
--- a/drivers/common/cnxk/roc_ie_ot.c
+++ b/drivers/common/cnxk/roc_ie_ot.c
@@ -10,8 +10,6 @@  roc_ot_ipsec_inb_sa_init(struct roc_ot_ipsec_inb_sa *sa, bool is_inline)
 {
 	size_t offset;
 
-	memset(sa, 0, sizeof(struct roc_ot_ipsec_inb_sa));
-
 	if (is_inline) {
 		sa->w0.s.pkt_output = ROC_IE_OT_SA_PKT_OUTPUT_NO_FRAG;
 		sa->w0.s.pkt_format = ROC_IE_OT_SA_PKT_FMT_META;
@@ -33,8 +31,6 @@  roc_ot_ipsec_outb_sa_init(struct roc_ot_ipsec_outb_sa *sa)
 {
 	size_t offset;
 
-	memset(sa, 0, sizeof(struct roc_ot_ipsec_outb_sa));
-
 	offset = offsetof(struct roc_ot_ipsec_outb_sa, ctx);
 	sa->w0.s.ctx_push_size = (offset / ROC_CTX_UNIT_8B) + 1;
 	sa->w0.s.ctx_size = ROC_IE_OT_CTX_ILEN;
diff --git a/drivers/common/cnxk/roc_nix_inl.c b/drivers/common/cnxk/roc_nix_inl.c
index 2c013cb..887d4ad 100644
--- a/drivers/common/cnxk/roc_nix_inl.c
+++ b/drivers/common/cnxk/roc_nix_inl.c
@@ -14,9 +14,16 @@  PLT_STATIC_ASSERT(ROC_NIX_INL_ONF_IPSEC_OUTB_SA_SZ ==
 		  1UL << ROC_NIX_INL_ONF_IPSEC_OUTB_SA_SZ_LOG2);
 PLT_STATIC_ASSERT(ROC_NIX_INL_OT_IPSEC_INB_SA_SZ ==
 		  1UL << ROC_NIX_INL_OT_IPSEC_INB_SA_SZ_LOG2);
-PLT_STATIC_ASSERT(ROC_NIX_INL_OT_IPSEC_INB_SA_SZ == 1024);
 PLT_STATIC_ASSERT(ROC_NIX_INL_OT_IPSEC_OUTB_SA_SZ ==
 		  1UL << ROC_NIX_INL_OT_IPSEC_OUTB_SA_SZ_LOG2);
+PLT_STATIC_ASSERT(ROC_NIX_INL_OT_IPSEC_INB_SA_SZ >=
+		  ROC_NIX_INL_OT_IPSEC_INB_HW_SZ +
+			  ROC_NIX_INL_OT_IPSEC_INB_SW_RSVD);
+/* Allow lesser INB SA HW sizes */
+PLT_STATIC_ASSERT(ROC_NIX_INL_OT_IPSEC_INB_HW_SZ <=
+		  PLT_ALIGN(sizeof(struct roc_ot_ipsec_inb_sa), ROC_ALIGN));
+PLT_STATIC_ASSERT(ROC_NIX_INL_OT_IPSEC_OUTB_HW_SZ ==
+		  PLT_ALIGN(sizeof(struct roc_ot_ipsec_outb_sa), ROC_ALIGN));
 
 static int
 nix_inl_inb_sa_tbl_setup(struct roc_nix *roc_nix)
diff --git a/drivers/common/cnxk/roc_nix_inl.h b/drivers/common/cnxk/roc_nix_inl.h
index 633f090..e7bcffc 100644
--- a/drivers/common/cnxk/roc_nix_inl.h
+++ b/drivers/common/cnxk/roc_nix_inl.h
@@ -23,13 +23,33 @@ 
 #define ROC_NIX_INL_ONF_IPSEC_OUTB_SA_SZ_LOG2 8
 
 /* OT INB HW area */
+#ifndef ROC_NIX_INL_OT_IPSEC_AR_WIN_SZ_MAX
+#define ROC_NIX_INL_OT_IPSEC_AR_WIN_SZ_MAX 4096u
+#endif
+#define ROC_NIX_INL_OT_IPSEC_AR_WINBITS_SZ                                     \
+	(PLT_ALIGN_CEIL(ROC_NIX_INL_OT_IPSEC_AR_WIN_SZ_MAX,                    \
+			BITS_PER_LONG_LONG) /                                  \
+	 BITS_PER_LONG_LONG)
+#define __ROC_NIX_INL_OT_IPSEC_INB_HW_SZ                                       \
+	(offsetof(struct roc_ot_ipsec_inb_sa, ctx.ar_winbits) +                \
+	 sizeof(uint64_t) * ROC_NIX_INL_OT_IPSEC_AR_WINBITS_SZ)
 #define ROC_NIX_INL_OT_IPSEC_INB_HW_SZ                                         \
-	PLT_ALIGN(sizeof(struct roc_ot_ipsec_inb_sa), ROC_ALIGN)
+	PLT_ALIGN(__ROC_NIX_INL_OT_IPSEC_INB_HW_SZ, ROC_ALIGN)
 /* OT INB SW reserved area */
+#ifndef ROC_NIX_INL_INB_POST_PROCESS
+#define ROC_NIX_INL_INB_POST_PROCESS 1
+#endif
+#if ROC_NIX_INL_INB_POST_PROCESS == 0
+#define ROC_NIX_INL_OT_IPSEC_INB_SW_RSVD 0
+#else
 #define ROC_NIX_INL_OT_IPSEC_INB_SW_RSVD 128
+#endif
+
 #define ROC_NIX_INL_OT_IPSEC_INB_SA_SZ                                         \
-	(ROC_NIX_INL_OT_IPSEC_INB_HW_SZ + ROC_NIX_INL_OT_IPSEC_INB_SW_RSVD)
-#define ROC_NIX_INL_OT_IPSEC_INB_SA_SZ_LOG2 10
+	(1UL << (64 - __builtin_clzll(ROC_NIX_INL_OT_IPSEC_INB_HW_SZ +         \
+				      ROC_NIX_INL_OT_IPSEC_INB_SW_RSVD - 1)))
+#define ROC_NIX_INL_OT_IPSEC_INB_SA_SZ_LOG2                                    \
+	__builtin_ctzll(ROC_NIX_INL_OT_IPSEC_INB_SA_SZ)
 
 /* OT OUTB HW area */
 #define ROC_NIX_INL_OT_IPSEC_OUTB_HW_SZ                                        \