From patchwork Thu Apr 28 03:30:32 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Wenjun Wu X-Patchwork-Id: 110406 X-Patchwork-Delegate: qi.z.zhang@intel.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id B4486A0503; Thu, 28 Apr 2022 05:53:29 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 9586742815; Thu, 28 Apr 2022 05:52:57 +0200 (CEST) Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by mails.dpdk.org (Postfix) with ESMTP id 892BC410F3 for ; Thu, 28 Apr 2022 05:52:52 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1651117972; x=1682653972; h=from:to:subject:date:message-id:in-reply-to:references: mime-version:content-transfer-encoding; bh=6OLUIV174at4F4njhX0qaYOMqYxbof2gefBbfythGek=; b=YiIWR+L1hfYKYSzOJy2aJ+MiZ+b0YInFRSaUtoHmHZPBmnj0SDJRDd5e i5o04NbgSOY/5cpUI3YbZthfMuEq/Go0alVH3i2rVVbXQZbsP2wwDj6kE IddyocARQ8I9DxJO6UKKSYF+HHVSQtdvdFCpbBeNn8xw2EFuMjh0+0eZK Q3UktUrnjOhP3cvKxfDslIqenm/9U+1h+waUWWxRySJ8aCOs4s+GMJc56 XC8wOyrFJ1N6vBRuQBfm7j6SD2+tcbRxSo+rfPDJsGlNJ8n8a3NCeTd4H pswPIAjE3q1bMWizf2TC5hGNQO2/yqHtINWRqgZr4mumsl3evBDnHnabT A==; X-IronPort-AV: E=McAfee;i="6400,9594,10330"; a="253531284" X-IronPort-AV: E=Sophos;i="5.90,295,1643702400"; d="scan'208";a="253531284" Received: from orsmga003.jf.intel.com ([10.7.209.27]) by orsmga101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 27 Apr 2022 20:52:50 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.90,295,1643702400"; d="scan'208";a="514044830" Received: from npg-wuwenjun-dpdk-01.sh.intel.com ([10.67.110.181]) by orsmga003.jf.intel.com with ESMTP; 27 Apr 2022 20:52:49 -0700 From: Wenjun Wu To: dev@dpdk.org, qiming.yang@intel.com, qi.z.zhang@intel.com Subject: [PATCH v9 7/9] net/ice: support queue weight configuration Date: Thu, 28 Apr 2022 11:30:32 +0800 Message-Id: <20220428033034.3490183-8-wenjun1.wu@intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220428033034.3490183-1-wenjun1.wu@intel.com> References: <20220329014813.1092054-1-wenjun1.wu@intel.com> <20220428033034.3490183-1-wenjun1.wu@intel.com> MIME-Version: 1.0 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org This patch adds queue weight configuration support. Signed-off-by: Wenjun Wu --- drivers/net/ice/ice_tm.c | 13 +++++++++++-- 1 file changed, 11 insertions(+), 2 deletions(-) diff --git a/drivers/net/ice/ice_tm.c b/drivers/net/ice/ice_tm.c index 91e420d653..4d7bb9102c 100644 --- a/drivers/net/ice/ice_tm.c +++ b/drivers/net/ice/ice_tm.c @@ -153,9 +153,9 @@ ice_node_param_check(struct ice_pf *pf, uint32_t node_id, return -EINVAL; } - if (weight != 1) { + if (weight > 200 || weight < 1) { error->type = RTE_TM_ERROR_TYPE_NODE_WEIGHT; - error->message = "weight must be 1"; + error->message = "weight must be between 1 and 200"; return -EINVAL; } @@ -804,6 +804,15 @@ static int ice_hierarchy_commit(struct rte_eth_dev *dev, PMD_DRV_LOG(ERR, "configure queue %u priority failed", tm_node->priority); goto fail_clear; } + + ret_val = ice_cfg_q_bw_alloc(hw->port_info, vsi->idx, + tm_node->tc, tm_node->id, + ICE_MAX_BW, (u32)tm_node->weight); + if (ret_val) { + error->type = RTE_TM_ERROR_TYPE_NODE_WEIGHT; + PMD_DRV_LOG(ERR, "configure queue %u weight failed", tm_node->weight); + goto fail_clear; + } } return ret_val;