diff mbox series

[v2,2/2] crypto/ipsec_mb: add chachapoly SGL support to aesni-mb

Message ID 20220511123045.1154799-3-ciara.power@intel.com (mailing list archive)
State Accepted, archived
Delegated to: akhil goyal
Headers
Series add partial SGL support to AESNI_MB |

Checks

Context Check Description
ci/checkpatch success coding style OK
ci/Intel-compilation success Compilation OK
ci/intel-Testing fail Testing issues
ci/github-robot: build success github build: passed
ci/iol-mellanox-Performance success Performance Testing PASS
ci/iol-intel-Functional success Functional Testing PASS
ci/iol-aarch64-unit-testing success Testing PASS
ci/iol-intel-Performance success Performance Testing PASS
ci/iol-aarch64-compile-testing success Testing PASS
ci/iol-x86_64-unit-testing success Testing PASS
ci/iol-abi-testing success Testing PASS
ci/iol-x86_64-compile-testing success Testing PASS

Commit Message

Power, Ciara May 11, 2022, 12:30 p.m. UTC 
  Add SGL support for chacha20_poly1305 algorithm through JOB API.

Supports IN-PLACE SGL, OOP SGL IN and LB OUT,
and OOP SGL IN and SGL OUT.

Feature flags not added, as the PMD does not support SGL for all
other algorithms.

Signed-off-by: Ciara Power <ciara.power@intel.com>

---
v2:
  - Chacha context was moved to qp_data rather than session.
---
 drivers/crypto/ipsec_mb/pmd_aesni_mb.c      | 14 +++++++++++---
 drivers/crypto/ipsec_mb/pmd_aesni_mb_priv.h |  5 ++++-
 2 files changed, 15 insertions(+), 4 deletions(-)
diff mbox series

Patch

diff --git a/drivers/crypto/ipsec_mb/pmd_aesni_mb.c b/drivers/crypto/ipsec_mb/pmd_aesni_mb.c
index bf434260c1..6d5d3ce8eb 100644
--- a/drivers/crypto/ipsec_mb/pmd_aesni_mb.c
+++ b/drivers/crypto/ipsec_mb/pmd_aesni_mb.c
@@ -1200,10 +1200,12 @@  set_mb_job_params(IMB_JOB *job, struct ipsec_mb_qp *qp,
 	}
 
 	if (op->sym->m_src->nb_segs > 1) {
-		if (session->cipher.mode != IMB_CIPHER_GCM) {
+		if (session->cipher.mode != IMB_CIPHER_GCM
+				&& session->cipher.mode !=
+				IMB_CIPHER_CHACHA20_POLY1305) {
 			op->status = RTE_CRYPTO_OP_STATUS_INVALID_ARGS;
 			IPSEC_MB_LOG(ERR, "Device only supports SGL for AES-GCM"
-					" algorithm.");
+					" or CHACHA20_POLY1305 algorithms.");
 			return -1;
 		}
 		sgl = 1;
@@ -1296,6 +1298,11 @@  set_mb_job_params(IMB_JOB *job, struct ipsec_mb_qp *qp,
 		job->u.CHACHA20_POLY1305.aad = op->sym->aead.aad.data;
 		job->u.CHACHA20_POLY1305.aad_len_in_bytes =
 			session->aead.aad_len;
+		if (sgl) {
+			job->u.CHACHA20_POLY1305.ctx = &qp_data->chacha_sgl_ctx;
+			job->cipher_mode = IMB_CIPHER_CHACHA20_POLY1305_SGL;
+			job->hash_alg = IMB_AUTH_CHACHA20_POLY1305_SGL;
+		}
 		job->enc_keys = session->cipher.expanded_aes_keys.encode;
 		job->dec_keys = session->cipher.expanded_aes_keys.encode;
 		break;
@@ -1401,6 +1408,7 @@  set_mb_job_params(IMB_JOB *job, struct ipsec_mb_qp *qp,
 		break;
 
 	case IMB_AUTH_GCM_SGL:
+	case IMB_AUTH_CHACHA20_POLY1305_SGL:
 		job->hash_start_src_offset_in_bytes = 0;
 		job->msg_len_to_hash_in_bytes = 0;
 		job->iv = rte_crypto_op_ctod_offset(op, uint8_t *,
@@ -1412,7 +1420,6 @@  set_mb_job_params(IMB_JOB *job, struct ipsec_mb_qp *qp,
 			op->sym->aead.data.offset;
 		job->msg_len_to_hash_in_bytes =
 					op->sym->aead.data.length;
-
 		job->iv = rte_crypto_op_ctod_offset(op, uint8_t *,
 				session->iv.offset);
 		break;
@@ -1498,6 +1505,7 @@  set_mb_job_params(IMB_JOB *job, struct ipsec_mb_qp *qp,
 		job->msg_len_to_cipher_in_bytes = op->sym->aead.data.length;
 		break;
 	case IMB_CIPHER_GCM_SGL:
+	case IMB_CIPHER_CHACHA20_POLY1305_SGL:
 		job->msg_len_to_cipher_in_bytes = 0;
 		job->cipher_start_src_offset_in_bytes = 0;
 		break;
diff --git a/drivers/crypto/ipsec_mb/pmd_aesni_mb_priv.h b/drivers/crypto/ipsec_mb/pmd_aesni_mb_priv.h
index 10e0b4c38e..9ef75aa51f 100644
--- a/drivers/crypto/ipsec_mb/pmd_aesni_mb_priv.h
+++ b/drivers/crypto/ipsec_mb/pmd_aesni_mb_priv.h
@@ -726,7 +726,10 @@  struct aesni_mb_qp_data {
 	 * by the driver when verifying a digest provided
 	 * by the user (using authentication verify operation)
 	 */
-	struct gcm_context_data gcm_sgl_ctx;
+	union {
+		struct gcm_context_data gcm_sgl_ctx;
+		struct chacha20_poly1305_context_data chacha_sgl_ctx;
+	};
 };
 
 /* Maximum length for digest */