Message ID | 20220519132830.3677023-2-rbhansali@marvell.com (mailing list archive) |
---|---|
State | Accepted |
Delegated to: | Thomas Monjalon |
Headers | show |
Series | [v5,1/2] config/arm: add SVE ACLE control flag | expand |
Context | Check | Description |
---|---|---|
ci/iol-abi-testing | success | Testing PASS |
ci/iol-x86_64-compile-testing | success | Testing PASS |
ci/iol-x86_64-unit-testing | success | Testing PASS |
ci/iol-aarch64-compile-testing | success | Testing PASS |
ci/iol-aarch64-unit-testing | success | Testing PASS |
ci/github-robot: build | success | github build: passed |
ci/iol-intel-Functional | success | Functional Testing PASS |
ci/iol-intel-Performance | success | Performance Testing PASS |
ci/intel-Testing | success | Testing PASS |
ci/Intel-compilation | success | Compilation OK |
ci/checkpatch | success | coding style OK |
19/05/2022 15:28, Rahul Bhansali: > This disable the sve_acle flag for cn10k. > > For native build, -Dplatform=cn10k will require to > get sve_acle flag parameter in the build. > > Performance impact:- > With l3fwd example, lpm lookup performance increased > by ~21% if Neon is used instead of SVE. Hence, disabled > sve_acle flag for cn10k. > > Signed-off-by: Rahul Bhansali <rbhansali@marvell.com> > Reviewed-by: Chengwen Feng <fengchengwen@huawei.com> > Acked-by: Ruifeng Wang <ruifeng.wang@arm.com> Series applied, thanks.
diff --git a/config/arm/meson.build b/config/arm/meson.build index 6f8961eac8..a94129168f 100644 --- a/config/arm/meson.build +++ b/config/arm/meson.build @@ -281,7 +281,8 @@ soc_cn10k = { ], 'part_number': '0xd49', 'extra_march_features': ['crypto'], - 'numa': false + 'numa': false, + 'sve_acle': false } soc_dpaa = {