From patchwork Tue May 24 08:42:35 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Harman Kalra X-Patchwork-Id: 111719 X-Patchwork-Delegate: jerinj@marvell.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id CBC3CA04FF; Tue, 24 May 2022 10:43:59 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id D2D5E42B91; Tue, 24 May 2022 10:43:25 +0200 (CEST) Received: from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com [67.231.148.174]) by mails.dpdk.org (Postfix) with ESMTP id 4641042B77 for ; Tue, 24 May 2022 10:43:23 +0200 (CEST) Received: from pps.filterd (m0045849.ppops.net [127.0.0.1]) by mx0a-0016f401.pphosted.com (8.17.1.5/8.17.1.5) with ESMTP id 24NNBBU5022470 for ; Tue, 24 May 2022 01:43:22 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type; s=pfpt0220; bh=qMV/sUWknusiYTIVcR7y0R2UqMhfqRHlGF4N5phyOV8=; b=CFJoWAvk0Y1vPkxHq9Cn2ByHNZjmTO6+Dhb3oqF9huHEabNqQwQB0UoS18+M+MB8vxcV pwPSKRYyuB3jNXfTKw3HAIQNbHWuC0lakWtcT0oGW1x/maTNF2wq8gVMfjbXZmUG4jlJ gBFRac5ZaVfjVHC2rOQTgcJ/HrDwiYJbr7/Jo7z/aw+8ZY8EHRbqIqWDb2kRY5fOkPCS gfu59mykdqt9j4p0SiPvQfwaTgvlp3LRj40jsN5ZkBaghMO28iUZESIZFAZn80dtFXJa UDzexmlaSDmfocH0rwWBiANkIuvIpmMdxx6TZRHm7TOFZAeEhzNRqwGhy+qdNi+CLJ/J wQ== Received: from dc5-exch01.marvell.com ([199.233.59.181]) by mx0a-0016f401.pphosted.com (PPS) with ESMTPS id 3g8kqjhrvq-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT) for ; Tue, 24 May 2022 01:43:22 -0700 Received: from DC5-EXCH02.marvell.com (10.69.176.39) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Tue, 24 May 2022 01:43:20 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.18 via Frontend Transport; Tue, 24 May 2022 01:43:20 -0700 Received: from localhost.localdomain (unknown [10.29.52.211]) by maili.marvell.com (Postfix) with ESMTP id 05F4A3F7043; Tue, 24 May 2022 01:43:18 -0700 (PDT) From: Harman Kalra To: , Jerin Jacob , Maciej Czekaj CC: Hanumanth Pothula Subject: [PATCH v3 11/11] net/thunderx: populate max and min MTU values Date: Tue, 24 May 2022 14:12:35 +0530 Message-ID: <20220524084235.17796-11-hkalra@marvell.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20220524084235.17796-1-hkalra@marvell.com> References: <20220517173941.189330-2-hkalra@marvell.com> <20220524084235.17796-1-hkalra@marvell.com> MIME-Version: 1.0 X-Proofpoint-ORIG-GUID: febWBxU3JoAf4qgtthUNSuBJji_UEY50 X-Proofpoint-GUID: febWBxU3JoAf4qgtthUNSuBJji_UEY50 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.874,Hydra:6.0.486,FMLib:17.11.64.514 definitions=2022-05-24_06,2022-05-23_01,2022-02-23_01 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org From: Hanumanth Pothula Populate maximum and minimum MTU values while retrieving device information. Signed-off-by: Hanumanth Pothula --- drivers/net/thunderx/nicvf_ethdev.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/net/thunderx/nicvf_ethdev.c b/drivers/net/thunderx/nicvf_ethdev.c index 0f79b02172..262c024560 100644 --- a/drivers/net/thunderx/nicvf_ethdev.c +++ b/drivers/net/thunderx/nicvf_ethdev.c @@ -1479,6 +1479,10 @@ nicvf_dev_info_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info) dev_info->max_mac_addrs = 1; dev_info->max_vfs = pci_dev->max_vfs; + dev_info->max_mtu = dev_info->max_rx_pktlen - + (RTE_ETHER_HDR_LEN + RTE_ETHER_CRC_LEN); + dev_info->min_mtu = dev_info->min_rx_bufsize - NIC_HW_L2_OVERHEAD; + dev_info->rx_offload_capa = NICVF_RX_OFFLOAD_CAPA; dev_info->tx_offload_capa = NICVF_TX_OFFLOAD_CAPA; dev_info->rx_queue_offload_capa = NICVF_RX_OFFLOAD_CAPA;