diff mbox series

[v3,06/11] net/thunderx: reset Rx DMAC control register

Message ID 20220524084235.17796-6-hkalra@marvell.com (mailing list archive)
State Accepted, archived
Delegated to: Jerin Jacob
Headers
Series [v3,01/11] event/octeontx: fix SSO fastpath |

Checks

Context Check Description
ci/checkpatch success coding style OK

Commit Message

Harman Kalra May 24, 2022, 8:42 a.m. UTC 
  From: Hanumanth Pothula <hpothula@marvell.com>

During initialization, reset RX DMAC control register by
sending mbox message NIC_MBOX_MSG_RESET_XCAST to PF.

Signed-off-by: Hanumanth Pothula <hpothula@marvell.com>
---
 drivers/net/thunderx/base/nicvf_mbox.c | 9 +++++++++
 drivers/net/thunderx/base/nicvf_mbox.h | 2 ++
 drivers/net/thunderx/nicvf_ethdev.c    | 3 +++
 3 files changed, 14 insertions(+)
diff mbox series

Patch

diff --git a/drivers/net/thunderx/base/nicvf_mbox.c b/drivers/net/thunderx/base/nicvf_mbox.c
index 281027ccce..275e593286 100644
--- a/drivers/net/thunderx/base/nicvf_mbox.c
+++ b/drivers/net/thunderx/base/nicvf_mbox.c
@@ -449,3 +449,12 @@  nicvf_mbox_link_change(struct nicvf *nic)
 	mbx.msg.msg = NIC_MBOX_MSG_BGX_LINK_CHANGE;
 	nicvf_mbox_send_async_msg_to_pf(nic, &mbx);
 }
+
+void
+nicvf_mbox_reset_xcast(struct nicvf *nic)
+{
+	struct nic_mbx mbx = { .msg = { 0 } };
+
+	mbx.msg.msg = NIC_MBOX_MSG_RESET_XCAST;
+	nicvf_mbox_send_msg_to_pf(nic, &mbx);
+}
diff --git a/drivers/net/thunderx/base/nicvf_mbox.h b/drivers/net/thunderx/base/nicvf_mbox.h
index 490bed206b..044220a2cd 100644
--- a/drivers/net/thunderx/base/nicvf_mbox.h
+++ b/drivers/net/thunderx/base/nicvf_mbox.h
@@ -43,6 +43,7 @@ 
 #define	NIC_MBOX_MSG_SET_LINK		0x21	/* Set link up/down */
 #define	NIC_MBOX_MSG_CFG_DONE		0xF0	/* VF configuration done */
 #define	NIC_MBOX_MSG_SHUTDOWN		0xF1	/* VF is being shutdown */
+#define NIC_MBOX_MSG_RESET_XCAST	0xF2    /* Reset DCAM filtering mode */
 #define	NIC_MBOX_MSG_MAX		0x100	/* Maximum number of messages */
 
 /* Get vNIC VF configuration */
@@ -223,5 +224,6 @@  int nicvf_mbox_set_link_up_down(struct nicvf *nic, bool enable);
 void nicvf_mbox_shutdown(struct nicvf *nic);
 void nicvf_mbox_cfg_done(struct nicvf *nic);
 void nicvf_mbox_link_change(struct nicvf *nic);
+void nicvf_mbox_reset_xcast(struct nicvf *nic);
 
 #endif /* __THUNDERX_NICVF_MBOX__ */
diff --git a/drivers/net/thunderx/nicvf_ethdev.c b/drivers/net/thunderx/nicvf_ethdev.c
index addbd53735..1e268d9b0f 100644
--- a/drivers/net/thunderx/nicvf_ethdev.c
+++ b/drivers/net/thunderx/nicvf_ethdev.c
@@ -2196,6 +2196,9 @@  nicvf_eth_dev_init(struct rte_eth_dev *eth_dev)
 			);
 	}
 
+	/* To make sure RX DMAC register is set to default value (0x3) */
+	nicvf_mbox_reset_xcast(nic);
+
 	ret = nicvf_base_init(nic);
 	if (ret) {
 		PMD_INIT_LOG(ERR, "Failed to execute nicvf_base_init");