[v2,2/7] net/ngbe: support OEM subsystem vendor ID

Message ID 20220622065613.661679-3-jiawenwu@trustnetic.com (mailing list archive)
State Accepted, archived
Delegated to: Ferruh Yigit
Headers
Series Fixes and supports for Wangxun NICs |

Checks

Context Check Description
ci/checkpatch success coding style OK

Commit Message

Jiawen Wu June 22, 2022, 6:56 a.m. UTC
  Add support for OEM subsystem vendor ID.

Signed-off-by: Jiawen Wu <jiawenwu@trustnetic.com>
---
 doc/guides/rel_notes/release_22_07.rst |  1 +
 drivers/net/ngbe/base/ngbe_hw.c        | 13 +++++++------
 drivers/net/ngbe/base/ngbe_type.h      |  2 +-
 drivers/net/ngbe/ngbe_ethdev.c         | 14 +++++++++++++-
 4 files changed, 22 insertions(+), 8 deletions(-)
  

Patch

diff --git a/doc/guides/rel_notes/release_22_07.rst b/doc/guides/rel_notes/release_22_07.rst
index 96db85a707..b26efb8719 100644
--- a/doc/guides/rel_notes/release_22_07.rst
+++ b/doc/guides/rel_notes/release_22_07.rst
@@ -166,6 +166,7 @@  New Features
 * **Updated Wangxun ngbe driver.**
 
   * Added support for yt8531s PHY.
+  * Added support for OEM subsystem vendor ID.
 
 * **Updated Wangxun txgbe driver.**
 
diff --git a/drivers/net/ngbe/base/ngbe_hw.c b/drivers/net/ngbe/base/ngbe_hw.c
index c1114ba3b1..283cdca367 100644
--- a/drivers/net/ngbe/base/ngbe_hw.c
+++ b/drivers/net/ngbe/base/ngbe_hw.c
@@ -1822,22 +1822,23 @@  s32 ngbe_enable_rx_dma(struct ngbe_hw *hw, u32 regval)
 /* cmd_addr is used for some special command:
  * 1. to be sector address, when implemented erase sector command
  * 2. to be flash address when implemented read, write flash address
+ *
+ * Return 0 on success, return 1 on failure.
  */
 u32 ngbe_fmgr_cmd_op(struct ngbe_hw *hw, u32 cmd, u32 cmd_addr)
 {
-	u32 cmd_val = 0;
-	u32 i = 0;
+	u32 cmd_val, i;
 
 	cmd_val = NGBE_SPICMD_CMD(cmd) | NGBE_SPICMD_CLK(3) | cmd_addr;
 	wr32(hw, NGBE_SPICMD, cmd_val);
 
-	for (i = 0; i < 10000; i++) {
+	for (i = 0; i < NGBE_SPI_TIMEOUT; i++) {
 		if (rd32(hw, NGBE_SPISTAT) & NGBE_SPISTAT_OPDONE)
 			break;
 
 		usec_delay(10);
 	}
-	if (i == 10000)
+	if (i == NGBE_SPI_TIMEOUT)
 		return 1;
 
 	return 0;
@@ -1845,10 +1846,10 @@  u32 ngbe_fmgr_cmd_op(struct ngbe_hw *hw, u32 cmd, u32 cmd_addr)
 
 u32 ngbe_flash_read_dword(struct ngbe_hw *hw, u32 addr)
 {
-	u32 status = 0;
+	u32 status;
 
 	status = ngbe_fmgr_cmd_op(hw, 1, addr);
-	if (status) {
+	if (status == 0x1) {
 		DEBUGOUT("Read flash timeout.");
 		return status;
 	}
diff --git a/drivers/net/ngbe/base/ngbe_type.h b/drivers/net/ngbe/base/ngbe_type.h
index 0ad4766d2a..4a6c273f1e 100644
--- a/drivers/net/ngbe/base/ngbe_type.h
+++ b/drivers/net/ngbe/base/ngbe_type.h
@@ -18,7 +18,7 @@ 
 #define NGBE_MAX_UTA              128
 
 #define NGBE_PCI_MASTER_DISABLE_TIMEOUT	800
-
+#define NGBE_SPI_TIMEOUT	10000
 
 #define NGBE_ALIGN		128 /* as intel did */
 #define NGBE_ISB_SIZE		16
diff --git a/drivers/net/ngbe/ngbe_ethdev.c b/drivers/net/ngbe/ngbe_ethdev.c
index 5ac1c27a58..ee09d54c2f 100644
--- a/drivers/net/ngbe/ngbe_ethdev.c
+++ b/drivers/net/ngbe/ngbe_ethdev.c
@@ -359,7 +359,19 @@  eth_ngbe_dev_init(struct rte_eth_dev *eth_dev, void *init_params __rte_unused)
 	hw->back = pci_dev;
 	hw->device_id = pci_dev->id.device_id;
 	hw->vendor_id = pci_dev->id.vendor_id;
-	hw->sub_system_id = pci_dev->id.subsystem_device_id;
+	if (pci_dev->id.subsystem_vendor_id == PCI_VENDOR_ID_WANGXUN) {
+		hw->sub_system_id = pci_dev->id.subsystem_device_id;
+	} else {
+		u32 ssid;
+
+		ssid = ngbe_flash_read_dword(hw, 0xFFFDC);
+		if (ssid == 0x1) {
+			PMD_INIT_LOG(ERR,
+				"Read of internal subsystem device id failed\n");
+			return -ENODEV;
+		}
+		hw->sub_system_id = (u16)ssid >> 8 | (u16)ssid << 8;
+	}
 	ngbe_map_device_id(hw);
 	hw->hw_addr = (void *)pci_dev->mem_resource[0].addr;