diff mbox series

[v2,7/7] net/ngbe: support YT PHY SGMII to RGMII mode

Message ID 20220622065613.661679-8-jiawenwu@trustnetic.com (mailing list archive)
State Accepted, archived
Delegated to: Ferruh Yigit
Headers
Series Fixes and supports for Wangxun NICs |

Checks

Context Check Description
ci/checkpatch warning coding style issues
ci/Intel-compilation success Compilation OK
ci/intel-Testing success Testing PASS
ci/iol-aarch64-unit-testing success Testing PASS
ci/iol-aarch64-compile-testing success Testing PASS
ci/github-robot: build success github build: passed
ci/iol-x86_64-unit-testing success Testing PASS
ci/iol-intel-Performance success Performance Testing PASS
ci/iol-x86_64-compile-testing success Testing PASS
ci/iol-intel-Functional success Functional Testing PASS
ci/iol-mellanox-Performance success Performance Testing PASS
ci/iol-abi-testing success Testing PASS

Commit Message

Jiawen Wu June 22, 2022, 6:56 a.m. UTC 
  Add SGMII to RGMII mode for yt8521s and yt8531s PHY.

Signed-off-by: Jiawen Wu <jiawenwu@trustnetic.com>
---
 doc/guides/rel_notes/release_22_07.rst |  1 +
 drivers/net/ngbe/base/ngbe_phy_yt.c    | 49 ++++++++++++++++++++++++++
 2 files changed, 50 insertions(+)
diff mbox series

Patch

diff --git a/doc/guides/rel_notes/release_22_07.rst b/doc/guides/rel_notes/release_22_07.rst
index a84c5b486b..6baa63e3bf 100644
--- a/doc/guides/rel_notes/release_22_07.rst
+++ b/doc/guides/rel_notes/release_22_07.rst
@@ -168,6 +168,7 @@  New Features
   * Added support for yt8531s PHY.
   * Added support for OEM subsystem vendor ID.
   * Added autoneg on/off for external PHY SFI mode.
+  * Added support for yt8521s/yt8531s PHY SGMII to RGMII mode.
 
 * **Updated Wangxun txgbe driver.**
 
diff --git a/drivers/net/ngbe/base/ngbe_phy_yt.c b/drivers/net/ngbe/base/ngbe_phy_yt.c
index bc1921e68a..562a0dede5 100644
--- a/drivers/net/ngbe/base/ngbe_phy_yt.c
+++ b/drivers/net/ngbe/base/ngbe_phy_yt.c
@@ -298,6 +298,55 @@  s32 ngbe_setup_phy_link_yt(struct ngbe_hw *hw, u32 speed,
 		value &= ~YT_SMI_PHY_SW_RST;
 		ngbe_write_phy_reg_ext_yt(hw, YT_CHIP, 0, value);
 
+		hw->phy.set_phy_power(hw, true);
+	} else if ((value & YT_CHIP_MODE_MASK) == YT_CHIP_MODE_SEL(5)) {
+		/* sgmii_to_rgmii */
+		if (!hw->mac.autoneg) {
+			switch (speed) {
+			case NGBE_LINK_SPEED_1GB_FULL:
+				value = YT_BCR_SPEED_SELECT1;
+				break;
+			case NGBE_LINK_SPEED_100M_FULL:
+				value = YT_BCR_SPEED_SELECT0;
+				break;
+			case NGBE_LINK_SPEED_10M_FULL:
+				value = 0;
+				break;
+			default:
+				value = YT_BCR_SPEED_SELECT0 |
+					YT_BCR_SPEED_SELECT1;
+				DEBUGOUT("unknown speed = 0x%x", speed);
+				break;
+			}
+			/* duplex full */
+			value |= YT_BCR_DUPLEX | YT_BCR_RESET;
+			hw->phy.write_reg(hw, YT_BCR, 0, value);
+
+			goto skip_an_sr;
+		}
+
+		value = 0;
+		if (speed & NGBE_LINK_SPEED_1GB_FULL) {
+			hw->phy.autoneg_advertised |= NGBE_LINK_SPEED_1GB_FULL;
+			value |= YT_BCR_SPEED_SELECT1;
+		}
+		if (speed & NGBE_LINK_SPEED_100M_FULL) {
+			hw->phy.autoneg_advertised |= NGBE_LINK_SPEED_100M_FULL;
+			value |= YT_BCR_SPEED_SELECT0;
+		}
+		if (speed & NGBE_LINK_SPEED_10M_FULL)
+			hw->phy.autoneg_advertised |= NGBE_LINK_SPEED_10M_FULL;
+
+		/* duplex full */
+		value |= YT_BCR_DUPLEX | YT_BCR_RESET;
+		hw->phy.write_reg(hw, YT_BCR, 0, value);
+
+		/* software reset to make the above configuration take effect */
+		hw->phy.read_reg(hw, YT_BCR, 0, &value);
+		value |= YT_BCR_RESET | YT_BCR_ANE | YT_BCR_RESTART_AN;
+		hw->phy.write_reg(hw, 0x0, 0, value);
+
+skip_an_sr:
 		hw->phy.set_phy_power(hw, true);
 	}