From patchwork Mon Aug 15 07:31:33 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Qi Zhang X-Patchwork-Id: 115065 X-Patchwork-Delegate: qi.z.zhang@intel.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id ABF2AA00C3; Mon, 15 Aug 2022 01:25:42 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 09AF842BFE; Mon, 15 Aug 2022 01:23:21 +0200 (CEST) Received: from mga14.intel.com (mga14.intel.com [192.55.52.115]) by mails.dpdk.org (Postfix) with ESMTP id EA4DB42B71 for ; Mon, 15 Aug 2022 01:23:17 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1660519398; x=1692055398; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=Y+mzdle6lCcEc+rGGdBqkaF/Z6SUwX4O7XMiTjMptRo=; b=AfsTQrH1EzjeROmQ/4szJb+4GBcWqbHAZGqMSNhObQrpzppLndfcGhA7 8rSSsxPJ3Qg2gZZUV1UwZS4MxBbpDA+GmXVy30OJViKngW+jBxdZBdlJl UPwws4QRKnVnypv9vogsk9987G+DuJRlVqki8kbLj16vieYObP8W7F9P/ 1hYPfBZKJpcxCI7Yzu7CMiXg/OQ8U6nCc+hW3S6yyskR2dRAhj8RdX32n C+dnI4cIqcbgyGhR6X/TCv0q8jzBXBorwRTyKE14VoZIkcBchwzV2g6Sw Ksgk9xbwBbDWDhX4ErhsEfULq+hNo9TdO5aaDZpEBXrWDwmPMPmjirgGG Q==; X-IronPort-AV: E=McAfee;i="6400,9594,10439"; a="291857979" X-IronPort-AV: E=Sophos;i="5.93,237,1654585200"; d="scan'208";a="291857979" Received: from orsmga008.jf.intel.com ([10.7.209.65]) by fmsmga103.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 14 Aug 2022 16:23:17 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.93,237,1654585200"; d="scan'208";a="635283197" Received: from dpdk-qzhan15-test02.sh.intel.com ([10.67.115.4]) by orsmga008.jf.intel.com with ESMTP; 14 Aug 2022 16:23:16 -0700 From: Qi Zhang To: qiming.yang@intel.com Cc: dev@dpdk.org, Qi Zhang , Victor Raj Subject: [PATCH v2 37/70] net/ice/base: support Tx topo config Date: Mon, 15 Aug 2022 03:31:33 -0400 Message-Id: <20220815073206.2917968-38-qi.z.zhang@intel.com> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20220815073206.2917968-1-qi.z.zhang@intel.com> References: <20220815071306.2910599-1-qi.z.zhang@intel.com> <20220815073206.2917968-1-qi.z.zhang@intel.com> MIME-Version: 1.0 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Complete the Tx topo config implementation. Signed-off-by: Victor Raj Signed-off-by: Qi Zhang --- drivers/net/ice/base/ice_adminq_cmd.h | 3 +++ drivers/net/ice/base/ice_common.c | 3 +++ 2 files changed, 6 insertions(+) diff --git a/drivers/net/ice/base/ice_adminq_cmd.h b/drivers/net/ice/base/ice_adminq_cmd.h index 9f84ffca67..8efbb137da 100644 --- a/drivers/net/ice/base/ice_adminq_cmd.h +++ b/drivers/net/ice/base/ice_adminq_cmd.h @@ -127,6 +127,9 @@ struct ice_aqc_list_caps_elem { #define ICE_AQC_CAPS_EXT_TOPO_DEV_IMG1 0x0082 #define ICE_AQC_CAPS_EXT_TOPO_DEV_IMG2 0x0083 #define ICE_AQC_CAPS_EXT_TOPO_DEV_IMG3 0x0084 +#define ICE_AQC_CAPS_TX_SCHED_TOPO_COMP_MODE 0x0085 +#define ICE_AQC_CAPS_NAC_TOPOLOGY 0x0087 +#define ICE_AQC_CAPS_ROCEV2_LAG 0x0092 u8 major_ver; u8 minor_ver; diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c index cb06fdf42b..db78bf4152 100644 --- a/drivers/net/ice/base/ice_common.c +++ b/drivers/net/ice/base/ice_common.c @@ -2453,6 +2453,9 @@ ice_parse_common_caps(struct ice_hw *hw, struct ice_hw_common_caps *caps, caps->ext_topo_dev_img_prog_en[index]); break; } + case ICE_AQC_CAPS_TX_SCHED_TOPO_COMP_MODE: + caps->tx_sched_topo_comp_mode_en = (number == 1); + break; default: /* Not one of the recognized common capabilities */ found = false;