From patchwork Mon Aug 15 07:31:40 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Qi Zhang X-Patchwork-Id: 115072 X-Patchwork-Delegate: qi.z.zhang@intel.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 5E586A00C3; Mon, 15 Aug 2022 01:26:15 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id E195842CCB; Mon, 15 Aug 2022 01:23:30 +0200 (CEST) Received: from mga14.intel.com (mga14.intel.com [192.55.52.115]) by mails.dpdk.org (Postfix) with ESMTP id 5C82B42CC6 for ; Mon, 15 Aug 2022 01:23:29 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1660519409; x=1692055409; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=kMNXMSN7U6XgAkxoWCFxC0LQe7Smos57f1rfImsH268=; b=LSOXz0LBeh07mR6IA0WBPSQWQgGPWOtwhwx5MRzqtYkW3Kny7RF8KtGq MYKx0pp27tsSudQYp/f965LY1KFFkcTrEPaJ19avnl+LdUrUHxaKtH6LQ Fw8ySyiwqDDTMDAtmwpGnEnM1YWhamsBBoBONWZtsBQjffG0FBjXtAnxk sSGHsDlErW2xycLe1jDIDQDb1PiCxfoAm4/VXORToko9HeadjZjmW/2IO KaacKuZi4Z7UWJsbXDs9ewGhdrwVesFDEzw0AyMroGZeARhAAI82JFKuG midhf8joZ4hIGEzfHdzA2e9opNrL+TZtSoJxdWK8eP6PI6Ab4MEIZ4aWf g==; X-IronPort-AV: E=McAfee;i="6400,9594,10439"; a="291857992" X-IronPort-AV: E=Sophos;i="5.93,237,1654585200"; d="scan'208";a="291857992" Received: from orsmga008.jf.intel.com ([10.7.209.65]) by fmsmga103.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 14 Aug 2022 16:23:29 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.93,237,1654585200"; d="scan'208";a="635283234" Received: from dpdk-qzhan15-test02.sh.intel.com ([10.67.115.4]) by orsmga008.jf.intel.com with ESMTP; 14 Aug 2022 16:23:27 -0700 From: Qi Zhang To: qiming.yang@intel.com Cc: dev@dpdk.org, Qi Zhang , Lukasz Czapnik Subject: [PATCH v2 44/70] net/ice/base: complete support for Tx balancing Date: Mon, 15 Aug 2022 03:31:40 -0400 Message-Id: <20220815073206.2917968-45-qi.z.zhang@intel.com> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20220815073206.2917968-1-qi.z.zhang@intel.com> References: <20220815071306.2910599-1-qi.z.zhang@intel.com> <20220815073206.2917968-1-qi.z.zhang@intel.com> MIME-Version: 1.0 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Add module ID and struct necessary to read and save Tx Scheduler Topology Tree User Selection data from PFA TLV. Signed-off-by: Lukasz Czapnik Signed-off-by: Qi Zhang --- drivers/net/ice/base/ice_adminq_cmd.h | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/drivers/net/ice/base/ice_adminq_cmd.h b/drivers/net/ice/base/ice_adminq_cmd.h index 7f9bdd3cb0..ebffee1b93 100644 --- a/drivers/net/ice/base/ice_adminq_cmd.h +++ b/drivers/net/ice/base/ice_adminq_cmd.h @@ -1936,6 +1936,15 @@ struct ice_aqc_nvm { #define ICE_AQC_NVM_LLDP_STATUS_M_LEN 4 /* In Bits */ #define ICE_AQC_NVM_LLDP_STATUS_RD_LEN 4 /* In Bytes */ +#define ICE_AQC_NVM_TX_TOPO_MOD_ID 0x14B + +struct ice_aqc_nvm_tx_topo_user_sel { + __le16 length; + u8 data; +#define ICE_AQC_NVM_TX_TOPO_USER_SEL BIT(4) + u8 reserved; +}; + /* Used for 0x0704 as well as for 0x0705 commands */ struct ice_aqc_nvm_cfg { u8 cmd_flags;