[v2,04/70] net/ice/base: make function names more generic

Message ID 20220815073206.2917968-5-qi.z.zhang@intel.com (mailing list archive)
State Accepted, archived
Delegated to: Qi Zhang
Headers
Series ice base code update |

Checks

Context Check Description
ci/checkpatch success coding style OK

Commit Message

Qi Zhang Aug. 15, 2022, 7:31 a.m. UTC
  Previously "e810t" was part of few function names.
In the future it will require to add similar functions
for different NIC types.
Make "NIC type" a suffix of the function name.

Signed-off-by: Arkadiusz Kubalewski <arkadiusz.kubalewski@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
 drivers/net/ice/base/ice_ptp_hw.c | 12 ++++++------
 drivers/net/ice/base/ice_ptp_hw.h |  6 +++---
 2 files changed, 9 insertions(+), 9 deletions(-)
  

Patch

diff --git a/drivers/net/ice/base/ice_ptp_hw.c b/drivers/net/ice/base/ice_ptp_hw.c
index 5b366c95c5..632a3f5bae 100644
--- a/drivers/net/ice/base/ice_ptp_hw.c
+++ b/drivers/net/ice/base/ice_ptp_hw.c
@@ -3161,7 +3161,7 @@  bool ice_is_gps_present_e810t(struct ice_hw *hw)
 }
 
 /**
- * ice_read_e810t_pca9575_reg
+ * ice_read_pca9575_reg_e810t
  * @hw: pointer to the hw struct
  * @offset: GPIO controller register offset
  * @data: pointer to data to be read from the GPIO controller
@@ -3169,7 +3169,7 @@  bool ice_is_gps_present_e810t(struct ice_hw *hw)
  * Read the register from the GPIO controller
  */
 enum ice_status
-ice_read_e810t_pca9575_reg(struct ice_hw *hw, u8 offset, u8 *data)
+ice_read_pca9575_reg_e810t(struct ice_hw *hw, u8 offset, u8 *data)
 {
 	struct ice_aqc_link_topo_addr link_topo;
 	enum ice_status status;
@@ -3191,7 +3191,7 @@  ice_read_e810t_pca9575_reg(struct ice_hw *hw, u8 offset, u8 *data)
 }
 
 /**
- * ice_write_e810t_pca9575_reg
+ * ice_write_pca9575_reg_e810t
  * @hw: pointer to the hw struct
  * @offset: GPIO controller register offset
  * @data: data to be written to the GPIO controller
@@ -3199,7 +3199,7 @@  ice_read_e810t_pca9575_reg(struct ice_hw *hw, u8 offset, u8 *data)
  * Write the data to the GPIO controller register
  */
 enum ice_status
-ice_write_e810t_pca9575_reg(struct ice_hw *hw, u8 offset, u8 data)
+ice_write_pca9575_reg_e810t(struct ice_hw *hw, u8 offset, u8 data)
 {
 	struct ice_aqc_link_topo_addr link_topo;
 	enum ice_status status;
@@ -3283,12 +3283,12 @@  enum ice_status ice_write_sma_ctrl_e810t(struct ice_hw *hw, u8 data)
 }
 
 /**
- * ice_e810t_is_pca9575_present
+ * ice_is_pca9575_present
  * @hw: pointer to the hw struct
  *
  * Check if the SW IO expander is present in the netlist
  */
-bool ice_e810t_is_pca9575_present(struct ice_hw *hw)
+bool ice_is_pca9575_present(struct ice_hw *hw)
 {
 	enum ice_status status;
 	__le16 handle = 0;
diff --git a/drivers/net/ice/base/ice_ptp_hw.h b/drivers/net/ice/base/ice_ptp_hw.h
index 4f349593aa..d27815fd94 100644
--- a/drivers/net/ice/base/ice_ptp_hw.h
+++ b/drivers/net/ice/base/ice_ptp_hw.h
@@ -224,12 +224,12 @@  enum ice_status ice_phy_exit_bypass_e822(struct ice_hw *hw, u8 port);
 bool ice_is_gps_present_e810t(struct ice_hw *hw);
 enum ice_status ice_ptp_init_phy_e810(struct ice_hw *hw);
 enum ice_status
-ice_read_e810t_pca9575_reg(struct ice_hw *hw, u8 offset, u8 *data);
+ice_read_pca9575_reg_e810t(struct ice_hw *hw, u8 offset, u8 *data);
 enum ice_status
-ice_write_e810t_pca9575_reg(struct ice_hw *hw, u8 offset, u8 data);
+ice_write_pca9575_reg_e810t(struct ice_hw *hw, u8 offset, u8 data);
 enum ice_status ice_read_sma_ctrl_e810t(struct ice_hw *hw, u8 *data);
 enum ice_status ice_write_sma_ctrl_e810t(struct ice_hw *hw, u8 data);
-bool ice_e810t_is_pca9575_present(struct ice_hw *hw);
+bool ice_is_pca9575_present(struct ice_hw *hw);
 
 #define PFTSYN_SEM_BYTES	4