From patchwork Mon Aug 15 07:31:53 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Qi Zhang X-Patchwork-Id: 115085 X-Patchwork-Delegate: qi.z.zhang@intel.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 4CC3FA00C3; Mon, 15 Aug 2022 01:27:17 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id C81D042BB3; Mon, 15 Aug 2022 01:23:52 +0200 (CEST) Received: from mga18.intel.com (mga18.intel.com [134.134.136.126]) by mails.dpdk.org (Postfix) with ESMTP id E5A7242B98 for ; Mon, 15 Aug 2022 01:23:49 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1660519430; x=1692055430; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=WYl0Zsf8B3ZtZjsYDd/5b3cUHEV/efTU1YBAdYkl1A4=; b=nvLD9jdiRcoo32mLG4q9snwnSRMpXRYYCKmqi8FksrqrDGcRsASuAnxT 8gFWmiISp0qqwoElQ00b7z6BupI9IJdAx4zQzlMEvlED+NQdCpWbhJSC3 05wb9Ek892F2/9JYq/66a0ZdE2K5DZ8AfjNzEXNTYNjTirt/r/WqFdwEl MshOC30tS9iPUF19/SeQKQJUKYq/x51ukJuc5iPDzNlkJPU8XShTrI4C3 t1dmWFK+tC5eqXzNMZ2VFFzCd9dKexJTfdwjN9Px2X86wthVInGsWb0bC R1ntqmr6kwEcxvvzpDfrrUEQPCJAPPuJ9rqlJ2pY2I96x1ac8TldhtUFw A==; X-IronPort-AV: E=McAfee;i="6400,9594,10439"; a="274914510" X-IronPort-AV: E=Sophos;i="5.93,237,1654585200"; d="scan'208";a="274914510" Received: from orsmga008.jf.intel.com ([10.7.209.65]) by orsmga106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 14 Aug 2022 16:23:49 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.93,237,1654585200"; d="scan'208";a="635283305" Received: from dpdk-qzhan15-test02.sh.intel.com ([10.67.115.4]) by orsmga008.jf.intel.com with ESMTP; 14 Aug 2022 16:23:48 -0700 From: Qi Zhang To: qiming.yang@intel.com Cc: dev@dpdk.org, Qi Zhang , Michal Swiatkowski Subject: [PATCH v2 57/70] net/ice/base: add GRE Tap tunnel type Date: Mon, 15 Aug 2022 03:31:53 -0400 Message-Id: <20220815073206.2917968-58-qi.z.zhang@intel.com> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20220815073206.2917968-1-qi.z.zhang@intel.com> References: <20220815071306.2910599-1-qi.z.zhang@intel.com> <20220815073206.2917968-1-qi.z.zhang@intel.com> MIME-Version: 1.0 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Added new tunnel type to support NvGRE Signed-off-by: Michal Swiatkowski Signed-off-by: Qi Zhang --- drivers/net/ice/base/ice_flex_type.h | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/net/ice/base/ice_flex_type.h b/drivers/net/ice/base/ice_flex_type.h index 2855d67831..070d2aeb1e 100644 --- a/drivers/net/ice/base/ice_flex_type.h +++ b/drivers/net/ice/base/ice_flex_type.h @@ -441,6 +441,7 @@ struct ice_prof_redir_section { enum ice_tunnel_type { TNL_VXLAN = 0, TNL_GENEVE, + TNL_GRETAP, TNL_ECPRI, TNL_GTP, TNL_LAST = 0xFF,