From patchwork Mon Aug 15 07:32:00 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Qi Zhang X-Patchwork-Id: 115092 X-Patchwork-Delegate: qi.z.zhang@intel.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 0AC39A00C3; Mon, 15 Aug 2022 01:27:48 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id E835342D1A; Mon, 15 Aug 2022 01:24:02 +0200 (CEST) Received: from mga18.intel.com (mga18.intel.com [134.134.136.126]) by mails.dpdk.org (Postfix) with ESMTP id 197D142D0D for ; Mon, 15 Aug 2022 01:24:00 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1660519441; x=1692055441; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=z47RY6Gfi/LTvot5CPS/rkg12Sp0wrgohQDo1hR5KCA=; b=C+7p1eSLr0aJ7xS8sJ31I0w/SbovlDCsYL7onvHYf83KzxpmDJLLdZRk 3a3l7BKiDKirzUm/mdztGi4m6Vvu/YyLq9muiS+afI9eALsTT0/zTq2cQ FfWUVs1K4rFnoiLgKjbRBxqbdDiQ0/IjxFwO9wWlJSTfjCcGuBWJwCOPo r0sYp9uYLLE4pzVz7z58LozJ6zHyl8QQ6oD8qGVHN1HcesKpKT7y23RmI W65OdErLCaQq3wMjQPQo3LN9kb1peKrkSkI+BX5Qoc7JMB7wVpvXF/YA3 qmmwydZETmBXuQnJMDhlAlAiQzSUieds+mr3NSU2qnofJZw+6Xpm4NjR4 Q==; X-IronPort-AV: E=McAfee;i="6400,9594,10439"; a="274914520" X-IronPort-AV: E=Sophos;i="5.93,237,1654585200"; d="scan'208";a="274914520" Received: from orsmga008.jf.intel.com ([10.7.209.65]) by orsmga106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 14 Aug 2022 16:24:00 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.93,237,1654585200"; d="scan'208";a="635283357" Received: from dpdk-qzhan15-test02.sh.intel.com ([10.67.115.4]) by orsmga008.jf.intel.com with ESMTP; 14 Aug 2022 16:23:59 -0700 From: Qi Zhang To: qiming.yang@intel.com Cc: dev@dpdk.org, Qi Zhang , Karol Kolacinski Subject: [PATCH v2 64/70] net/ice/base: convert 1588 structs to use bitfields Date: Mon, 15 Aug 2022 03:32:00 -0400 Message-Id: <20220815073206.2917968-65-qi.z.zhang@intel.com> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20220815073206.2917968-1-qi.z.zhang@intel.com> References: <20220815071306.2910599-1-qi.z.zhang@intel.com> <20220815073206.2917968-1-qi.z.zhang@intel.com> MIME-Version: 1.0 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Use bitfields in 1588 structs so they don't waste too much space. Signed-off-by: Karol Kolacinski Signed-off-by: Qi Zhang --- drivers/net/ice/base/ice_type.h | 28 ++++++++++++++-------------- 1 file changed, 14 insertions(+), 14 deletions(-) diff --git a/drivers/net/ice/base/ice_type.h b/drivers/net/ice/base/ice_type.h index 6d0adf0dd1..043dae7781 100644 --- a/drivers/net/ice/base/ice_type.h +++ b/drivers/net/ice/base/ice_type.h @@ -662,12 +662,12 @@ struct ice_ts_func_info { /* Function specific info */ enum ice_time_ref_freq time_ref; u8 clk_freq; - u8 clk_src; - u8 tmr_index_assoc; - u8 ena; - u8 tmr_index_owned; - u8 src_tmr_owned; - u8 tmr_ena; + u8 clk_src : 1; + u8 tmr_index_assoc : 1; + u8 ena : 1; + u8 tmr_index_owned : 1; + u8 src_tmr_owned : 1; + u8 tmr_ena : 1; }; /* Device specific definitions */ @@ -685,14 +685,14 @@ struct ice_ts_dev_info { /* Device specific info */ u32 ena_ports; u32 tmr_own_map; - u32 tmr0_owner; - u32 tmr1_owner; - u8 tmr0_owned; - u8 tmr1_owned; - u8 ena; - u8 tmr0_ena; - u8 tmr1_ena; - u8 ts_ll_read; + u8 tmr0_owner; + u8 tmr1_owner; + u8 tmr0_owned : 1; + u8 tmr1_owned : 1; + u8 ena : 1; + u8 tmr0_ena : 1; + u8 tmr1_ena : 1; + u8 ts_ll_read : 1; }; /* Function specific capabilities */