From patchwork Mon Aug 15 07:32:05 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Qi Zhang X-Patchwork-Id: 115097 X-Patchwork-Delegate: qi.z.zhang@intel.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id B16D0A00C3; Mon, 15 Aug 2022 01:28:10 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id B8EA042D2E; Mon, 15 Aug 2022 01:24:11 +0200 (CEST) Received: from mga18.intel.com (mga18.intel.com [134.134.136.126]) by mails.dpdk.org (Postfix) with ESMTP id 2B0E642CE4 for ; Mon, 15 Aug 2022 01:24:09 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1660519449; x=1692055449; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=fgXooq8EI0FcsaEX0WzSmt1r4Zj7526GbzzAKdkqgbs=; b=g8F54lYSgDtA0XPdgBG1y5WFTULz2quR7ohF8gJpLXrxRoYnO8xLaBnX Hu3XWCCISc8jpQzx37W/RCGupOpgzF4/pUg4BaYEDGXqXRkPnWSqP5Lkx YuJ/5u0d4qwTaPFCfB8O6OW51S5mMifUnfceBlSOVVfX+fBakfhiFUXqZ z8wuotkg6kU4SNA5rhSDbLUul2Li1yQi3bGXyPCt1v/XvBmx0c8u2nlYS vcbthiwypkI7nTnX06yAKJbdP3Z4r+FvnUCBfMe3z8Eqv56fR2kOFSvKd rgbUTcJ704gR05IRHtvQJqvOV1deBLntby1nI+KRF8pOYHaYNBbL5ZH0t w==; X-IronPort-AV: E=McAfee;i="6400,9594,10439"; a="274914532" X-IronPort-AV: E=Sophos;i="5.93,237,1654585200"; d="scan'208";a="274914532" Received: from orsmga008.jf.intel.com ([10.7.209.65]) by orsmga106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 14 Aug 2022 16:24:08 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.93,237,1654585200"; d="scan'208";a="635283393" Received: from dpdk-qzhan15-test02.sh.intel.com ([10.67.115.4]) by orsmga008.jf.intel.com with ESMTP; 14 Aug 2022 16:24:07 -0700 From: Qi Zhang To: qiming.yang@intel.com Cc: dev@dpdk.org, Qi Zhang Subject: [PATCH v2 69/70] net/ice/base: couple code clean Date: Mon, 15 Aug 2022 03:32:05 -0400 Message-Id: <20220815073206.2917968-70-qi.z.zhang@intel.com> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20220815073206.2917968-1-qi.z.zhang@intel.com> References: <20220815071306.2910599-1-qi.z.zhang@intel.com> <20220815073206.2917968-1-qi.z.zhang@intel.com> MIME-Version: 1.0 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org 1. remove unused code 2. reduce variable scope 3. fix comment Signed-off-by: Qi Zhang --- drivers/net/ice/base/ice_common.c | 2 +- drivers/net/ice/base/ice_flex_pipe.c | 20 ++++++-------------- drivers/net/ice/base/ice_flow.c | 1 - drivers/net/ice/base/ice_nvm.c | 2 +- drivers/net/ice/base/ice_ptp_hw.c | 13 +++++-------- drivers/net/ice/base/ice_sched.c | 12 ++++++++---- drivers/net/ice/base/ice_switch.c | 7 +++++-- 7 files changed, 26 insertions(+), 31 deletions(-) diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c index 3d4e05f2b0..29d4be6618 100644 --- a/drivers/net/ice/base/ice_common.c +++ b/drivers/net/ice/base/ice_common.c @@ -801,7 +801,7 @@ ice_fill_tx_timer_and_fc_thresh(struct ice_hw *hw, * LFC. Thus, we will use index = * PRTMAC_HSEC_CTL_TX_PAUSE_QUANTA_MAX_INDEX. * - * Also, because we are opearating on transmit timer and fc + * Also, because we are operating on transmit timer and fc * threshold of LFC, we don't turn on any bit in tx_tmr_priority */ #define IDX_OF_LFC PRTMAC_HSEC_CTL_TX_PAUSE_QUANTA_MAX_INDEX diff --git a/drivers/net/ice/base/ice_flex_pipe.c b/drivers/net/ice/base/ice_flex_pipe.c index 63ddda2df9..aec6ec3323 100644 --- a/drivers/net/ice/base/ice_flex_pipe.c +++ b/drivers/net/ice/base/ice_flex_pipe.c @@ -8,17 +8,6 @@ #include "ice_protocol_type.h" #include "ice_flow.h" -/* For supporting double VLAN mode, it is necessary to enable or disable certain - * boost tcam entries. The metadata labels names that match the following - * prefixes will be saved to allow enabling double VLAN mode. - */ -#define ICE_DVM_PRE "BOOST_MAC_VLAN_DVM" /* enable these entries */ -#define ICE_SVM_PRE "BOOST_MAC_VLAN_SVM" /* disable these entries */ - -/* To support tunneling entries by PF, the package will append the PF number to - * the label; for example TNL_VXLAN_PF0, TNL_VXLAN_PF1, TNL_VXLAN_PF2, etc. - */ -#define ICE_TNL_PRE "TNL_" static const struct ice_tunnel_type_scan tnls[] = { { TNL_VXLAN, "TNL_VXLAN_PF" }, { TNL_GENEVE, "TNL_GENEVE_PF" }, @@ -526,10 +515,11 @@ ice_upd_dvm_boost_entry(struct ice_hw *hw, struct ice_dvm_entry *entry) */ enum ice_status ice_set_dvm_boost_entries(struct ice_hw *hw) { - enum ice_status status; u16 i; for (i = 0; i < hw->dvm_upd.count; i++) { + enum ice_status status; + status = ice_upd_dvm_boost_entry(hw, &hw->dvm_upd.tbl[i]); if (status) return status; @@ -3414,12 +3404,13 @@ ice_rem_vsig(struct ice_hw *hw, enum ice_block blk, u16 vsig, u16 idx = vsig & ICE_VSIG_IDX_M; struct ice_vsig_vsi *vsi_cur; struct ice_vsig_prof *d, *t; - enum ice_status status; /* remove TCAM entries */ LIST_FOR_EACH_ENTRY_SAFE(d, t, &hw->blk[blk].xlt2.vsig_tbl[idx].prop_lst, ice_vsig_prof, list) { + enum ice_status status; + status = ice_rem_prof_id(hw, blk, d); if (status) return status; @@ -3469,12 +3460,13 @@ ice_rem_prof_id_vsig(struct ice_hw *hw, enum ice_block blk, u16 vsig, u64 hdl, { u16 idx = vsig & ICE_VSIG_IDX_M; struct ice_vsig_prof *p, *t; - enum ice_status status; LIST_FOR_EACH_ENTRY_SAFE(p, t, &hw->blk[blk].xlt2.vsig_tbl[idx].prop_lst, ice_vsig_prof, list) if (p->profile_cookie == hdl) { + enum ice_status status; + if (ice_vsig_prof_id_count(hw, blk, vsig) == 1) /* this is the last profile, remove the VSIG */ return ice_rem_vsig(hw, blk, vsig, chg); diff --git a/drivers/net/ice/base/ice_flow.c b/drivers/net/ice/base/ice_flow.c index 33e97ec333..8a44823895 100644 --- a/drivers/net/ice/base/ice_flow.c +++ b/drivers/net/ice/base/ice_flow.c @@ -2583,7 +2583,6 @@ ice_flow_set_hw_prof(struct ice_hw *hw, u16 dest_vsi_handle, struct ice_flow_prof_params *params; u8 fv_words = hw->blk[blk].es.fvw; enum ice_status status; - u16 vsi_num; int i, idx; params = (struct ice_flow_prof_params *)ice_malloc(hw, sizeof(*params)); diff --git a/drivers/net/ice/base/ice_nvm.c b/drivers/net/ice/base/ice_nvm.c index 293b71905d..25a38e1610 100644 --- a/drivers/net/ice/base/ice_nvm.c +++ b/drivers/net/ice/base/ice_nvm.c @@ -725,7 +725,6 @@ ice_get_orom_civd_data(struct ice_hw *hw, enum ice_bank_select bank, struct ice_orom_civd_info *civd) { struct ice_orom_civd_info tmp; - enum ice_status status; u32 offset; /* The CIVD section is located in the Option ROM aligned to 512 bytes. @@ -734,6 +733,7 @@ ice_get_orom_civd_data(struct ice_hw *hw, enum ice_bank_select bank, * equal 0. */ for (offset = 0; (offset + 512) <= hw->flash.banks.orom_size; offset += 512) { + enum ice_status status; u8 sum = 0, i; status = ice_read_flash_module(hw, bank, ICE_SR_1ST_OROM_BANK_PTR, diff --git a/drivers/net/ice/base/ice_ptp_hw.c b/drivers/net/ice/base/ice_ptp_hw.c index 974c96f60c..e6b21809e0 100644 --- a/drivers/net/ice/base/ice_ptp_hw.c +++ b/drivers/net/ice/base/ice_ptp_hw.c @@ -4805,10 +4805,7 @@ enum ice_status ice_write_sma_ctrl_e810t(struct ice_hw *hw, u8 data) bool ice_is_pca9575_present(struct ice_hw *hw) { enum ice_status status; - __le16 handle = 0; - - if (!ice_is_e810t(hw)) - return false; + u16 handle = 0; status = ice_get_pca9575_handle(hw, &handle); if (!status && handle) @@ -4819,8 +4816,8 @@ bool ice_is_pca9575_present(struct ice_hw *hw) /* Device agnostic functions * - * The following functions implement shared behavior common to both E822 and - * E810 devices, possibly calling a device specific implementation where + * The following functions implement shared behavior common to both E822/E823 + * and E810 devices, possibly calling a device specific implementation where * necessary. */ @@ -5164,9 +5161,9 @@ ice_ptp_adj_clock_at_time(struct ice_hw *hw, u64 at_time, s32 adj) } /** - * ice_read_phy_tstamp - Read a PHY timestamp from the timestamo block + * ice_read_phy_tstamp - Read a PHY timestamp from the timestamp block * @hw: pointer to the HW struct - * @block: the block to read from + * @block: the block/port to read from * @idx: the timestamp index to read * @tstamp: on return, the 40bit timestamp value * diff --git a/drivers/net/ice/base/ice_sched.c b/drivers/net/ice/base/ice_sched.c index 3162b528c0..0e2e26d95e 100644 --- a/drivers/net/ice/base/ice_sched.c +++ b/drivers/net/ice/base/ice_sched.c @@ -1708,7 +1708,6 @@ ice_sched_add_vsi_child_nodes(struct ice_port_info *pi, u16 vsi_handle, { struct ice_sched_node *parent, *node; struct ice_hw *hw = pi->hw; - enum ice_status status; u32 first_node_teid; u16 num_added = 0; u8 i, qgl, vsil; @@ -1717,6 +1716,8 @@ ice_sched_add_vsi_child_nodes(struct ice_port_info *pi, u16 vsi_handle, vsil = ice_sched_get_vsi_layer(hw); parent = ice_sched_get_vsi_node(pi, tc_node, vsi_handle); for (i = vsil + 1; i <= qgl; i++) { + enum ice_status status; + if (!parent) return ICE_ERR_CFG; @@ -1810,7 +1811,6 @@ ice_sched_add_vsi_support_nodes(struct ice_port_info *pi, u16 vsi_handle, struct ice_sched_node *tc_node, u16 *num_nodes) { struct ice_sched_node *parent = tc_node; - enum ice_status status; u32 first_node_teid; u16 num_added = 0; u8 i, vsil; @@ -1820,6 +1820,8 @@ ice_sched_add_vsi_support_nodes(struct ice_port_info *pi, u16 vsi_handle, vsil = ice_sched_get_vsi_layer(pi->hw); for (i = pi->hw->sw_entry_point_layer; i <= vsil; i++) { + enum ice_status status; + status = ice_sched_add_nodes_to_layer(pi, tc_node, parent, i, num_nodes[i], &first_node_teid, @@ -4860,7 +4862,6 @@ ice_sched_get_node_by_id_type(struct ice_port_info *pi, u32 id, enum ice_agg_type agg_type, u8 tc) { struct ice_sched_node *node = NULL; - struct ice_sched_node *child_node; switch (agg_type) { case ICE_AGG_TYPE_VSI: { @@ -4891,13 +4892,16 @@ ice_sched_get_node_by_id_type(struct ice_port_info *pi, u32 id, node = ice_sched_find_node_by_teid(pi->root, id); break; - case ICE_AGG_TYPE_QG: + case ICE_AGG_TYPE_QG: { + struct ice_sched_node *child_node; + /* The current implementation allows single qg to modify */ child_node = ice_sched_find_node_by_teid(pi->root, id); if (!child_node) break; node = child_node->parent; break; + } default: break; diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c index bb7e76bd29..1cf8faeed5 100644 --- a/drivers/net/ice/base/ice_switch.c +++ b/drivers/net/ice/base/ice_switch.c @@ -4255,11 +4255,12 @@ ice_update_pkt_fwd_rule(struct ice_hw *hw, struct ice_fltr_info *f_info) */ enum ice_status ice_update_sw_rule_bridge_mode(struct ice_hw *hw) { - struct ice_switch_info *sw = hw->switch_info; struct ice_fltr_mgmt_list_entry *fm_entry; enum ice_status status = ICE_SUCCESS; struct LIST_HEAD_TYPE *rule_head; struct ice_lock *rule_lock; /* Lock to protect filter rule list */ + struct ice_switch_info *sw; + sw = hw->switch_info; rule_lock = &sw->recp_list[ICE_SW_LKUP_MAC].filt_rule_lock; rule_head = &sw->recp_list[ICE_SW_LKUP_MAC].filt_rules; @@ -9536,10 +9537,12 @@ enum ice_status ice_replay_vsi_all_fltr(struct ice_hw *hw, struct ice_port_info *pi, u16 vsi_handle) { - struct ice_switch_info *sw = hw->switch_info; + struct ice_switch_info *sw; enum ice_status status; u8 i; + sw = hw->switch_info; + /* Update the recipes that were created */ for (i = 0; i < ICE_MAX_NUM_RECIPES; i++) { struct LIST_HEAD_TYPE *head;