[v2,RESEND] config/arm: add PHYTIUM tys2500

Message ID 20220909071121.388-1-luzhipeng@cestc.cn (mailing list archive)
State Superseded, archived
Delegated to: Thomas Monjalon
Headers
Series [v2,RESEND] config/arm: add PHYTIUM tys2500 |

Checks

Context Check Description
ci/checkpatch warning coding style issues
ci/Intel-compilation fail Compilation issues
ci/iol-intel-Functional success Functional Testing PASS
ci/iol-mellanox-Performance success Performance Testing PASS
ci/iol-aarch64-compile-testing success Testing PASS
ci/iol-intel-Performance success Performance Testing PASS
ci/iol-aarch64-unit-testing success Testing PASS
ci/iol-x86_64-unit-testing success Testing PASS
ci/iol-x86_64-compile-testing success Testing PASS
ci/github-robot: build success github build: passed
ci/intel-Testing success Testing PASS

Commit Message

luzhipeng Sept. 9, 2022, 7:11 a.m. UTC
  Here adds configs for PHYTIUM server.

Signed-off-by: luzhipeng <luzhipeng@cestc.cn>

---
 v2->v1:
       1. add ccache for cross build
       2. rename fts2500 to tys2500 and modify the corresponding position
 config/arm/arm64_tys2500_linux_gcc | 16 ++++++++++++++++
 config/arm/meson.build             | 26 +++++++++++++++++++++++---
 2 files changed, 39 insertions(+), 3 deletions(-)
 create mode 100644 config/arm/arm64_tys2500_linux_gcc
  

Comments

Ruifeng Wang Sept. 9, 2022, 8:07 a.m. UTC | #1
> -----Original Message-----
> From: luzhipeng <luzhipeng@cestc.cn>
> Sent: Friday, September 9, 2022 3:11 PM
> To: dev@dpdk.org
> Cc: Jan Viktorin <viktorin@rehivetech.com>; Ruifeng Wang <Ruifeng.Wang@arm.com>; Bruce
> Richardson <bruce.richardson@intel.com>; luzhipeng <luzhipeng@cestc.cn>
> Subject: [PATCH v2 RESEND] config/arm: add PHYTIUM tys2500
> 
> Here adds configs for PHYTIUM server.
> 
> Signed-off-by: luzhipeng <luzhipeng@cestc.cn>
> 
> ---
>  v2->v1:
>        1. add ccache for cross build
>        2. rename fts2500 to tys2500 and modify the corresponding position
> config/arm/arm64_tys2500_linux_gcc | 16 ++++++++++++++++
>  config/arm/meson.build             | 26 +++++++++++++++++++++++---
>  2 files changed, 39 insertions(+), 3 deletions(-)  create mode 100644
> config/arm/arm64_tys2500_linux_gcc
> 
> diff --git a/config/arm/arm64_tys2500_linux_gcc b/config/arm/arm64_tys2500_linux_gcc
> new file mode 100644
> index 0000000000..fce85fb0d8
> --- /dev/null
> +++ b/config/arm/arm64_tys2500_linux_gcc
> @@ -0,0 +1,16 @@
> +[binaries]
> +c = ['ccache', 'aarch64-linux-gnu-gcc'] cpp = ['ccache',
> +'aarch64-linux-gnu-g++'] ar = 'aarch64-linux-gnu-gcc-ar'
> +strip = 'aarch64-linux-gnu-strip'
> +pkgconfig = 'aarch64-linux-gnu-pkg-config'
> +pcap-config = ''
> +
> +[host_machine]
> +system = 'linux'
> +cpu_family = 'aarch64'
> +cpu = 'armv8-a'
> +endian = 'little'
> +
> +[properties]
> +platform = 'tys2500'
> diff --git a/config/arm/meson.build b/config/arm/meson.build index 9f1636e0d5..5c4aa721e9
> 100644
> --- a/config/arm/meson.build
> +++ b/config/arm/meson.build
> @@ -203,13 +203,24 @@ implementer_phytium = {
>          ['RTE_MACHINE', '"armv8a"'],
>          ['RTE_USE_C11_MEM_MODEL', true],
>          ['RTE_CACHE_LINE_SIZE', 64],
> -        ['RTE_MAX_LCORE', 64],
> -        ['RTE_MAX_NUMA_NODES', 8]
>      ],
>      'part_number_config': {
>          '0x662': {
> -            'machine_args': ['-march=armv8-a+crc'],
> +            'march': 'armv8-a',
> +            'machine_args': ['crc'],

Should be 'march_features'.

> +            'flags': [
> +                ['RTE_MAX_LCORE', 64],
> +                ['RTE_MAX_NUMA_NODES', 8]
> +             ]
>          },
> +       '0x663': {
> +            'march': 'armv8-a',
> +            'machine_args': ['crc'],

Idem.
> +            'flags': [
> +                ['RTE_MAX_LCORE', 256],
> +                ['RTE_MAX_NUMA_NODES', 32]
> +            ]
> +        }
>      }
>  }
> 
> @@ -328,6 +339,13 @@ soc_ft2000plus = {
>      'numa': true
>  }
> 
> +soc_tys2500 = {
> +    'description': 'Phytium TengYun S2500',
> +    'implementer': '0x70',
> +    'part_number': '0x663',
> +    'numa': true
> +}
> +
>  soc_graviton2 = {
>      'description': 'AWS Graviton2',
>      'implementer': '0x41',
> @@ -414,6 +432,7 @@ cn10k:           Marvell OCTEON 10
>  dpaa:            NXP DPAA
>  emag:            Ampere eMAG
>  ft2000plus:      Phytium FT-2000+
> +tys2500:         Phytium TengYun S2500
>  graviton2:       AWS Graviton2
>  kunpeng920:      HiSilicon Kunpeng 920
>  kunpeng930:      HiSilicon Kunpeng 930
> @@ -438,6 +457,7 @@ socs = {
>      'dpaa': soc_dpaa,
>      'emag': soc_emag,
>      'ft2000plus': soc_ft2000plus,
> +    'tys2500': soc_tys2500,
>      'graviton2': soc_graviton2,
>      'kunpeng920': soc_kunpeng920,
>      'kunpeng930': soc_kunpeng930,
> --
> 2.27.0
> 
>
  
Ferruh Yigit Sept. 9, 2022, 9:01 a.m. UTC | #2
On 9/9/2022 8:11 AM, luzhipeng wrote:
> Here adds configs for PHYTIUM server.
> 
> Signed-off-by: luzhipeng<luzhipeng@cestc.cn>

Hi luzhipeng,

What does 'RESEND' mean in the patch title?


Also can you please use following format for the sign-off:

`Signed-off-by: Real-name Real-surname <email@domain.xxx>`

More detail can be found at
- https://doc.dpdk.org/guides/contributing/patches.html
- 
https://www.kernel.org/doc/html/latest/process/submitting-patches.html#developer-s-certificate-of-origin-1-1
  

Patch

diff --git a/config/arm/arm64_tys2500_linux_gcc b/config/arm/arm64_tys2500_linux_gcc
new file mode 100644
index 0000000000..fce85fb0d8
--- /dev/null
+++ b/config/arm/arm64_tys2500_linux_gcc
@@ -0,0 +1,16 @@ 
+[binaries]
+c = ['ccache', 'aarch64-linux-gnu-gcc']
+cpp = ['ccache', 'aarch64-linux-gnu-g++']
+ar = 'aarch64-linux-gnu-gcc-ar'
+strip = 'aarch64-linux-gnu-strip'
+pkgconfig = 'aarch64-linux-gnu-pkg-config'
+pcap-config = ''
+
+[host_machine]
+system = 'linux'
+cpu_family = 'aarch64'
+cpu = 'armv8-a'
+endian = 'little'
+
+[properties]
+platform = 'tys2500'
diff --git a/config/arm/meson.build b/config/arm/meson.build
index 9f1636e0d5..5c4aa721e9 100644
--- a/config/arm/meson.build
+++ b/config/arm/meson.build
@@ -203,13 +203,24 @@  implementer_phytium = {
         ['RTE_MACHINE', '"armv8a"'],
         ['RTE_USE_C11_MEM_MODEL', true],
         ['RTE_CACHE_LINE_SIZE', 64],
-        ['RTE_MAX_LCORE', 64],
-        ['RTE_MAX_NUMA_NODES', 8]
     ],
     'part_number_config': {
         '0x662': {
-            'machine_args': ['-march=armv8-a+crc'],
+            'march': 'armv8-a',
+            'machine_args': ['crc'],
+            'flags': [
+                ['RTE_MAX_LCORE', 64],
+                ['RTE_MAX_NUMA_NODES', 8]
+             ]
         },
+       '0x663': {
+            'march': 'armv8-a',
+            'machine_args': ['crc'],
+            'flags': [
+                ['RTE_MAX_LCORE', 256],
+                ['RTE_MAX_NUMA_NODES', 32]
+            ]
+        }
     }
 }
 
@@ -328,6 +339,13 @@  soc_ft2000plus = {
     'numa': true
 }
 
+soc_tys2500 = {
+    'description': 'Phytium TengYun S2500',
+    'implementer': '0x70',
+    'part_number': '0x663',
+    'numa': true
+}
+
 soc_graviton2 = {
     'description': 'AWS Graviton2',
     'implementer': '0x41',
@@ -414,6 +432,7 @@  cn10k:           Marvell OCTEON 10
 dpaa:            NXP DPAA
 emag:            Ampere eMAG
 ft2000plus:      Phytium FT-2000+
+tys2500:         Phytium TengYun S2500
 graviton2:       AWS Graviton2
 kunpeng920:      HiSilicon Kunpeng 920
 kunpeng930:      HiSilicon Kunpeng 930
@@ -438,6 +457,7 @@  socs = {
     'dpaa': soc_dpaa,
     'emag': soc_emag,
     'ft2000plus': soc_ft2000plus,
+    'tys2500': soc_tys2500,
     'graviton2': soc_graviton2,
     'kunpeng920': soc_kunpeng920,
     'kunpeng930': soc_kunpeng930,