From patchwork Thu Oct 13 11:41:51 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nithin Dabilpuram X-Patchwork-Id: 118146 X-Patchwork-Delegate: jerinj@marvell.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 49D58A00C2; Thu, 13 Oct 2022 13:42:51 +0200 (CEST) Received: from [217.70.189.124] (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 5086642F20; Thu, 13 Oct 2022 13:42:27 +0200 (CEST) Received: from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com [67.231.156.173]) by mails.dpdk.org (Postfix) with ESMTP id DF37D42F1E for ; Thu, 13 Oct 2022 13:42:25 +0200 (CEST) Received: from pps.filterd (m0045851.ppops.net [127.0.0.1]) by mx0b-0016f401.pphosted.com (8.17.1.5/8.17.1.5) with ESMTP id 29D9IY4w010992 for ; Thu, 13 Oct 2022 04:42:25 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=pfpt0220; bh=zJG6MkiXiMJnwzB5Bd+wSO/zOBkPXbaYk95G38zkyG0=; b=XM0sRD0FpNH7I4AwVGf5MDx37UDEZS8S5ICySqAd8h8VzMa715FGDUez3y78AkrPaVfY pAV/ph7t0WXT7sT1PuylocXxIIlZJEBdsSSWykmE2YeppVODi+DbenRTWZwaqaPSGrSb AFpyme4UQOXir1UCCIdccOD3ZR0Q8FFvphPQ/hjbXN/w/5YqGtNwkR5X2c1VCYdRrZpB X9i36SPU2h1w6flryk7cg+4ZuG4MUWRazXMi5Yury0Tuudjf+iW+O5gevXdzWiuMPzOI 8zq/TzXpFjN3oieABc+LoJVY87QY1PBgNSxc0yIUOEa5jH2HaQWv5tXPGZH8E/+tQmoJ CA== Received: from dc5-exch02.marvell.com ([199.233.59.182]) by mx0b-0016f401.pphosted.com (PPS) with ESMTPS id 3k6fwv8ef8-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT) for ; Thu, 13 Oct 2022 04:42:25 -0700 Received: from DC5-EXCH01.marvell.com (10.69.176.38) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.18; Thu, 13 Oct 2022 04:42:23 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Thu, 13 Oct 2022 04:42:23 -0700 Received: from localhost.localdomain (unknown [10.29.52.204]) by maili.marvell.com (Postfix) with ESMTP id 165903F703F; Thu, 13 Oct 2022 04:42:20 -0700 (PDT) From: Nithin Dabilpuram To: Nithin Dabilpuram , Kiran Kumar K , Sunil Kumar Kori , Satha Rao CC: , Subject: [PATCH v2 08/13] common/cnxk: set hysteresis bit to one Date: Thu, 13 Oct 2022 17:11:51 +0530 Message-ID: <20221013114156.996517-8-ndabilpuram@marvell.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221013114156.996517-1-ndabilpuram@marvell.com> References: <20221011120135.45846-1-ndabilpuram@marvell.com> <20221013114156.996517-1-ndabilpuram@marvell.com> MIME-Version: 1.0 X-Proofpoint-GUID: t77j-PbgUUwatKqG7sq-lFGXtKsZ2jKC X-Proofpoint-ORIG-GUID: t77j-PbgUUwatKqG7sq-lFGXtKsZ2jKC X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.895,Hydra:6.0.545,FMLib:17.11.122.1 definitions=2022-10-13_08,2022-10-13_01,2022-06-22_01 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org From: Satha Rao Setting non zero FC_HYST_BITS to reduce mesh traffic on HW. Signed-off-by: Satha Rao --- drivers/common/cnxk/roc_nix_queue.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/common/cnxk/roc_nix_queue.c b/drivers/common/cnxk/roc_nix_queue.c index 7318f26b57..1cb1fd2101 100644 --- a/drivers/common/cnxk/roc_nix_queue.c +++ b/drivers/common/cnxk/roc_nix_queue.c @@ -940,7 +940,7 @@ sqb_pool_populate(struct roc_nix *roc_nix, struct roc_nix_sq *sq) else aura.fc_stype = 0x3; /* STSTP */ aura.fc_addr = (uint64_t)sq->fc; - aura.fc_hyst_bits = 0; /* Store count on all updates */ + aura.fc_hyst_bits = 1; /* Store count on all updates */ rc = roc_npa_pool_create(&sq->aura_handle, blk_sz, nb_sqb_bufs, &aura, &pool, 0); if (rc)