diff --git a/drivers/common/qat/dev/qat_dev_gen1.c b/drivers/common/qat/dev/qat_dev_gen1.c
index c34ae5a51c..cf480dcba8 100644
--- a/drivers/common/qat/dev/qat_dev_gen1.c
+++ b/drivers/common/qat/dev/qat_dev_gen1.c
@@ -241,12 +241,20 @@ qat_dev_get_extra_size_gen1(void)
 	return 0;
 }
 
+static int
+qat_get_dev_slice_map_gen1(uint16_t *map __rte_unused,
+	const struct rte_pci_device *pci_dev __rte_unused)
+{
+	return 0;
+}
+
 static struct qat_dev_hw_spec_funcs qat_dev_hw_spec_gen1 = {
 	.qat_dev_reset_ring_pairs = qat_reset_ring_pairs_gen1,
 	.qat_dev_get_transport_bar = qat_dev_get_transport_bar_gen1,
 	.qat_dev_get_misc_bar = qat_dev_get_misc_bar_gen1,
 	.qat_dev_read_config = qat_dev_read_config_gen1,
 	.qat_dev_get_extra_size = qat_dev_get_extra_size_gen1,
+	.qat_dev_get_slice_map = qat_get_dev_slice_map_gen1,
 };
 
 RTE_INIT(qat_dev_gen_gen1_init)
diff --git a/drivers/common/qat/dev/qat_dev_gen2.c b/drivers/common/qat/dev/qat_dev_gen2.c
index f077fe9eef..f51be46eb0 100644
--- a/drivers/common/qat/dev/qat_dev_gen2.c
+++ b/drivers/common/qat/dev/qat_dev_gen2.c
@@ -21,12 +21,20 @@ static struct qat_qp_hw_spec_funcs qat_qp_hw_spec_gen2 = {
 	.qat_qp_get_hw_data = qat_qp_get_hw_data_gen1,
 };
 
+static int
+qat_dev_get_slice_map_gen2(uint16_t *map __rte_unused,
+	const struct rte_pci_device *pci_dev __rte_unused)
+{
+	return 0;
+}
+
 static struct qat_dev_hw_spec_funcs qat_dev_hw_spec_gen2 = {
 	.qat_dev_reset_ring_pairs = qat_reset_ring_pairs_gen1,
 	.qat_dev_get_transport_bar = qat_dev_get_transport_bar_gen1,
 	.qat_dev_get_misc_bar = qat_dev_get_misc_bar_gen1,
 	.qat_dev_read_config = qat_dev_read_config_gen1,
 	.qat_dev_get_extra_size = qat_dev_get_extra_size_gen1,
+	.qat_dev_get_slice_map = qat_dev_get_slice_map_gen2,
 };
 
 RTE_INIT(qat_dev_gen_gen2_init)
diff --git a/drivers/common/qat/dev/qat_dev_gen3.c b/drivers/common/qat/dev/qat_dev_gen3.c
index de3fa17fa9..e4197f3c0f 100644
--- a/drivers/common/qat/dev/qat_dev_gen3.c
+++ b/drivers/common/qat/dev/qat_dev_gen3.c
@@ -67,12 +67,25 @@ static struct qat_qp_hw_spec_funcs qat_qp_hw_spec_gen3 = {
 	.qat_qp_get_hw_data = qat_qp_get_hw_data_gen3
 };
 
+static int
+qat_dev_get_slice_map_gen3(uint16_t *map,
+	const struct rte_pci_device *pci_dev)
+{
+	if (rte_pci_read_config(pci_dev, map,
+			ADF1_C4XXXIOV_VFLEGFUSES_LEN,
+			ADF_C4XXXIOV_VFLEGFUSES_OFFSET) < 0) {
+		return -1;
+	}
+	return 0;
+}
+
 static struct qat_dev_hw_spec_funcs qat_dev_hw_spec_gen3 = {
 	.qat_dev_reset_ring_pairs = qat_reset_ring_pairs_gen1,
 	.qat_dev_get_transport_bar = qat_dev_get_transport_bar_gen1,
 	.qat_dev_get_misc_bar = qat_dev_get_misc_bar_gen1,
 	.qat_dev_read_config = qat_dev_read_config_gen1,
 	.qat_dev_get_extra_size = qat_dev_get_extra_size_gen1,
+	.qat_dev_get_slice_map = qat_dev_get_slice_map_gen3,
 };
 
 RTE_INIT(qat_dev_gen_gen3_init)
diff --git a/drivers/common/qat/dev/qat_dev_gen4.c b/drivers/common/qat/dev/qat_dev_gen4.c
index 85d6ddfcf4..1b3a5deabf 100644
--- a/drivers/common/qat/dev/qat_dev_gen4.c
+++ b/drivers/common/qat/dev/qat_dev_gen4.c
@@ -283,6 +283,13 @@ qat_dev_get_misc_bar_gen4(struct rte_mem_resource **mem_resource,
 }
 
 static int
+qat_dev_get_slice_map_gen4(uint16_t *map __rte_unused,
+	const struct rte_pci_device *pci_dev __rte_unused)
+{
+	return 0;
+}
+
+static int
 qat_dev_get_extra_size_gen4(void)
 {
 	return sizeof(struct qat_dev_gen4_extra);
@@ -294,6 +301,7 @@ static struct qat_dev_hw_spec_funcs qat_dev_hw_spec_gen4 = {
 	.qat_dev_get_misc_bar = qat_dev_get_misc_bar_gen4,
 	.qat_dev_read_config = qat_dev_read_config_gen4,
 	.qat_dev_get_extra_size = qat_dev_get_extra_size_gen4,
+	.qat_dev_get_slice_map = qat_dev_get_slice_map_gen4,
 };
 
 RTE_INIT(qat_dev_gen_4_init)
diff --git a/drivers/common/qat/qat_adf/icp_qat_hw.h b/drivers/common/qat/qat_adf/icp_qat_hw.h
index e2da701f37..5c420494ac 100644
--- a/drivers/common/qat/qat_adf/icp_qat_hw.h
+++ b/drivers/common/qat/qat_adf/icp_qat_hw.h
@@ -4,6 +4,24 @@
 #ifndef _ICP_QAT_HW_H_
 #define _ICP_QAT_HW_H_
 
+#define ADF_C4XXXIOV_VFLEGFUSES_OFFSET	0x4C
+#define ADF1_C4XXXIOV_VFLEGFUSES_LEN	4
+
+enum icp_qat_slice_mask {
+	ICP_ACCEL_MASK_CIPHER_SLICE = 0x01,
+	ICP_ACCEL_MASK_AUTH_SLICE = 0x02,
+	ICP_ACCEL_MASK_PKE_SLICE = 0x04,
+	ICP_ACCEL_MASK_COMPRESS_SLICE = 0x08,
+	ICP_ACCEL_MASK_DEPRECATED = 0x10,
+	ICP_ACCEL_MASK_EIA3_SLICE = 0x20,
+	ICP_ACCEL_MASK_SHA3_SLICE = 0x40,
+	ICP_ACCEL_MASK_CRYPTO0_SLICE = 0x80,
+	ICP_ACCEL_MASK_CRYPTO1_SLICE = 0x100,
+	ICP_ACCEL_MASK_CRYPTO2_SLICE = 0x200,
+	ICP_ACCEL_MASK_SM3_SLICE = 0x400,
+	ICP_ACCEL_MASK_SM4_SLICE = 0x800
+};
+
 enum icp_qat_hw_ae_id {
 	ICP_QAT_HW_AE_0 = 0,
 	ICP_QAT_HW_AE_1 = 1,
diff --git a/drivers/common/qat/qat_device.c b/drivers/common/qat/qat_device.c
index 30e5cdb573..8ddba0c903 100644
--- a/drivers/common/qat/qat_device.c
+++ b/drivers/common/qat/qat_device.c
@@ -361,6 +361,7 @@ static int qat_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
 {
 	int sym_ret = 0, asym_ret = 0, comp_ret = 0;
 	int num_pmds_created = 0;
+	uint16_t capa;
 	struct qat_pci_device *qat_pci_dev;
 	struct qat_dev_hw_spec_funcs *ops_hw;
 	struct qat_dev_cmd_param qat_dev_cmd_param[] = {
@@ -368,6 +369,7 @@ static int qat_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
 			{ SYM_ENQ_THRESHOLD_NAME, 0 },
 			{ ASYM_ENQ_THRESHOLD_NAME, 0 },
 			{ COMP_ENQ_THRESHOLD_NAME, 0 },
+			[QAT_CMD_SLICE_MAP_POS] = { QAT_CMD_SLICE_MAP, 0},
 			{ NULL, 0 },
 	};
 
@@ -390,10 +392,16 @@ static int qat_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
 		return -ENODEV;
 	}
 
+	if (ops_hw->qat_dev_get_slice_map(&capa, pci_dev) < 0) {
+		RTE_LOG(ERR, EAL,
+			"Cannot read slice configuration\n");
+		return -1;
+	}
+	qat_dev_cmd_param[QAT_CMD_SLICE_MAP_POS].val = capa;
+
 	sym_ret = qat_sym_dev_create(qat_pci_dev, qat_dev_cmd_param);
 	if (sym_ret == 0) {
 		num_pmds_created++;
-
 	}
 	else
 		QAT_LOG(WARNING,
diff --git a/drivers/common/qat/qat_device.h b/drivers/common/qat/qat_device.h
index d1512f3b89..3ffd6b2d07 100644
--- a/drivers/common/qat/qat_device.h
+++ b/drivers/common/qat/qat_device.h
@@ -8,8 +8,9 @@
 
 #include "qat_common.h"
 #include "qat_logs.h"
-#include "adf_transport_access_macros.h"
 #include "qat_qp.h"
+#include "adf_transport_access_macros.h"
+#include "icp_qat_hw.h"
 
 #define QAT_DETACHED  (0)
 #define QAT_ATTACHED  (1)
@@ -20,6 +21,8 @@
 #define SYM_ENQ_THRESHOLD_NAME "qat_sym_enq_threshold"
 #define ASYM_ENQ_THRESHOLD_NAME "qat_asym_enq_threshold"
 #define COMP_ENQ_THRESHOLD_NAME "qat_comp_enq_threshold"
+#define QAT_CMD_SLICE_MAP "qat_cmd_slice_disable"
+#define QAT_CMD_SLICE_MAP_POS	4
 #define MAX_QP_THRESHOLD_SIZE	32
 
 /**
@@ -34,6 +37,8 @@ typedef int (*qat_dev_get_misc_bar_t)
 typedef int (*qat_dev_read_config_t)
 		(struct qat_pci_device *);
 typedef int (*qat_dev_get_extra_size_t)(void);
+typedef int (*qat_dev_get_slice_map_t)(uint16_t *map,
+		const struct rte_pci_device *pci_dev);
 
 struct qat_dev_hw_spec_funcs {
 	qat_dev_reset_ring_pairs_t	qat_dev_reset_ring_pairs;
@@ -41,6 +46,7 @@ struct qat_dev_hw_spec_funcs {
 	qat_dev_get_misc_bar_t		qat_dev_get_misc_bar;
 	qat_dev_read_config_t		qat_dev_read_config;
 	qat_dev_get_extra_size_t	qat_dev_get_extra_size;
+	qat_dev_get_slice_map_t		qat_dev_get_slice_map;
 };
 
 extern struct qat_dev_hw_spec_funcs *qat_dev_hw_spec[];
