diff mbox series

[v1] net/mlx5: enable hint in async table

Message ID 20230216054923.3973237-1-rongweil@nvidia.com (mailing list archive)
State Superseded, archived
Delegated to: Raslan Darawsheh
Headers
Series [v1] net/mlx5: enable hint in async table |

Checks

Context Check Description
ci/checkpatch success coding style OK
ci/loongarch-compilation success Compilation OK
ci/loongarch-unit-testing success Unit Testing PASS
ci/iol-broadcom-Functional fail Functional Testing issues
ci/iol-mellanox-Performance success Performance Testing PASS
ci/iol-broadcom-Performance success Performance Testing PASS
ci/iol-intel-Functional fail Functional Testing issues
ci/iol-intel-Performance success Performance Testing PASS
ci/github-robot: build success github build: passed
ci/iol-testing fail Testing issues
ci/iol-x86_64-unit-testing fail Testing issues
ci/Intel-compilation success Compilation OK
ci/intel-Testing success Testing PASS
ci/iol-x86_64-compile-testing success Testing PASS
ci/iol-abi-testing success Testing PASS
ci/iol-aarch64-unit-testing success Testing PASS

Commit Message

Rongwei Liu Feb. 16, 2023, 5:49 a.m. UTC 
  Driver gets the hint value from rte_table_attr for async flow.
Parse the value and pass the supported value to hardware accordingly.

Signed-off-by: Rongwei Liu <rongweil@nvidia.com>
Acked-by: Ori Kam <orika@nvidia.com>
---
 drivers/net/mlx5/mlx5_flow_hw.c | 9 +++++++++
 1 file changed, 9 insertions(+)

Comments

Rongwei Liu March 6, 2023, 8:22 a.m. UTC | #1 
@Slava Ovsiienko Can you help review and ACK?

BR
Rongwei

> -----Original Message-----
> From: Rongwei Liu <rongweil@nvidia.com>
> Sent: Thursday, February 16, 2023 13:49
> To: dev@dpdk.org; Matan Azrad <matan@nvidia.com>; Slava Ovsiienko
> <viacheslavo@nvidia.com>; Ori Kam <orika@nvidia.com>; NBU-Contact-
> Thomas Monjalon (EXTERNAL) <thomas@monjalon.net>
> Cc: Raslan Darawsheh <rasland@nvidia.com>
> Subject: [PATCH v1] net/mlx5: enable hint in async table
> 
> External email: Use caution opening links or attachments
> 
> 
> Driver gets the hint value from rte_table_attr for async flow.
> Parse the value and pass the supported value to hardware accordingly.
> 
> Signed-off-by: Rongwei Liu <rongweil@nvidia.com>
> Acked-by: Ori Kam <orika@nvidia.com>
> ---
>  drivers/net/mlx5/mlx5_flow_hw.c | 9 +++++++++
>  1 file changed, 9 insertions(+)
> 
> diff --git a/drivers/net/mlx5/mlx5_flow_hw.c
> b/drivers/net/mlx5/mlx5_flow_hw.c index b67b33bc22..06d6909974 100644
> --- a/drivers/net/mlx5/mlx5_flow_hw.c
> +++ b/drivers/net/mlx5/mlx5_flow_hw.c
> @@ -3102,6 +3102,15 @@ flow_hw_table_create(struct rte_eth_dev *dev,
>         matcher_attr.optimize_using_rule_idx = true;
>         matcher_attr.mode = MLX5DR_MATCHER_RESOURCE_MODE_RULE;
>         matcher_attr.rule.num_log = rte_log2_u32(nb_flows);
> +       /* Parse hints information. */
> +       if (attr->specialize) {
> +               if (attr->specialize ==
> RTE_FLOW_TABLE_SPECIALIZE_TRANSFER_WIRE_ORIG)
> +                       matcher_attr.optimize_flow_src =
> MLX5DR_MATCHER_FLOW_SRC_WIRE;
> +               else if (attr->specialize ==
> RTE_FLOW_TABLE_SPECIALIZE_TRANSFER_VPORT_ORIG)
> +                       matcher_attr.optimize_flow_src =
> MLX5DR_MATCHER_FLOW_SRC_VPORT;
> +               else
> +                       DRV_LOG(INFO, "Unsupported hint value %x", attr->specialize);
> +       }
>         /* Build the item template. */
>         for (i = 0; i < nb_item_templates; i++) {
>                 uint32_t ret;
> --
> 2.27.0
diff mbox series

Patch

diff --git a/drivers/net/mlx5/mlx5_flow_hw.c b/drivers/net/mlx5/mlx5_flow_hw.c
index b67b33bc22..06d6909974 100644
--- a/drivers/net/mlx5/mlx5_flow_hw.c
+++ b/drivers/net/mlx5/mlx5_flow_hw.c
@@ -3102,6 +3102,15 @@  flow_hw_table_create(struct rte_eth_dev *dev,
 	matcher_attr.optimize_using_rule_idx = true;
 	matcher_attr.mode = MLX5DR_MATCHER_RESOURCE_MODE_RULE;
 	matcher_attr.rule.num_log = rte_log2_u32(nb_flows);
+	/* Parse hints information. */
+	if (attr->specialize) {
+		if (attr->specialize == RTE_FLOW_TABLE_SPECIALIZE_TRANSFER_WIRE_ORIG)
+			matcher_attr.optimize_flow_src = MLX5DR_MATCHER_FLOW_SRC_WIRE;
+		else if (attr->specialize == RTE_FLOW_TABLE_SPECIALIZE_TRANSFER_VPORT_ORIG)
+			matcher_attr.optimize_flow_src = MLX5DR_MATCHER_FLOW_SRC_VPORT;
+		else
+			DRV_LOG(INFO, "Unsupported hint value %x", attr->specialize);
+	}
 	/* Build the item template. */
 	for (i = 0; i < nb_item_templates; i++) {
 		uint32_t ret;