From: Jie Hai <haijie1@huawei.com>
This patch supports the query and configuration of LLRS FEC mode.
Signed-off-by: Jie Hai <haijie1@huawei.com>
Signed-off-by: Dongdong Liu <liudongdong3@huawei.com>
---
drivers/net/hns3/hns3_cmd.c | 1 +
drivers/net/hns3/hns3_cmd.h | 2 ++
drivers/net/hns3/hns3_ethdev.c | 21 ++++++++++++---------
3 files changed, 15 insertions(+), 9 deletions(-)
@@ -637,6 +637,7 @@ hns3_firmware_compat_config(struct hns3_hw *hw, bool is_init)
if (is_init) {
hns3_set_bit(compat, HNS3_LINK_EVENT_REPORT_EN_B, 1);
hns3_set_bit(compat, HNS3_NCSI_ERROR_REPORT_EN_B, 0);
+ hns3_set_bit(compat, HNS3_LLRS_FEC_EN_B, 1);
if (hns3_dev_get_support(hw, COPPER))
hns3_set_bit(compat, HNS3_FIRMWARE_PHY_DRIVER_EN_B, 1);
}
@@ -665,6 +665,7 @@ enum hns3_promisc_type {
#define HNS3_LINK_EVENT_REPORT_EN_B 0
#define HNS3_NCSI_ERROR_REPORT_EN_B 1
#define HNS3_FIRMWARE_PHY_DRIVER_EN_B 2
+#define HNS3_LLRS_FEC_EN_B 5
struct hns3_firmware_compat_cmd {
uint32_t compat;
uint8_t rsv[20];
@@ -806,6 +807,7 @@ struct hns3_sfp_info_cmd {
#define HNS3_MAC_FEC_OFF 0
#define HNS3_MAC_FEC_BASER 1
#define HNS3_MAC_FEC_RS 2
+#define HNS3_MAC_FEC_LLRS 3
/* Configure FEC mode, opcode:0x031A */
struct hns3_config_fec_cmd {
@@ -47,11 +47,6 @@
#define HNS3_RESET_WAIT_MS 100
#define HNS3_RESET_WAIT_CNT 200
-/* FEC mode order defined in HNS3 hardware */
-#define HNS3_HW_FEC_MODE_NOFEC 0
-#define HNS3_HW_FEC_MODE_BASER 1
-#define HNS3_HW_FEC_MODE_RS 2
-
enum hns3_evt_cause {
HNS3_VECTOR0_EVENT_RST,
HNS3_VECTOR0_EVENT_MBX,
@@ -91,7 +86,8 @@ static const struct rte_eth_fec_capa speed_fec_capa_tbl[] = {
RTE_ETH_FEC_MODE_CAPA_MASK(RS) },
{ RTE_ETH_SPEED_NUM_200G, RTE_ETH_FEC_MODE_CAPA_MASK(AUTO) |
- RTE_ETH_FEC_MODE_CAPA_MASK(RS) }
+ RTE_ETH_FEC_MODE_CAPA_MASK(RS) |
+ RTE_ETH_FEC_MODE_CAPA_MASK(LLRS) }
};
static enum hns3_reset_level hns3_get_reset_level(struct hns3_adapter *hns,
@@ -6059,15 +6055,18 @@ hns3_fec_get_internal(struct hns3_hw *hw, uint32_t *fec_capa)
* to be converted.
*/
switch (resp->active_fec) {
- case HNS3_HW_FEC_MODE_NOFEC:
+ case HNS3_MAC_FEC_OFF:
tmp_fec_capa = RTE_ETH_FEC_MODE_CAPA_MASK(NOFEC);
break;
- case HNS3_HW_FEC_MODE_BASER:
+ case HNS3_MAC_FEC_BASER:
tmp_fec_capa = RTE_ETH_FEC_MODE_CAPA_MASK(BASER);
break;
- case HNS3_HW_FEC_MODE_RS:
+ case HNS3_MAC_FEC_RS:
tmp_fec_capa = RTE_ETH_FEC_MODE_CAPA_MASK(RS);
break;
+ case HNS3_MAC_FEC_LLRS:
+ tmp_fec_capa = RTE_ETH_FEC_MODE_CAPA_MASK(LLRS);
+ break;
default:
tmp_fec_capa = RTE_ETH_FEC_MODE_CAPA_MASK(NOFEC);
break;
@@ -6108,6 +6107,10 @@ hns3_set_fec_hw(struct hns3_hw *hw, uint32_t mode)
hns3_set_field(req->fec_mode, HNS3_MAC_CFG_FEC_MODE_M,
HNS3_MAC_CFG_FEC_MODE_S, HNS3_MAC_FEC_RS);
break;
+ case RTE_ETH_FEC_MODE_CAPA_MASK(LLRS):
+ hns3_set_field(req->fec_mode, HNS3_MAC_CFG_FEC_MODE_M,
+ HNS3_MAC_CFG_FEC_MODE_S, HNS3_MAC_FEC_LLRS);
+ break;
case RTE_ETH_FEC_MODE_CAPA_MASK(AUTO):
hns3_set_bit(req->fec_mode, HNS3_MAC_CFG_FEC_AUTO_EN_B, 1);
break;