From patchwork Fri May 19 08:31:09 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Wenjing Qiao X-Patchwork-Id: 127108 X-Patchwork-Delegate: qi.z.zhang@intel.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 34D3442B47; Fri, 19 May 2023 10:37:34 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id D7A8A42D65; Fri, 19 May 2023 10:37:09 +0200 (CEST) Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by mails.dpdk.org (Postfix) with ESMTP id A884042D31; Fri, 19 May 2023 10:37:07 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1684485428; x=1716021428; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=11In9lJFWJQsHMiBcR933U4CVzkIIQRr9DuKLpq9vYA=; b=iq9t0ORfoqVaJLvdUTffiznnbNTPaQzNoJ8WQmE9VTtvaEYkBM1+sCLc DbuodaU/tVjIpexg6aJ5ezpNPDVqIar5JNqUDVZk0FWor222efVyoVqua /Zxalh37eldIMUL1uV9JSwVvs1eNLwq1CTr53SrEJoZFBtQJaZ7cGGAxI 46RDgHBG04nHpMO2Od/BpGEe8w9lxtBzJZVb+KvQpyf+PtuEkRLPEytcQ atxv47xkNEvsJ+0ZMX0tLgEVZkkLHHKR8jAPqrtqsGyiuAiZOYxs6/XOi 3152iqdL1UAWx8odpZ8s6Hlk8p8PLOuyj1ix72BILglAah+2fESsHIbKX w==; X-IronPort-AV: E=McAfee;i="6600,9927,10714"; a="354670416" X-IronPort-AV: E=Sophos;i="6.00,176,1681196400"; d="scan'208";a="354670416" Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by orsmga102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 19 May 2023 01:37:06 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10714"; a="772216269" X-IronPort-AV: E=Sophos;i="6.00,176,1681196400"; d="scan'208";a="772216269" Received: from dpdk-wenjing-01.sh.intel.com ([10.67.118.161]) by fmsmga004.fm.intel.com with ESMTP; 19 May 2023 01:37:04 -0700 From: Wenjing Qiao To: jingjing.wu@intel.com, beilei.xing@intel.com, qi.z.zhang@intel.com Cc: dev@dpdk.org, mingxia.liu@intel.com, Wenjing Qiao , stable@dpdk.org Subject: [PATCH v4 6/7] net/cpfl: adjust timestamp mbuf register Date: Fri, 19 May 2023 04:31:09 -0400 Message-Id: <20230519083110.809913-7-wenjing.qiao@intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230519083110.809913-1-wenjing.qiao@intel.com> References: <20230424091707.488045-2-wenjing.qiao@intel.com> <20230519083110.809913-1-wenjing.qiao@intel.com> MIME-Version: 1.0 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Due to only support timestamp at port level, adjust timestamp mbuf register to dev config. Fixes: 8c6098afa075 ("common/idpf: add Rx/Tx data path") Cc: stable@dpdk.org Signed-off-by: Wenjing Qiao Suggested-by: Jingjing Wu --- drivers/net/cpfl/cpfl_ethdev.c | 9 +++++++-- drivers/net/cpfl/cpfl_rxtx.c | 2 ++ 2 files changed, 9 insertions(+), 2 deletions(-) diff --git a/drivers/net/cpfl/cpfl_ethdev.c b/drivers/net/cpfl/cpfl_ethdev.c index 702fd6f4ec..a6a17d03f9 100644 --- a/drivers/net/cpfl/cpfl_ethdev.c +++ b/drivers/net/cpfl/cpfl_ethdev.c @@ -767,8 +767,13 @@ cpfl_dev_start(struct rte_eth_dev *dev) goto err_vec; } - if (dev->data->dev_conf.rxmode.offloads & RTE_ETH_RX_OFFLOAD_TIMESTAMP) - idpf_rx_timestamp_start(base); + if (dev->data->dev_conf.rxmode.offloads & RTE_ETH_RX_OFFLOAD_TIMESTAMP) { + ret = idpf_rx_timestamp_start(base); + if (ret != 0) { + PMD_DRV_LOG(ERR, "Failed to register mbuf for timestamp"); + goto err_vec; + } + } ret = idpf_vc_vectors_alloc(vport, req_vecs_num); if (ret != 0) { diff --git a/drivers/net/cpfl/cpfl_rxtx.c b/drivers/net/cpfl/cpfl_rxtx.c index 75021c3c54..4781059f2c 100644 --- a/drivers/net/cpfl/cpfl_rxtx.c +++ b/drivers/net/cpfl/cpfl_rxtx.c @@ -530,6 +530,8 @@ cpfl_rx_queue_init(struct rte_eth_dev *dev, uint16_t rx_queue_id) frame_size > rxq->rx_buf_len) dev->data->scattered_rx = 1; + if (dev->data->dev_conf.rxmode.offloads & RTE_ETH_RX_OFFLOAD_TIMESTAMP) + rxq->ts_enable = TRUE; err = idpf_qc_ts_mbuf_register(rxq); if (err != 0) { PMD_DRV_LOG(ERR, "fail to register timestamp mbuf %u",