From patchwork Wed May 24 10:03:54 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nithin Dabilpuram X-Patchwork-Id: 127305 X-Patchwork-Delegate: jerinj@marvell.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id AD4D742B8C; Wed, 24 May 2023 12:06:51 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 07A0242F92; Wed, 24 May 2023 12:05:14 +0200 (CEST) Received: from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com [67.231.148.174]) by mails.dpdk.org (Postfix) with ESMTP id 547F542F9A for ; Wed, 24 May 2023 12:05:12 +0200 (CEST) Received: from pps.filterd (m0045849.ppops.net [127.0.0.1]) by mx0a-0016f401.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 34O4qRiP025156 for ; Wed, 24 May 2023 03:05:11 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=pfpt0220; bh=XpA2DBdNFzaAUIuc0qICk+8lIt/Ayrunob+eFCdqxKk=; b=JWnJ4WTkBLpMbt9DwzRW13D4D1+BiFk09SIc7XEScoXaTEkDe6muYliynr6cL2OZfuQ3 uvcxe4vyNmqVWC5C4WiEOAhDgtxu+QIy2naDv/hpdCTzBovVOvigNYrVgM2ye6CoKZsY zdqYBDDy6s1F5bTqVcGCSyz697ql96GN7u2zrYImNDBKlkq6xUwoBEZ2SQc22wlBbybl vh/njPYOKzEZF7OVPBcARZic+wL7Qe5osMsAiVKBJynSCaj9vJH5iFpYkxYBQSsfr0X/ jMuJd/593zmurqSTUPV+yMG/p9U8XXP8DGkUrGdtIspYeLQQtioRKfSvcO+XfNo5NRhO jQ== Received: from dc5-exch02.marvell.com ([199.233.59.182]) by mx0a-0016f401.pphosted.com (PPS) with ESMTPS id 3qsbxes2u3-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT) for ; Wed, 24 May 2023 03:05:11 -0700 Received: from DC5-EXCH01.marvell.com (10.69.176.38) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.48; Wed, 24 May 2023 03:05:09 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server id 15.0.1497.48 via Frontend Transport; Wed, 24 May 2023 03:05:09 -0700 Received: from hyd1588t430.caveonetworks.com (unknown [10.29.52.204]) by maili.marvell.com (Postfix) with ESMTP id 7D12F3F7043; Wed, 24 May 2023 03:05:07 -0700 (PDT) From: Nithin Dabilpuram To: Nithin Kumar Dabilpuram , Kiran Kumar K , Sunil Kumar Kori , Satha Rao CC: , , Harman Kalra Subject: [PATCH v2 19/32] common/cnxk: add CN105xxN B0 model Date: Wed, 24 May 2023 15:33:54 +0530 Message-ID: <20230524100407.3796139-19-ndabilpuram@marvell.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230524100407.3796139-1-ndabilpuram@marvell.com> References: <20230411091144.1087887-1-ndabilpuram@marvell.com> <20230524100407.3796139-1-ndabilpuram@marvell.com> MIME-Version: 1.0 X-Proofpoint-ORIG-GUID: 66n1i9ar1-g6gzITpCG76NXOzyTKg7qA X-Proofpoint-GUID: 66n1i9ar1-g6gzITpCG76NXOzyTKg7qA X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.957,Hydra:6.0.573,FMLib:17.11.176.26 definitions=2023-05-24_05,2023-05-23_02,2023-05-22_02 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org From: Harman Kalra Adding support for CN105xxN B0 pass Signed-off-by: Harman Kalra --- drivers/common/cnxk/roc_model.c | 1 + drivers/common/cnxk/roc_model.h | 9 ++++++++- 2 files changed, 9 insertions(+), 1 deletion(-) diff --git a/drivers/common/cnxk/roc_model.c b/drivers/common/cnxk/roc_model.c index e4767ed91f..f4f2a38e70 100644 --- a/drivers/common/cnxk/roc_model.c +++ b/drivers/common/cnxk/roc_model.c @@ -66,6 +66,7 @@ static const struct model_db { {VENDOR_ARM, PART_105xx, 0, 1, ROC_MODEL_CNF105xx_A1, "cnf10ka_a1"}, {VENDOR_ARM, PART_103xx, 0, 0, ROC_MODEL_CN103xx_A0, "cn10kb_a0"}, {VENDOR_ARM, PART_105xxN, 0, 0, ROC_MODEL_CNF105xxN_A0, "cnf10kb_a0"}, + {VENDOR_ARM, PART_105xxN, 1, 0, ROC_MODEL_CNF105xxN_B0, "cnf10kb_b0"}, {VENDOR_CAVIUM, PART_98xx, 0, 0, ROC_MODEL_CN98xx_A0, "cn98xx_a0"}, {VENDOR_CAVIUM, PART_98xx, 0, 1, ROC_MODEL_CN98xx_A1, "cn98xx_a1"}, {VENDOR_CAVIUM, PART_96xx, 0, 0, ROC_MODEL_CN96xx_A0, "cn96xx_a0"}, diff --git a/drivers/common/cnxk/roc_model.h b/drivers/common/cnxk/roc_model.h index 58046af193..b6dab4f64e 100644 --- a/drivers/common/cnxk/roc_model.h +++ b/drivers/common/cnxk/roc_model.h @@ -31,6 +31,7 @@ struct roc_model { #define ROC_MODEL_CN106xx_A1 BIT_ULL(24) #define ROC_MODEL_CNF105xx_A1 BIT_ULL(25) #define ROC_MODEL_CN106xx_B0 BIT_ULL(26) +#define ROC_MODEL_CNF105xxN_B0 BIT_ULL(27) /* Following flags describe platform code is running on */ #define ROC_ENV_HW BIT_ULL(61) #define ROC_ENV_EMUL BIT_ULL(62) @@ -57,7 +58,7 @@ struct roc_model { #define ROC_MODEL_CN106xx (ROC_MODEL_CN106xx_A0 | ROC_MODEL_CN106xx_A1 | ROC_MODEL_CN106xx_B0) #define ROC_MODEL_CNF105xx (ROC_MODEL_CNF105xx_A0 | ROC_MODEL_CNF105xx_A1) -#define ROC_MODEL_CNF105xxN (ROC_MODEL_CNF105xxN_A0) +#define ROC_MODEL_CNF105xxN (ROC_MODEL_CNF105xxN_A0 | ROC_MODEL_CNF105xxN_B0) #define ROC_MODEL_CN103xx (ROC_MODEL_CN103xx_A0) #define ROC_MODEL_CN10K \ (ROC_MODEL_CN106xx | ROC_MODEL_CNF105xx | ROC_MODEL_CNF105xxN | \ @@ -252,6 +253,12 @@ roc_model_is_cnf10kb_a0(void) return roc_model->flag & ROC_MODEL_CNF105xxN_A0; } +static inline uint64_t +roc_model_is_cnf10kb_b0(void) +{ + return roc_model->flag & ROC_MODEL_CNF105xxN_B0; +} + static inline uint64_t roc_model_is_cn10kb(void) {