From patchwork Thu May 25 09:58:46 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nithin Dabilpuram X-Patchwork-Id: 127428 X-Patchwork-Delegate: jerinj@marvell.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id D5F8842B9A; Thu, 25 May 2023 12:37:44 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id E468642D55; Thu, 25 May 2023 12:37:25 +0200 (CEST) Received: from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com [67.231.156.173]) by mails.dpdk.org (Postfix) with ESMTP id 3A4E642D3B for ; Thu, 25 May 2023 12:37:24 +0200 (CEST) Received: from pps.filterd (m0045851.ppops.net [127.0.0.1]) by mx0b-0016f401.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 34P9fW2e030802 for ; Thu, 25 May 2023 03:37:23 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=pfpt0220; bh=pF0/mo+ugFJ6ML7HE9jK62FAOWdmX0OVv06BTm783T4=; b=g5uW3B/uFZOSNvMvqmMmewj5ylE7qgpCajf0yNPXun+OmPnlrozHQGgcBNt+E5SK/xUn EvTnIIg7x9oQNDDLmH3A5cp2o1pKmh+7HxfrSDGNbLA7jPwzvlaQltgdihtfKP9iyuUC A6H+kzLE2FxmAa5LR90DnvDvb+Omp3xNTf0l/drvULp4xgB5X9YNujwyTTdxSUos1JpY builTvFs3ts8TxncH9oXwBcXYwtg5RB7+7yo4guRxvYmJNhmwU104y725vqoNplEY1fI FLVfSFx7IZLOfX7tF9SCGJZnZoJ0qBSJkNtNsklwWMR1uMo3rWO9togGGp8EfaJq3HCL pA== Received: from dc5-exch02.marvell.com ([199.233.59.182]) by mx0b-0016f401.pphosted.com (PPS) with ESMTPS id 3qsspt2cmc-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT) for ; Thu, 25 May 2023 03:37:23 -0700 Received: from DC5-EXCH02.marvell.com (10.69.176.39) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.48; Thu, 25 May 2023 03:37:21 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.48 via Frontend Transport; Thu, 25 May 2023 03:37:21 -0700 Received: from hyd1588t430.caveonetworks.com (unknown [10.29.52.204]) by maili.marvell.com (Postfix) with ESMTP id 3A5CD5B6BDC; Thu, 25 May 2023 02:59:58 -0700 (PDT) From: Nithin Dabilpuram To: Nithin Kumar Dabilpuram , Kiran Kumar K , Sunil Kumar Kori , Satha Rao CC: , , Veerasenareddy Burru Subject: [PATCH v3 14/32] common/cnxk: set relchan in TL4 config for each SDP queue Date: Thu, 25 May 2023 15:28:46 +0530 Message-ID: <20230525095904.3967080-14-ndabilpuram@marvell.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230525095904.3967080-1-ndabilpuram@marvell.com> References: <20230411091144.1087887-1-ndabilpuram@marvell.com> <20230525095904.3967080-1-ndabilpuram@marvell.com> MIME-Version: 1.0 X-Proofpoint-GUID: WH8Yfk5y8tg68HDF9i-F5XypJgXtZf-R X-Proofpoint-ORIG-GUID: WH8Yfk5y8tg68HDF9i-F5XypJgXtZf-R X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.957,Hydra:6.0.573,FMLib:17.11.176.26 definitions=2023-05-25_06,2023-05-24_01,2023-05-22_02 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org From: Veerasenareddy Burru set distinct relchan in each TL4 queue connected to SDP. currently rechan in TL4 SDP config is getting set to 0 for all SDP-NIX queues. Each TL4 queues for SDP need to be configured with distinct channel for SDP to provide per channel backpressure to NIX. Signed-off-by: Veerasenareddy Burru --- drivers/common/cnxk/roc_nix_tm_utils.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/common/cnxk/roc_nix_tm_utils.c b/drivers/common/cnxk/roc_nix_tm_utils.c index 5864833109..9ede1bebe7 100644 --- a/drivers/common/cnxk/roc_nix_tm_utils.c +++ b/drivers/common/cnxk/roc_nix_tm_utils.c @@ -582,6 +582,7 @@ nix_tm_topology_reg_prep(struct nix *nix, struct nix_tm_node *node, /* Configure TL4 to send to SDP channel instead of CGX/LBK */ if (nix->sdp_link) { + relchan = nix->tx_chan_base & 0xff; plt_tm_dbg("relchan=%u schq=%u tx_chan_cnt=%u\n", relchan, schq, nix->tx_chan_cnt); reg[k] = NIX_AF_TL4X_SDP_LINK_CFG(schq);