From patchwork Thu May 25 09:58:53 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nithin Dabilpuram X-Patchwork-Id: 127432 X-Patchwork-Delegate: jerinj@marvell.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 424AF42B9A; Thu, 25 May 2023 12:38:27 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 31DF442D0D; Thu, 25 May 2023 12:38:27 +0200 (CEST) Received: from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com [67.231.156.173]) by mails.dpdk.org (Postfix) with ESMTP id 5998A40DF8 for ; Thu, 25 May 2023 12:38:25 +0200 (CEST) Received: from pps.filterd (m0045851.ppops.net [127.0.0.1]) by mx0b-0016f401.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 34P9fVrC030786 for ; Thu, 25 May 2023 03:38:24 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=pfpt0220; bh=gmKHXHWn9sI1nWRMWJ1y5JSOLfse1tOsnMaJfIaJ5Iw=; b=hemVPNdGMYNpYKZwuyLk/TDJqvJy5yV0UOdUeSb6xAXV7eSB7KP1ZbQOYRkhzpKm9JtW rknC/KHq7YQqOPe5wyrx2VOPhSvHhI8HLqrhamFgeRm51VCjNwqqY6w+w3urS3VV1xPW /2dwuM3Q05WsO4zsLROwS32tZz5czVkRkuG5AY4TBMGHdqNLATs2oJio7l/tF1LM+/D/ 5iASm8MXcY/RMIDsCFhgKxxv10UetN/A4rsfGYgOW9aWSNQt1sgrIF1Qhy8KRlMbtzPl jOonpzDrELD+6xdBUTbFSwTXBE3sdK+0QUCyZSFF1UuqTCqo2fTN+yNU6IH/hSP5Bj3i vQ== Received: from dc5-exch02.marvell.com ([199.233.59.182]) by mx0b-0016f401.pphosted.com (PPS) with ESMTPS id 3qsspt2cq8-2 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT) for ; Thu, 25 May 2023 03:38:24 -0700 Received: from DC5-EXCH01.marvell.com (10.69.176.38) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.48; Thu, 25 May 2023 03:38:22 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server id 15.0.1497.48 via Frontend Transport; Thu, 25 May 2023 03:38:22 -0700 Received: from hyd1588t430.caveonetworks.com (unknown [10.29.52.204]) by maili.marvell.com (Postfix) with ESMTP id 5C5035B6E84; Thu, 25 May 2023 03:00:19 -0700 (PDT) From: Nithin Dabilpuram To: Nithin Kumar Dabilpuram , Kiran Kumar K , Sunil Kumar Kori , Satha Rao CC: , , Rakesh Kudurumalla Subject: [PATCH v3 21/32] net/cnxk: add receive error mask Date: Thu, 25 May 2023 15:28:53 +0530 Message-ID: <20230525095904.3967080-21-ndabilpuram@marvell.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230525095904.3967080-1-ndabilpuram@marvell.com> References: <20230411091144.1087887-1-ndabilpuram@marvell.com> <20230525095904.3967080-1-ndabilpuram@marvell.com> MIME-Version: 1.0 X-Proofpoint-GUID: wKylChA5mE-Vh5yyXNvHhAOYfq0KZSnY X-Proofpoint-ORIG-GUID: wKylChA5mE-Vh5yyXNvHhAOYfq0KZSnY X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.957,Hydra:6.0.573,FMLib:17.11.176.26 definitions=2023-05-25_06,2023-05-24_01,2023-05-22_02 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org From: Rakesh Kudurumalla receive errors related to MACSEC and USXGMI are masked for cn10kb_b0 and cn10kb Signed-off-by: Rakesh Kudurumalla --- drivers/net/cnxk/cnxk_ethdev.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/drivers/net/cnxk/cnxk_ethdev.c b/drivers/net/cnxk/cnxk_ethdev.c index eeabf6edec..3ceda8c8f9 100644 --- a/drivers/net/cnxk/cnxk_ethdev.c +++ b/drivers/net/cnxk/cnxk_ethdev.c @@ -1267,6 +1267,11 @@ cnxk_nix_configure(struct rte_eth_dev *eth_dev) ROC_NIX_LF_RX_CFG_LEN_IL4 | ROC_NIX_LF_RX_CFG_LEN_IL3 | ROC_NIX_LF_RX_CFG_LEN_OL4 | ROC_NIX_LF_RX_CFG_LEN_OL3); + rx_cfg &= (ROC_NIX_LF_RX_CFG_RX_ERROR_MASK); + + if (roc_feature_nix_has_drop_re_mask()) + rx_cfg |= (ROC_NIX_RE_CRC8_PCH | ROC_NIX_RE_MACSEC); + if (dev->rx_offloads & RTE_ETH_RX_OFFLOAD_SECURITY) { rx_cfg |= ROC_NIX_LF_RX_CFG_IP6_UDP_OPT; /* Disable drop re if rx offload security is enabled and