From patchwork Sun Jun 4 23:24:50 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ivan Malov X-Patchwork-Id: 128029 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 844AE42C2C; Mon, 5 Jun 2023 01:25:32 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id CB1A54113F; Mon, 5 Jun 2023 01:25:26 +0200 (CEST) Received: from agw.arknetworks.am (agw.arknetworks.am [79.141.165.80]) by mails.dpdk.org (Postfix) with ESMTP id 8EAAB4003C for ; Mon, 5 Jun 2023 01:25:24 +0200 (CEST) Received: from localhost.localdomain (unknown [78.109.68.201]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by agw.arknetworks.am (Postfix) with ESMTPSA id BE553E0E15; Mon, 5 Jun 2023 03:25:23 +0400 (+04) From: Ivan Malov To: dev@dpdk.org Cc: Andrew Rybchenko , Ferruh Yigit , Denis Pryazhennikov , Andy Moreton Subject: [PATCH v3 01/34] common/sfc_efx/base: update MCDI headers Date: Mon, 5 Jun 2023 03:24:50 +0400 Message-Id: <20230604232523.6746-2-ivan.malov@arknetworks.am> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20230604232523.6746-1-ivan.malov@arknetworks.am> References: <20230601195538.8265-1-ivan.malov@arknetworks.am> <20230604232523.6746-1-ivan.malov@arknetworks.am> MIME-Version: 1.0 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org From: Denis Pryazhennikov Pickup new FW interface definitions. Signed-off-by: Denis Pryazhennikov Reviewed-by: Ivan Malov Reviewed-by: Andy Moreton --- drivers/common/sfc_efx/base/efx_regs_mcdi.h | 2557 ++++++++++++++++++- 1 file changed, 2467 insertions(+), 90 deletions(-) diff --git a/drivers/common/sfc_efx/base/efx_regs_mcdi.h b/drivers/common/sfc_efx/base/efx_regs_mcdi.h index d1d8093601..76bd1bf4d9 100644 --- a/drivers/common/sfc_efx/base/efx_regs_mcdi.h +++ b/drivers/common/sfc_efx/base/efx_regs_mcdi.h @@ -5,7 +5,10 @@ */ /* - * This file is automatically generated. DO NOT EDIT IT. + * This file is automatically generated, but contains manual changes. + * - replaced the autogenerated license header with BSD-3-Clause; + * - used tabs for the indentation of MC_CMD_ERR_*. + * * To make changes, edit the .yml files in smartnic_registry under doc/mcdi/ and * rebuild this file with "make mcdi_headers_v5". */ @@ -81,19 +84,19 @@ * | \------- Error * \------------------------------ Resync (always set) * - * The client writes it's request into MC shared memory, and rings the - * doorbell. Each request is completed by either by the MC writting - * back into shared memory, or by writting out an event. + * The client writes its request into MC shared memory, and rings the + * doorbell. Each request is completed either by the MC writing + * back into shared memory, or by writing out an event. * * All MCDI commands support completion by shared memory response. Each * request may also contain additional data (accounted for by HEADER.LEN), - * and some response's may also contain additional data (again, accounted + * and some responses may also contain additional data (again, accounted * for by HEADER.LEN). * * Some MCDI commands support completion by event, in which any associated * response data is included in the event. * - * The protocol requires one response to be delivered for every request, a + * The protocol requires one response to be delivered for every request; a * request should not be sent unless the response for the previous request * has been received (either by polling shared memory, or by receiving * an event). @@ -339,7 +342,7 @@ /* enum: The requesting client is not a function */ #define MC_CMD_ERR_CLIENT_NOT_FN 0x100c /* enum: The requested operation might require the command to be passed between - * MCs, and thetransport doesn't support that. Should only ever been seen over + * MCs, and the transport doesn't support that. Should only ever been seen over * the UART. */ #define MC_CMD_ERR_TRANSPORT_NOPROXY 0x100d @@ -376,7 +379,7 @@ * sub-variant switching. */ #define MC_CMD_ERR_FILTERS_PRESENT 0x1014 -/* enum: The clock whose frequency you've attempted to set set doesn't exist on +/* enum: The clock whose frequency you've attempted to set doesn't exist on * this NIC */ #define MC_CMD_ERR_NO_CLOCK 0x1015 @@ -658,12 +661,624 @@ * be allocated by different counter blocks, so e.g. AR counter 42 is different * from CT counter 42. Generation counts are also type-specific. This value is * also present in the header of streaming counter packets, in the IDENTIFIER - * field (see packetiser packet format definitions). + * field (see packetiser packet format definitions). Also note that LACP + * counter IDs are not allocated individually, instead the counter IDs are + * directly tied to the LACP balance table indices. These in turn are allocated + * in large contiguous blocks as a LAG config. Calling MAE_COUNTER_ALLOC/FREE + * with an LACP counter type will return EPERM. */ /* enum: Action Rule counters - can be referenced in AR response. */ #define MAE_COUNTER_TYPE_AR 0x0 /* enum: Conntrack counters - can be referenced in CT response. */ #define MAE_COUNTER_TYPE_CT 0x1 +/* enum: Outer Rule counters - can be referenced in OR response. */ +#define MAE_COUNTER_TYPE_OR 0x2 +/* enum: LACP counters - linked to LACP balance table entries. */ +#define MAE_COUNTER_TYPE_LACP 0x3 + +/* MAE_COUNTER_ID enum: ID of allocated counter or counter list. */ +/* enum: A counter ID that is guaranteed never to represent a real counter or + * counter list. + */ +#define MAE_COUNTER_ID_NULL 0xffffffff + +/* TABLE_ID enum: Unique IDs for tables. The 32-bit ID values have been + * structured with bits [31:24] reserved (0), [23:16] indicating which major + * block the tables belongs to (0=VNIC TX, none currently; 1=MAE; 2=VNIC RX), + * [15:8] a unique ID within the block, and [7:0] reserved for future + * variations of the same table. (All of the tables currently defined within + * the streaming engines are listed here, but this does not imply that they are + * all supported - MC_CMD_TABLE_LIST returns the list of actually supported + * tables.) The DPU offload engines' enumerators follow a deliberate pattern: + * 0x01010000 + is_dpu_net * 0x10000 + is_wr_or_tx * 0x8000 + is_lite_pipe * + * 0x1000 + oe_engine_type * 0x100 + oe_instance_within_pipe * 0x10 + */ +/* enum: Outer_Rule_Table in the MAE - refer to SF-123102-TC. */ +#define TABLE_ID_OUTER_RULE_TABLE 0x10000 +/* enum: Outer_Rule_No_CT_Table in the MAE - refer to SF-123102-TC. */ +#define TABLE_ID_OUTER_RULE_NO_CT_TABLE 0x10100 +/* enum: Mgmt_Filter_Table in the MAE - refer to SF-123102-TC. */ +#define TABLE_ID_MGMT_FILTER_TABLE 0x10200 +/* enum: Conntrack_Table in the MAE - refer to SF-123102-TC. */ +#define TABLE_ID_CONNTRACK_TABLE 0x10300 +/* enum: Action_Rule_Table in the MAE - refer to SF-123102-TC. */ +#define TABLE_ID_ACTION_RULE_TABLE 0x10400 +/* enum: Mgroup_Default_Action_Set_Table in the MAE - refer to SF-123102-TC. */ +#define TABLE_ID_MGROUP_DEFAULT_ACTION_SET_TABLE 0x10500 +/* enum: Encap_Hdr_Part1_Table in the MAE - refer to SF-123102-TC. */ +#define TABLE_ID_ENCAP_HDR_PART1_TABLE 0x10600 +/* enum: Encap_Hdr_Part2_Table in the MAE - refer to SF-123102-TC. */ +#define TABLE_ID_ENCAP_HDR_PART2_TABLE 0x10700 +/* enum: Replace_Src_MAC_Table in the MAE - refer to SF-123102-TC. */ +#define TABLE_ID_REPLACE_SRC_MAC_TABLE 0x10800 +/* enum: Replace_Dst_MAC_Table in the MAE - refer to SF-123102-TC. */ +#define TABLE_ID_REPLACE_DST_MAC_TABLE 0x10900 +/* enum: Dst_Mport_VC_Table in the MAE - refer to SF-123102-TC. */ +#define TABLE_ID_DST_MPORT_VC_TABLE 0x10a00 +/* enum: LACP_LAG_Config_Table in the MAE - refer to SF-123102-TC. */ +#define TABLE_ID_LACP_LAG_CONFIG_TABLE 0x10b00 +/* enum: LACP_Balance_Table in the MAE - refer to SF-123102-TC. */ +#define TABLE_ID_LACP_BALANCE_TABLE 0x10c00 +/* enum: Dst_Mport_Host_Chan_Table in the MAE - refer to SF-123102-TC. */ +#define TABLE_ID_DST_MPORT_HOST_CHAN_TABLE 0x10d00 +/* enum: VNIC_Rx_Encap_Table in VNIC Rx - refer to SF-123102-TC. */ +#define TABLE_ID_VNIC_RX_ENCAP_TABLE 0x20000 +/* enum: Steering_Table in VNIC Rx - refer to SF-123102-TC. */ +#define TABLE_ID_STEERING_TABLE 0x20100 +/* enum: RSS_Context_Table in VNIC Rx - refer to SF-123102-TC. */ +#define TABLE_ID_RSS_CONTEXT_TABLE 0x20200 +/* enum: Indirection_Table in VNIC Rx - refer to SF-123102-TC. */ +#define TABLE_ID_INDIRECTION_TABLE 0x20300 +/* enum: DPU.host read pipe first CRC offload engine profiles - refer to + * XN-200147-AN. + */ +#define TABLE_ID_DPU_HOST_RD_CRC0_OE_PROFILE 0x1010000 +/* enum: DPU.host read pipe second CRC offload engine profiles - refer to + * XN-200147-AN. + */ +#define TABLE_ID_DPU_HOST_RD_CRC1_OE_PROFILE 0x1010010 +/* enum: DPU.host write pipe first CRC offload engine profiles - refer to + * XN-200147-AN. + */ +#define TABLE_ID_DPU_HOST_WR_CRC0_OE_PROFILE 0x1018000 +/* enum: DPU.host write pipe second CRC offload engine profiles - refer to + * XN-200147-AN. + */ +#define TABLE_ID_DPU_HOST_WR_CRC1_OE_PROFILE 0x1018010 +/* enum: DPU.net 'full' receive pipe CRC offload engine profiles - refer to + * XN-200147-AN. + */ +#define TABLE_ID_DPU_NET_RX_CRC0_OE_PROFILE 0x1020000 +/* enum: DPU.net 'full' receive pipe first checksum offload engine profiles - + * refer to XN-200147-AN. + */ +#define TABLE_ID_DPU_NET_RX_CSUM0_OE_PROFILE 0x1020100 +/* enum: DPU.net 'full' receive pipe second checksum offload engine profiles - + * refer to XN-200147-AN. + */ +#define TABLE_ID_DPU_NET_RX_CSUM1_OE_PROFILE 0x1020110 +/* enum: DPU.net 'full' receive pipe AES-GCM offload engine profiles - refer to + * XN-200147-AN. + */ +#define TABLE_ID_DPU_NET_RX_AES_GCM0_OE_PROFILE 0x1020200 +/* enum: DPU.net 'lite' receive pipe CRC offload engine profiles - refer to + * XN-200147-AN. + */ +#define TABLE_ID_DPU_NET_RXLITE_CRC0_OE_PROFILE 0x1021000 +/* enum: DPU.net 'lite' receive pipe checksum offload engine profiles - refer + * to XN-200147-AN. + */ +#define TABLE_ID_DPU_NET_RXLITE_CSUM0_OE_PROFILE 0x1021100 +/* enum: DPU.net 'full' transmit pipe CRC offload engine profiles - refer to + * XN-200147-AN. + */ +#define TABLE_ID_DPU_NET_TX_CRC0_OE_PROFILE 0x1028000 +/* enum: DPU.net 'full' transmit pipe first checksum offload engine profiles - + * refer to XN-200147-AN. + */ +#define TABLE_ID_DPU_NET_TX_CSUM0_OE_PROFILE 0x1028100 +/* enum: DPU.net 'full' transmit pipe second checksum offload engine profiles - + * refer to XN-200147-AN. + */ +#define TABLE_ID_DPU_NET_TX_CSUM1_OE_PROFILE 0x1028110 +/* enum: DPU.net 'full' transmit pipe AES-GCM offload engine profiles - refer + * to XN-200147-AN. + */ +#define TABLE_ID_DPU_NET_TX_AES_GCM0_OE_PROFILE 0x1028200 +/* enum: DPU.net 'lite' transmit pipe CRC offload engine profiles - refer to + * XN-200147-AN. + */ +#define TABLE_ID_DPU_NET_TXLITE_CRC0_OE_PROFILE 0x1029000 +/* enum: DPU.net 'lite' transmit pipe checksum offload engine profiles - refer + * to XN-200147-AN. + */ +#define TABLE_ID_DPU_NET_TXLITE_CSUM0_OE_PROFILE 0x1029100 + +/* TABLE_COMPRESSED_VLAN enum: Compressed VLAN TPID as used by some field + * types; can be calculated by (((ether_type_msb >> 2) & 0x4) ^ 0x4) | + * (ether_type_msb & 0x3); + */ +#define TABLE_COMPRESSED_VLAN_TPID_8100 0x5 /* enum */ +#define TABLE_COMPRESSED_VLAN_TPID_88A8 0x4 /* enum */ +#define TABLE_COMPRESSED_VLAN_TPID_9100 0x1 /* enum */ +#define TABLE_COMPRESSED_VLAN_TPID_9200 0x2 /* enum */ +#define TABLE_COMPRESSED_VLAN_TPID_9300 0x3 /* enum */ + +/* TABLE_NAT_DIR enum: NAT direction. */ +#define TABLE_NAT_DIR_SOURCE 0x0 /* enum */ +#define TABLE_NAT_DIR_DEST 0x1 /* enum */ + +/* TABLE_RSS_KEY_MODE enum: Defines how the value for Toeplitz hashing for RSS + * is constructed as a concatenation (indicated here by "++") of packet header + * fields. + */ +/* enum: IP src addr ++ IP dst addr */ +#define TABLE_RSS_KEY_MODE_SA_DA 0x0 +/* enum: IP src addr ++ IP dst addr ++ TCP/UDP src port ++ TCP/UDP dst port */ +#define TABLE_RSS_KEY_MODE_SA_DA_SP_DP 0x1 +/* enum: IP src addr */ +#define TABLE_RSS_KEY_MODE_SA 0x2 +/* enum: IP dst addr */ +#define TABLE_RSS_KEY_MODE_DA 0x3 +/* enum: IP src addr ++ TCP/UDP src port */ +#define TABLE_RSS_KEY_MODE_SA_SP 0x4 +/* enum: IP dest addr ++ TCP dest port */ +#define TABLE_RSS_KEY_MODE_DA_DP 0x5 +/* enum: Nothing (produces input of 0, resulting in output hash of 0) */ +#define TABLE_RSS_KEY_MODE_NONE 0x7 + +/* TABLE_RSS_SPREAD_MODE enum: RSS spreading mode. */ +/* enum: RSS uses Indirection_Table lookup. */ +#define TABLE_RSS_SPREAD_MODE_INDIRECTION 0x0 +/* enum: RSS uses even spreading calculation. */ +#define TABLE_RSS_SPREAD_MODE_EVEN 0x1 + +/* CRC_VARIANT enum: Operation for the DPU CRC engine to perform. */ +/* enum: Calculate a 32-bit CRC. */ +#define CRC_VARIANT_CRC32 0x1 +/* enum: Calculate a 64-bit CRC. */ +#define CRC_VARIANT_CRC64 0x2 + +/* DPU_CSUM_OP enum: Operation for the DPU checksum engine to perform. */ +/* enum: Calculate the checksum for a TCP payload, output result on OPR bus. */ +#define DPU_CSUM_OP_CALC_TCP 0x0 +/* enum: Calculate the checksum for a UDP payload, output result on OPR bus. */ +#define DPU_CSUM_OP_CALC_UDP 0x1 +/* enum: Calculate the checksum for a TCP payload, output match/not match value + * on OPR bus. + */ +#define DPU_CSUM_OP_VALIDATE_TCP 0x2 +/* enum: Calculate the checksum for a UDP payload, output match/not match value + * on OPR bus. + */ +#define DPU_CSUM_OP_VALIDATE_UDP 0x3 + +/* GCM_OP_CODE enum: Operation for the DPU AES-GCM engine to perform. */ +/* enum: Encrypt/decrypt a stream of data. */ +#define GCM_OP_CODE_BULK_CRYPT 0x0 +/* enum: Calculate the authentication tag for a stream of data. */ +#define GCM_OP_CODE_BULK_AUTH 0x1 +/* enum: Encrypt/decrypt an IPsec packet. */ +#define GCM_OP_CODE_IPSEC_CRYPT 0x2 +/* enum: Calculate the authentication tag of an IPsec packet. */ +#define GCM_OP_CODE_IPSEC_AUTH 0x3 + +/* AES_KEY_LEN enum: Key size for AES crypto operations */ +/* enum: 128 bit key size. */ +#define AES_KEY_LEN_AES_KEY_128 0x0 +/* enum: 256 bit key size. */ +#define AES_KEY_LEN_AES_KEY_256 0x1 + +/* TABLE_FIELD_ID enum: Unique IDs for fields. Related concepts have been + * loosely grouped together into blocks with gaps for expansion, but the values + * are arbitrary. Field IDs are not specific to particular tables, and in some + * cases this sharing means that they are not used with the exact names of the + * corresponding table definitions in SF-123102-TC; however, the mapping should + * still be clear. The intent is that a list of fields, with their associated + * bit widths and semantics version code, unambiguously defines the semantics + * of the fields in a key or response. (Again, this list includes all of the + * fields currently defined within the streaming engines, but only a subset may + * actually be used by the supported list of tables.) + */ +/* enum: May appear multiple times within a key or response, and indicates that + * the field is unused and should be set to 0 (or masked out if permitted by + * the MASK_VALUE for this field). + */ +#define TABLE_FIELD_ID_UNUSED 0x0 +/* enum: Source m-port (a full m-port label). */ +#define TABLE_FIELD_ID_SRC_MPORT 0x1 +/* enum: Destination m-port (a full m-port label). */ +#define TABLE_FIELD_ID_DST_MPORT 0x2 +/* enum: Source m-group ID. */ +#define TABLE_FIELD_ID_SRC_MGROUP_ID 0x3 +/* enum: Physical network port ID (or m-port ID; same thing, for physical + * network ports). + */ +#define TABLE_FIELD_ID_NETWORK_PORT_ID 0x4 +/* enum: True if packet arrived via network port, false if it arrived via host. + */ +#define TABLE_FIELD_ID_IS_FROM_NETWORK 0x5 +/* enum: Full virtual channel from capsule header. */ +#define TABLE_FIELD_ID_CH_VC 0x6 +/* enum: Low bits of virtual channel from capsule header. */ +#define TABLE_FIELD_ID_CH_VC_LOW 0x7 +/* enum: User mark value in metadata and packet prefix. */ +#define TABLE_FIELD_ID_USER_MARK 0x8 +/* enum: User flag value in metadata and packet prefix. */ +#define TABLE_FIELD_ID_USER_FLAG 0x9 +/* enum: Counter ID associated with a response. All-bits-1 is a null value to + * suppress counting. + */ +#define TABLE_FIELD_ID_COUNTER_ID 0xa +/* enum: Discriminator which may be set by plugins in some lookup keys; this + * allows plugins to make a reinterpretation of packet fields in these keys + * without clashing with the normal interpretation. + */ +#define TABLE_FIELD_ID_DISCRIM 0xb +/* enum: Destination MAC address. The mapping from bytes in a frame to the + * 48-bit value for this field is in network order, i.e. a MAC address of + * AA:BB:CC:DD:EE:FF becomes a 48-bit value of 0xAABBCCDDEEFF. + */ +#define TABLE_FIELD_ID_DST_MAC 0x14 +/* enum: Source MAC address (see notes for DST_MAC). */ +#define TABLE_FIELD_ID_SRC_MAC 0x15 +/* enum: Outer VLAN tag TPID, compressed to an enumeration. */ +#define TABLE_FIELD_ID_OVLAN_TPID_COMPRESSED 0x16 +/* enum: Full outer VLAN tag TCI (16 bits). */ +#define TABLE_FIELD_ID_OVLAN 0x17 +/* enum: Outer VLAN ID (least significant 12 bits of full 16-bit TCI) only. */ +#define TABLE_FIELD_ID_OVLAN_VID 0x18 +/* enum: Inner VLAN tag TPID, compressed to an enumeration. */ +#define TABLE_FIELD_ID_IVLAN_TPID_COMPRESSED 0x19 +/* enum: Full inner VLAN tag TCI (16 bits). */ +#define TABLE_FIELD_ID_IVLAN 0x1a +/* enum: Inner VLAN ID (least significant 12 bits of full 16-bit TCI) only. */ +#define TABLE_FIELD_ID_IVLAN_VID 0x1b +/* enum: Ethertype. */ +#define TABLE_FIELD_ID_ETHER_TYPE 0x1c +/* enum: Source IP address, either IPv4 or IPv6. The mapping from bytes in a + * frame to the 128-bit value for this field is in network order, with IPv4 + * addresses assumed to have 12 bytes of trailing zeroes. i.e. the IPv6 address + * [2345::6789:ABCD] is 0x2345000000000000000000006789ABCD; the IPv4 address + * 192.168.1.2 is 0xC0A80102000000000000000000000000. + */ +#define TABLE_FIELD_ID_SRC_IP 0x1d +/* enum: Destination IP address (see notes for SRC_IP). */ +#define TABLE_FIELD_ID_DST_IP 0x1e +/* enum: IPv4 Type-of-Service or IPv6 Traffic Class field. */ +#define TABLE_FIELD_ID_IP_TOS 0x1f +/* enum: IP Protocol. */ +#define TABLE_FIELD_ID_IP_PROTO 0x20 +/* enum: Layer 4 source port. */ +#define TABLE_FIELD_ID_SRC_PORT 0x21 +/* enum: Layer 4 destination port. */ +#define TABLE_FIELD_ID_DST_PORT 0x22 +/* enum: TCP flags. */ +#define TABLE_FIELD_ID_TCP_FLAGS 0x23 +/* enum: Virtual Network Identifier (VXLAN) or Virtual Session ID (NVGRE). */ +#define TABLE_FIELD_ID_VNI 0x24 +/* enum: True if packet has any tunnel encapsulation header. */ +#define TABLE_FIELD_ID_HAS_ENCAP 0x32 +/* enum: True if encap header has an outer VLAN tag. */ +#define TABLE_FIELD_ID_HAS_ENC_OVLAN 0x33 +/* enum: True if encap header has an inner VLAN tag. */ +#define TABLE_FIELD_ID_HAS_ENC_IVLAN 0x34 +/* enum: True if encap header is some sort of IP. */ +#define TABLE_FIELD_ID_HAS_ENC_IP 0x35 +/* enum: True if encap header is specifically IPv4. */ +#define TABLE_FIELD_ID_HAS_ENC_IP4 0x36 +/* enum: True if encap header is UDP. */ +#define TABLE_FIELD_ID_HAS_ENC_UDP 0x37 +/* enum: True if only/inner frame has an outer VLAN tag. */ +#define TABLE_FIELD_ID_HAS_OVLAN 0x38 +/* enum: True if only/inner frame has an inner VLAN tag. */ +#define TABLE_FIELD_ID_HAS_IVLAN 0x39 +/* enum: True if only/inner frame is some sort of IP. */ +#define TABLE_FIELD_ID_HAS_IP 0x3a +/* enum: True if only/inner frame has a recognised L4 IP protocol (TCP or UDP). + */ +#define TABLE_FIELD_ID_HAS_L4 0x3b +/* enum: True if only/inner frame is an IP fragment. */ +#define TABLE_FIELD_ID_IP_FRAG 0x3c +/* enum: True if only/inner frame is the first IP fragment (fragment offset 0). + */ +#define TABLE_FIELD_ID_IP_FIRST_FRAG 0x3d +/* enum: True if only/inner frame has an IP Time-To-Live of <= 1. (Note: the + * implementation calls this "ip_ttl_is_one" but does in fact match packets + * with TTL=0 - which we shouldn't be seeing! - as well.) + */ +#define TABLE_FIELD_ID_IP_TTL_LE_ONE 0x3e +/* enum: True if only/inner frame has any of TCP SYN, FIN or RST flags set. */ +#define TABLE_FIELD_ID_TCP_INTERESTING_FLAGS 0x3f +/* enum: Plugin channel selection. */ +#define TABLE_FIELD_ID_RDP_PL_CHAN 0x50 +/* enum: Enable update of CH_ROUTE_RDP_C_PL route bit. */ +#define TABLE_FIELD_ID_RDP_C_PL_EN 0x51 +/* enum: New value of CH_ROUTE_RDP_C_PL route bit. */ +#define TABLE_FIELD_ID_RDP_C_PL 0x52 +/* enum: Enable update of CH_ROUTE_RDP_D_PL route bit. */ +#define TABLE_FIELD_ID_RDP_D_PL_EN 0x53 +/* enum: New value of CH_ROUTE_RDP_D_PL route bit. */ +#define TABLE_FIELD_ID_RDP_D_PL 0x54 +/* enum: Enable update of CH_ROUTE_RDP_OUT_HOST_CHAN route bit. */ +#define TABLE_FIELD_ID_RDP_OUT_HOST_CHAN_EN 0x55 +/* enum: New value of CH_ROUTE_RDP_OUT_HOST_CHAN route bit. */ +#define TABLE_FIELD_ID_RDP_OUT_HOST_CHAN 0x56 +/* enum: Recirculation ID for lookup sequences with two action rule lookups. */ +#define TABLE_FIELD_ID_RECIRC_ID 0x64 +/* enum: Domain ID passed to conntrack and action rule lookups. */ +#define TABLE_FIELD_ID_DOMAIN 0x65 +/* enum: Construction mode for encap_tunnel_id - see MAE_CT_VNI_MODE enum. */ +#define TABLE_FIELD_ID_CT_VNI_MODE 0x66 +/* enum: True to inhibit conntrack lookup if TCP SYN, FIN or RST flag is set. + */ +#define TABLE_FIELD_ID_CT_TCP_FLAGS_INHIBIT 0x67 +/* enum: True to do conntrack lookups for IPv4 TCP packets. */ +#define TABLE_FIELD_ID_DO_CT_IP4_TCP 0x68 +/* enum: True to do conntrack lookups for IPv4 UDP packets. */ +#define TABLE_FIELD_ID_DO_CT_IP4_UDP 0x69 +/* enum: True to do conntrack lookups for IPv6 TCP packets. */ +#define TABLE_FIELD_ID_DO_CT_IP6_TCP 0x6a +/* enum: True to do conntrack lookups for IPv6 UDP packets. */ +#define TABLE_FIELD_ID_DO_CT_IP6_UDP 0x6b +/* enum: Outer rule identifier. */ +#define TABLE_FIELD_ID_OUTER_RULE_ID 0x6c +/* enum: Encapsulation type - see MAE_MCDI_ENCAP_TYPE enum. */ +#define TABLE_FIELD_ID_ENCAP_TYPE 0x6d +/* enum: Encap tunnel ID for conntrack lookups from VNI, VLAN tag(s), or 0, + * depending on CT_VNI_MODE. + */ +#define TABLE_FIELD_ID_ENCAP_TUNNEL_ID 0x78 +/* enum: A conntrack entry identifier, passed to plugins. */ +#define TABLE_FIELD_ID_CT_ENTRY_ID 0x79 +/* enum: Either source or destination NAT replacement port. */ +#define TABLE_FIELD_ID_NAT_PORT 0x7a +/* enum: Either source or destination NAT replacement IPv4 address. Note that + * this is specifically an IPv4 address (IPv6 is not supported for NAT), with + * byte mapped to a 32-bit value in network order, i.e. the IPv4 address + * 192.168.1.2 is the value 0xC0A80102. + */ +#define TABLE_FIELD_ID_NAT_IP 0x7b +/* enum: NAT direction: 0=>source, 1=>destination. */ +#define TABLE_FIELD_ID_NAT_DIR 0x7c +/* enum: Conntrack mark value, passed to action rule lookup. Note that this is + * not related to the "user mark" in the metadata / packet prefix. + */ +#define TABLE_FIELD_ID_CT_MARK 0x7d +/* enum: Private flags for conntrack, passed to action rule lookup. */ +#define TABLE_FIELD_ID_CT_PRIV_FLAGS 0x7e +/* enum: True if the conntrack lookup resulted in a hit. */ +#define TABLE_FIELD_ID_CT_HIT 0x7f +/* enum: True to suppress delivery when source and destination m-ports match. + */ +#define TABLE_FIELD_ID_SUPPRESS_SELF_DELIVERY 0x8c +/* enum: True to perform tunnel decapsulation. */ +#define TABLE_FIELD_ID_DO_DECAP 0x8d +/* enum: True to copy outer frame DSCP to inner on decap. */ +#define TABLE_FIELD_ID_DECAP_DSCP_COPY 0x8e +/* enum: True to map outer frame ECN to inner on decap, by RFC 6040 rules. */ +#define TABLE_FIELD_ID_DECAP_ECN_RFC6040 0x8f +/* enum: True to replace DSCP field. */ +#define TABLE_FIELD_ID_DO_REPLACE_DSCP 0x90 +/* enum: True to replace ECN field. */ +#define TABLE_FIELD_ID_DO_REPLACE_ECN 0x91 +/* enum: True to decrement IP Time-To-Live. */ +#define TABLE_FIELD_ID_DO_DECR_IP_TTL 0x92 +/* enum: True to replace source MAC address. */ +#define TABLE_FIELD_ID_DO_SRC_MAC 0x93 +/* enum: True to replace destination MAC address. */ +#define TABLE_FIELD_ID_DO_DST_MAC 0x94 +/* enum: Number of VLAN tags to pop. Valid values are 0, 1, or 2. */ +#define TABLE_FIELD_ID_DO_VLAN_POP 0x95 +/* enum: Number of VLANs tags to push. Valid values are 0, 1, or 2. */ +#define TABLE_FIELD_ID_DO_VLAN_PUSH 0x96 +/* enum: True to count this packet. */ +#define TABLE_FIELD_ID_DO_COUNT 0x97 +/* enum: True to perform tunnel encapsulation. */ +#define TABLE_FIELD_ID_DO_ENCAP 0x98 +/* enum: True to copy inner frame DSCP to outer on encap. */ +#define TABLE_FIELD_ID_ENCAP_DSCP_COPY 0x99 +/* enum: True to copy inner frame ECN to outer on encap. */ +#define TABLE_FIELD_ID_ENCAP_ECN_COPY 0x9a +/* enum: True to deliver the packet (otherwise it is dropped). */ +#define TABLE_FIELD_ID_DO_DELIVER 0x9b +/* enum: True to set the user flag in the metadata. */ +#define TABLE_FIELD_ID_DO_FLAG 0x9c +/* enum: True to update the user mark in the metadata. */ +#define TABLE_FIELD_ID_DO_MARK 0x9d +/* enum: True to override the capsule virtual channel for network deliveries. + */ +#define TABLE_FIELD_ID_DO_SET_NET_CHAN 0x9e +/* enum: True to override the reported source m-port for host deliveries. */ +#define TABLE_FIELD_ID_DO_SET_SRC_MPORT 0x9f +/* enum: Encap header ID for DO_ENCAP, indexing Encap_Hdr_Part1/2_Table. */ +#define TABLE_FIELD_ID_ENCAP_HDR_ID 0xaa +/* enum: New DSCP value for DO_REPLACE_DSCP. */ +#define TABLE_FIELD_ID_DSCP_VALUE 0xab +/* enum: If DO_REPLACE_ECN is set, the new value for the ECN field. If + * DO_REPLACE_ECN is not set, ECN_CONTROL[0] and ECN_CONTROL[1] are set to + * request remapping of ECT0 and ECT1 ECN codepoints respectively to CE. + */ +#define TABLE_FIELD_ID_ECN_CONTROL 0xac +/* enum: Source MAC ID for DO_SRC_MAC, indexing Replace_Src_MAC_Table. */ +#define TABLE_FIELD_ID_SRC_MAC_ID 0xad +/* enum: Destination MAC ID for DO_DST_MAC, indexing Replace_Dst_MAC_Table. */ +#define TABLE_FIELD_ID_DST_MAC_ID 0xae +/* enum: Parameter for either DO_SET_NET_CHAN (only bottom 6 bits used in this + * case) or DO_SET_SRC_MPORT. + */ +#define TABLE_FIELD_ID_REPORTED_SRC_MPORT_OR_NET_CHAN 0xaf +/* enum: 64-byte chunk of added encapsulation header. */ +#define TABLE_FIELD_ID_CHUNK64 0xb4 +/* enum: 32-byte chunk of added encapsulation header. */ +#define TABLE_FIELD_ID_CHUNK32 0xb5 +/* enum: 16-byte chunk of added encapsulation header. */ +#define TABLE_FIELD_ID_CHUNK16 0xb6 +/* enum: 8-byte chunk of added encapsulation header. */ +#define TABLE_FIELD_ID_CHUNK8 0xb7 +/* enum: 4-byte chunk of added encapsulation header. */ +#define TABLE_FIELD_ID_CHUNK4 0xb8 +/* enum: 2-byte chunk of added encapsulation header. */ +#define TABLE_FIELD_ID_CHUNK2 0xb9 +/* enum: Added encapsulation header length in words. */ +#define TABLE_FIELD_ID_HDR_LEN_W 0xba +/* enum: Static value for layer 2/3 LACP hash of the encapsulation header. */ +#define TABLE_FIELD_ID_ENC_LACP_HASH_L23 0xbb +/* enum: Static value for layer 4 LACP hash of the encapsulation header. */ +#define TABLE_FIELD_ID_ENC_LACP_HASH_L4 0xbc +/* enum: True to use the static ENC_LACP_HASH values for the encap header + * instead of the calculated values for the inner frame when delivering a newly + * encapsulated packet to a LAG m-port. + */ +#define TABLE_FIELD_ID_USE_ENC_LACP_HASHES 0xbd +/* enum: True to trigger conntrack from first action rule lookup (AR=>CT=>AR + * sequence). + */ +#define TABLE_FIELD_ID_DO_CT 0xc8 +/* enum: True to perform NAT using parameters from conntrack lookup response. + */ +#define TABLE_FIELD_ID_DO_NAT 0xc9 +/* enum: True to trigger recirculated action rule lookup (AR=>AR sequence). */ +#define TABLE_FIELD_ID_DO_RECIRC 0xca +/* enum: Next action set payload ID for replay. The null value is all-1-bits. + */ +#define TABLE_FIELD_ID_NEXT_ACTION_SET_PAYLOAD 0xcb +/* enum: Next action set row ID for replay. The null value is all-1-bits. */ +#define TABLE_FIELD_ID_NEXT_ACTION_SET_ROW 0xcc +/* enum: Action set payload ID for additional delivery to management CPU. The + * null value is all-1-bits. + */ +#define TABLE_FIELD_ID_MC_ACTION_SET_PAYLOAD 0xcd +/* enum: Action set row ID for additional delivery to management CPU. The null + * value is all-1-bits. + */ +#define TABLE_FIELD_ID_MC_ACTION_SET_ROW 0xce +/* enum: True to include layer 4 in LACP hash on delivery to a LAG m-port. */ +#define TABLE_FIELD_ID_LACP_INC_L4 0xdc +/* enum: True to request that LACP is performed by a plugin. */ +#define TABLE_FIELD_ID_LACP_PLUGIN 0xdd +/* enum: LACP_Balance_Table base address divided by 64. */ +#define TABLE_FIELD_ID_BAL_TBL_BASE_DIV64 0xde +/* enum: Length of balance table region: 0=>64, 1=>128, 2=>256. */ +#define TABLE_FIELD_ID_BAL_TBL_LEN_ID 0xdf +/* enum: LACP LAG ID (i.e. the low 3 bits of LACP LAG mport ID), indexing + * LACP_LAG_Config_Table. Refer to SF-123102-TC. + */ +#define TABLE_FIELD_ID_LACP_LAG_ID 0xe0 +/* enum: Address in LACP_Balance_Table. The balance table is partitioned + * between LAGs according to the settings in LACP_LAG_Config_Table and then + * indexed by the LACP hash, providing the mapping to destination mports. Refer + * to SF-123102-TC. + */ +#define TABLE_FIELD_ID_BAL_TBL_ADDR 0xe1 +/* enum: UDP port to match for UDP-based encapsulations; required to be 0 for + * other encapsulation types. + */ +#define TABLE_FIELD_ID_UDP_PORT 0xe6 +/* enum: True to perform RSS based on outer fields rather than inner fields. */ +#define TABLE_FIELD_ID_RSS_ON_OUTER 0xe7 +/* enum: True to perform steering table lookup on outer fields rather than + * inner fields. + */ +#define TABLE_FIELD_ID_STEER_ON_OUTER 0xe8 +/* enum: Destination queue ID for host delivery. */ +#define TABLE_FIELD_ID_DST_QID 0xf0 +/* enum: True to drop this packet. */ +#define TABLE_FIELD_ID_DROP 0xf1 +/* enum: True to strip outer VLAN tag from this packet. */ +#define TABLE_FIELD_ID_VLAN_STRIP 0xf2 +/* enum: True to override the user mark field with the supplied USER_MARK, or + * false to bitwise-OR the USER_MARK into it. + */ +#define TABLE_FIELD_ID_MARK_OVERRIDE 0xf3 +/* enum: True to override the user flag field with the supplied USER_FLAG, or + * false to bitwise-OR the USER_FLAG into it. + */ +#define TABLE_FIELD_ID_FLAG_OVERRIDE 0xf4 +/* enum: RSS context ID, indexing the RSS_Context_Table. */ +#define TABLE_FIELD_ID_RSS_CTX_ID 0xfa +/* enum: True to enable RSS. */ +#define TABLE_FIELD_ID_RSS_EN 0xfb +/* enum: Toeplitz hash key. */ +#define TABLE_FIELD_ID_KEY 0xfc +/* enum: Key mode for IPv4 TCP packets - see TABLE_RSS_KEY_MODE enum. */ +#define TABLE_FIELD_ID_TCP_V4_KEY_MODE 0xfd +/* enum: Key mode for IPv6 TCP packets - see TABLE_RSS_KEY_MODE enum. */ +#define TABLE_FIELD_ID_TCP_V6_KEY_MODE 0xfe +/* enum: Key mode for IPv4 UDP packets - see TABLE_RSS_KEY_MODE enum. */ +#define TABLE_FIELD_ID_UDP_V4_KEY_MODE 0xff +/* enum: Key mode for IPv6 UDP packets - see TABLE_RSS_KEY_MODE enum. */ +#define TABLE_FIELD_ID_UDP_V6_KEY_MODE 0x100 +/* enum: Key mode for other IPv4 packets - see TABLE_RSS_KEY_MODE enum. */ +#define TABLE_FIELD_ID_OTHER_V4_KEY_MODE 0x101 +/* enum: Key mode for other IPv6 packets - see TABLE_RSS_KEY_MODE enum. */ +#define TABLE_FIELD_ID_OTHER_V6_KEY_MODE 0x102 +/* enum: Spreading mode - 0=>indirection; 1=>even. */ +#define TABLE_FIELD_ID_SPREAD_MODE 0x103 +/* enum: For indirection spreading mode, the base address of a region within + * the Indirection_Table. For even spreading mode, the number of queues to + * spread across (only values 1-255 are valid for this mode). + */ +#define TABLE_FIELD_ID_INDIR_TBL_BASE 0x104 +/* enum: For indirection spreading mode, identifies the length of a region + * within the Indirection_Table, where length = 32 << len_id. Must be set to 0 + * for even spreading mode. + */ +#define TABLE_FIELD_ID_INDIR_TBL_LEN_ID 0x105 +/* enum: An offset to be applied to the base destination queue ID. */ +#define TABLE_FIELD_ID_INDIR_OFFSET 0x106 +/* enum: DPU offload engine profile ID to address. */ +#define TABLE_FIELD_ID_OE_PROFILE 0x3e8 +/* enum: Width of the CRC to calculate - see CRC_VARIANT enum. */ +#define TABLE_FIELD_ID_CRC_VARIANT 0x3f2 +/* enum: If set, reflect the bits of each input byte, bit 7 is LSB, bit 0 is + * MSB. If clear, bit 7 is MSB, bit 0 is LSB. + */ +#define TABLE_FIELD_ID_CRC_REFIN 0x3f3 +/* enum: If set, reflect the bits of each output byte, bit 7 is LSB, bit 0 is + * MSB. If clear, bit 7 is MSB, bit 0 is LSB. + */ +#define TABLE_FIELD_ID_CRC_REFOUT 0x3f4 +/* enum: If set, invert every bit of the output value. */ +#define TABLE_FIELD_ID_CRC_INVOUT 0x3f5 +/* enum: The CRC polynomial to use for checksumming, in normal form. See + * https://en.wikipedia.org/wiki/Cyclic_redundancy_check#Specification for a + * description of normal form. + */ +#define TABLE_FIELD_ID_CRC_POLY 0x3f6 +/* enum: Operation for the checksum engine to perform - see DPU_CSUM_OP enum. + */ +#define TABLE_FIELD_ID_CSUM_OP 0x410 +/* enum: Byte offset of checksum relative to region_start (for VALIDATE_* + * operations only). + */ +#define TABLE_FIELD_ID_CSUM_OFFSET 0x411 +/* enum: Indicates there is additional data on OPR bus that needs to be + * incorporated into the payload checksum. + */ +#define TABLE_FIELD_ID_CSUM_OPR_ADDITIONAL_DATA 0x412 +/* enum: Log2 data size of additional data on OPR bus. */ +#define TABLE_FIELD_ID_CSUM_OPR_DATA_SIZE_LOG2 0x413 +/* enum: 4 byte offset of where to find the additional data on the OPR bus. */ +#define TABLE_FIELD_ID_CSUM_OPR_4B_OFF 0x414 +/* enum: Operation type for the AES-GCM core - see GCM_OP_CODE enum. */ +#define TABLE_FIELD_ID_GCM_OP_CODE 0x41a +/* enum: Key length - AES_KEY_LEN enum. */ +#define TABLE_FIELD_ID_GCM_KEY_LEN 0x41b +/* enum: OPR 4 byte offset for ICV or GHASH output (only in BULK_* mode) or + * IPSEC descrypt output. + */ +#define TABLE_FIELD_ID_GCM_OPR_4B_OFFSET 0x41c +/* enum: If OP_CODE is BULK_*, indicates Emit GHASH (Fragment mode). Else, + * indicates IPSEC-ESN mode. + */ +#define TABLE_FIELD_ID_GCM_EMIT_GHASH_ISESN 0x41d +/* enum: Replay Protection Enable. */ +#define TABLE_FIELD_ID_GCM_REPLAY_PROTECT_EN 0x41e +/* enum: IPSEC Encrypt ESP trailer NEXT_HEADER byte. */ +#define TABLE_FIELD_ID_GCM_NEXT_HDR 0x41f +/* enum: Replay Window Size. */ +#define TABLE_FIELD_ID_GCM_REPLAY_WIN_SIZE 0x420 /* MCDI_EVENT structuredef: The structure of an MCDI_EVENT on Siena/EF10/EF100 * platforms @@ -819,7 +1434,7 @@ #define MCDI_EVENT_AOE_FPGA_LOAD_FAILED 0xe /* enum: Notify that invalid flash type detected */ #define MCDI_EVENT_AOE_INVALID_FPGA_FLASH_TYPE 0xf -/* enum: Notify that the attempt to run FPGA Controller firmware timedout */ +/* enum: Notify that the attempt to run FPGA Controller firmware timed out */ #define MCDI_EVENT_AOE_FC_RUN_TIMEDOUT 0x10 /* enum: Failure to probe one or more FPGA boot flash chips */ #define MCDI_EVENT_AOE_FPGA_BOOT_FLASH_INVALID 0x11 @@ -837,7 +1452,7 @@ #define MCDI_EVENT_AOE_ERR_FC_ASSERT_INFO_WIDTH 8 /* enum: FC Assert happened, but the register information is not available */ #define MCDI_EVENT_AOE_ERR_FC_ASSERT_SEEN 0x0 -/* enum: The register information for FC Assert is ready for readinng by driver +/* enum: The register information for FC Assert is ready for reading by driver */ #define MCDI_EVENT_AOE_ERR_FC_ASSERT_DATA_READY 0x1 #define MCDI_EVENT_AOE_ERR_CODE_FPGA_HEADER_VERIFY_FAILED_OFST 0 @@ -946,6 +1561,12 @@ #define MCDI_EVENT_MODULECHANGE_SEQ_OFST 0 #define MCDI_EVENT_MODULECHANGE_SEQ_LBN 30 #define MCDI_EVENT_MODULECHANGE_SEQ_WIDTH 2 +#define MCDI_EVENT_DESC_PROXY_VIRTQ_VI_ID_OFST 0 +#define MCDI_EVENT_DESC_PROXY_VIRTQ_VI_ID_LBN 0 +#define MCDI_EVENT_DESC_PROXY_VIRTQ_VI_ID_WIDTH 16 +#define MCDI_EVENT_DESC_PROXY_VIRTQ_ID_OFST 0 +#define MCDI_EVENT_DESC_PROXY_VIRTQ_ID_LBN 16 +#define MCDI_EVENT_DESC_PROXY_VIRTQ_ID_WIDTH 16 #define MCDI_EVENT_DATA_LBN 0 #define MCDI_EVENT_DATA_WIDTH 32 /* Alias for PTP_DATA. */ @@ -1076,6 +1697,18 @@ * SF-122927-TC for details. */ #define MCDI_EVENT_CODE_DESC_PROXY_FUNC_DRIVER_ATTACH 0x26 +/* enum: Notification that the mport journal has changed since it was last read + * and updates can be read using the MC_CMD_MAE_MPORT_READ_JOURNAL command. The + * firmware may moderate the events so that an event is not sent for every + * change to the journal. + */ +#define MCDI_EVENT_CODE_MPORT_JOURNAL_CHANGE 0x27 +/* enum: Notification that a source queue is enabled and attached to its proxy + * sink queue. SRC field contains the handle of the affected descriptor proxy + * function. DATA field contains the relative source queue number and absolute + * VI ID. + */ +#define MCDI_EVENT_CODE_DESC_PROXY_FUNC_QUEUE_START 0x28 /* enum: Artificial event generated by host and posted via MC for test * purposes. */ @@ -1842,6 +2475,7 @@ /* Log destination */ #define MC_CMD_LOG_CTRL_IN_LOG_DEST_OFST 0 #define MC_CMD_LOG_CTRL_IN_LOG_DEST_LEN 4 +/* enum property: bitmask */ /* enum: UART. */ #define MC_CMD_LOG_CTRL_IN_LOG_DEST_UART 0x1 /* enum: Event queue. */ @@ -1888,6 +2522,9 @@ /* MC_CMD_GET_VERSION_OUT msgresponse */ #define MC_CMD_GET_VERSION_OUT_LEN 32 +/* This is normally the UTC build time in seconds since epoch or one of the + * special values listed + */ /* MC_CMD_GET_VERSION_OUT_FIRMWARE_OFST 0 */ /* MC_CMD_GET_VERSION_OUT_FIRMWARE_LEN 4 */ /* Enum values, see field(s): */ @@ -1910,6 +2547,9 @@ /* MC_CMD_GET_VERSION_EXT_OUT msgresponse */ #define MC_CMD_GET_VERSION_EXT_OUT_LEN 48 +/* This is normally the UTC build time in seconds since epoch or one of the + * special values listed + */ /* MC_CMD_GET_VERSION_OUT_FIRMWARE_OFST 0 */ /* MC_CMD_GET_VERSION_OUT_FIRMWARE_LEN 4 */ /* Enum values, see field(s): */ @@ -1940,6 +2580,9 @@ * (depending on which components exist on a particular adapter) */ #define MC_CMD_GET_VERSION_V2_OUT_LEN 304 +/* This is normally the UTC build time in seconds since epoch or one of the + * special values listed + */ /* MC_CMD_GET_VERSION_OUT_FIRMWARE_OFST 0 */ /* MC_CMD_GET_VERSION_OUT_FIRMWARE_LEN 4 */ /* Enum values, see field(s): */ @@ -2079,6 +2722,9 @@ * (depending on which components exist on a particular adapter) */ #define MC_CMD_GET_VERSION_V3_OUT_LEN 328 +/* This is normally the UTC build time in seconds since epoch or one of the + * special values listed + */ /* MC_CMD_GET_VERSION_OUT_FIRMWARE_OFST 0 */ /* MC_CMD_GET_VERSION_OUT_FIRMWARE_LEN 4 */ /* Enum values, see field(s): */ @@ -2225,6 +2871,9 @@ * version information */ #define MC_CMD_GET_VERSION_V4_OUT_LEN 392 +/* This is normally the UTC build time in seconds since epoch or one of the + * special values listed + */ /* MC_CMD_GET_VERSION_OUT_FIRMWARE_OFST 0 */ /* MC_CMD_GET_VERSION_OUT_FIRMWARE_LEN 4 */ /* Enum values, see field(s): */ @@ -2387,6 +3036,9 @@ * and board version information */ #define MC_CMD_GET_VERSION_V5_OUT_LEN 424 +/* This is normally the UTC build time in seconds since epoch or one of the + * special values listed + */ /* MC_CMD_GET_VERSION_OUT_FIRMWARE_OFST 0 */ /* MC_CMD_GET_VERSION_OUT_FIRMWARE_LEN 4 */ /* Enum values, see field(s): */ @@ -2659,7 +3311,9 @@ #define MC_CMD_PTP_IN_CMD_LEN 4 #define MC_CMD_PTP_IN_PERIPH_ID_OFST 4 #define MC_CMD_PTP_IN_PERIPH_ID_LEN 4 -/* Not used. Events are always sent to function relative queue 0. */ +/* Not used, initialize to 0. Events are always sent to function relative queue + * 0. + */ #define MC_CMD_PTP_IN_ENABLE_QUEUE_OFST 8 #define MC_CMD_PTP_IN_ENABLE_QUEUE_LEN 4 /* PTP timestamping mode. Not used from Huntington onwards. */ @@ -3030,7 +3684,9 @@ #define MC_CMD_PTP_ENABLE_PPS 0x0 /* enum: Disable */ #define MC_CMD_PTP_DISABLE_PPS 0x1 -/* Not used. Events are always sent to function relative queue 0. */ +/* Not used, initialize to 0. Events are always sent to function relative queue + * 0. + */ #define MC_CMD_PTP_IN_PPS_ENABLE_QUEUE_ID_OFST 8 #define MC_CMD_PTP_IN_PPS_ENABLE_QUEUE_ID_LEN 4 @@ -3392,6 +4048,87 @@ #define MC_CMD_PTP_OUT_GET_ATTRIBUTES_RESERVED2_OFST 20 #define MC_CMD_PTP_OUT_GET_ATTRIBUTES_RESERVED2_LEN 4 +/* MC_CMD_PTP_OUT_GET_ATTRIBUTES_V2 msgresponse */ +#define MC_CMD_PTP_OUT_GET_ATTRIBUTES_V2_LEN 40 +/* Time format required/used by for this NIC. Applies to all PTP MCDI + * operations that pass times between the host and firmware. If this operation + * is not supported (older firmware) a format of seconds and nanoseconds should + * be assumed. + */ +#define MC_CMD_PTP_OUT_GET_ATTRIBUTES_V2_TIME_FORMAT_OFST 0 +#define MC_CMD_PTP_OUT_GET_ATTRIBUTES_V2_TIME_FORMAT_LEN 4 +/* enum: Times are in seconds and nanoseconds */ +#define MC_CMD_PTP_OUT_GET_ATTRIBUTES_V2_SECONDS_NANOSECONDS 0x0 +/* enum: Major register has units of 16 second per tick, minor 8 ns per tick */ +#define MC_CMD_PTP_OUT_GET_ATTRIBUTES_V2_16SECONDS_8NANOSECONDS 0x1 +/* enum: Major register has units of seconds, minor 2^-27s per tick */ +#define MC_CMD_PTP_OUT_GET_ATTRIBUTES_V2_SECONDS_27FRACTION 0x2 +/* enum: Major register units are seconds, minor units are quarter nanoseconds + */ +#define MC_CMD_PTP_OUT_GET_ATTRIBUTES_V2_SECONDS_QTR_NANOSECONDS 0x3 +/* Minimum acceptable value for a corrected synchronization timeset. When + * comparing host and NIC clock times, the MC returns a set of samples that + * contain the host start and end time, the MC time when the host start was + * detected and the time the MC waited between reading the time and detecting + * the host end. The corrected sync window is the difference between the host + * end and start times minus the time that the MC waited for host end. + */ +#define MC_CMD_PTP_OUT_GET_ATTRIBUTES_V2_SYNC_WINDOW_MIN_OFST 4 +#define MC_CMD_PTP_OUT_GET_ATTRIBUTES_V2_SYNC_WINDOW_MIN_LEN 4 +/* Various PTP capabilities */ +#define MC_CMD_PTP_OUT_GET_ATTRIBUTES_V2_CAPABILITIES_OFST 8 +#define MC_CMD_PTP_OUT_GET_ATTRIBUTES_V2_CAPABILITIES_LEN 4 +#define MC_CMD_PTP_OUT_GET_ATTRIBUTES_V2_REPORT_SYNC_STATUS_OFST 8 +#define MC_CMD_PTP_OUT_GET_ATTRIBUTES_V2_REPORT_SYNC_STATUS_LBN 0 +#define MC_CMD_PTP_OUT_GET_ATTRIBUTES_V2_REPORT_SYNC_STATUS_WIDTH 1 +#define MC_CMD_PTP_OUT_GET_ATTRIBUTES_V2_RX_TSTAMP_OOB_OFST 8 +#define MC_CMD_PTP_OUT_GET_ATTRIBUTES_V2_RX_TSTAMP_OOB_LBN 1 +#define MC_CMD_PTP_OUT_GET_ATTRIBUTES_V2_RX_TSTAMP_OOB_WIDTH 1 +#define MC_CMD_PTP_OUT_GET_ATTRIBUTES_V2_64BIT_SECONDS_OFST 8 +#define MC_CMD_PTP_OUT_GET_ATTRIBUTES_V2_64BIT_SECONDS_LBN 2 +#define MC_CMD_PTP_OUT_GET_ATTRIBUTES_V2_64BIT_SECONDS_WIDTH 1 +#define MC_CMD_PTP_OUT_GET_ATTRIBUTES_V2_FP44_FREQ_ADJ_OFST 8 +#define MC_CMD_PTP_OUT_GET_ATTRIBUTES_V2_FP44_FREQ_ADJ_LBN 3 +#define MC_CMD_PTP_OUT_GET_ATTRIBUTES_V2_FP44_FREQ_ADJ_WIDTH 1 +#define MC_CMD_PTP_OUT_GET_ATTRIBUTES_V2_RESERVED0_OFST 12 +#define MC_CMD_PTP_OUT_GET_ATTRIBUTES_V2_RESERVED0_LEN 4 +#define MC_CMD_PTP_OUT_GET_ATTRIBUTES_V2_RESERVED1_OFST 16 +#define MC_CMD_PTP_OUT_GET_ATTRIBUTES_V2_RESERVED1_LEN 4 +#define MC_CMD_PTP_OUT_GET_ATTRIBUTES_V2_RESERVED2_OFST 20 +#define MC_CMD_PTP_OUT_GET_ATTRIBUTES_V2_RESERVED2_LEN 4 +/* Minimum supported value for the FREQ field in + * MC_CMD_PTP/MC_CMD_PTP_IN_ADJUST and + * MC_CMD_PTP/MC_CMD_PTP_IN_CLOCK_FREQ_ADJUST message requests. If this message + * response is not supported a value of -0.1 ns should be assumed, which is + * equivalent to a -10% adjustment. + */ +#define MC_CMD_PTP_OUT_GET_ATTRIBUTES_V2_FREQ_ADJ_MIN_OFST 24 +#define MC_CMD_PTP_OUT_GET_ATTRIBUTES_V2_FREQ_ADJ_MIN_LEN 8 +#define MC_CMD_PTP_OUT_GET_ATTRIBUTES_V2_FREQ_ADJ_MIN_LO_OFST 24 +#define MC_CMD_PTP_OUT_GET_ATTRIBUTES_V2_FREQ_ADJ_MIN_LO_LEN 4 +#define MC_CMD_PTP_OUT_GET_ATTRIBUTES_V2_FREQ_ADJ_MIN_LO_LBN 192 +#define MC_CMD_PTP_OUT_GET_ATTRIBUTES_V2_FREQ_ADJ_MIN_LO_WIDTH 32 +#define MC_CMD_PTP_OUT_GET_ATTRIBUTES_V2_FREQ_ADJ_MIN_HI_OFST 28 +#define MC_CMD_PTP_OUT_GET_ATTRIBUTES_V2_FREQ_ADJ_MIN_HI_LEN 4 +#define MC_CMD_PTP_OUT_GET_ATTRIBUTES_V2_FREQ_ADJ_MIN_HI_LBN 224 +#define MC_CMD_PTP_OUT_GET_ATTRIBUTES_V2_FREQ_ADJ_MIN_HI_WIDTH 32 +/* Maximum supported value for the FREQ field in + * MC_CMD_PTP/MC_CMD_PTP_IN_ADJUST and + * MC_CMD_PTP/MC_CMD_PTP_IN_CLOCK_FREQ_ADJUST message requests. If this message + * response is not supported a value of 0.1 ns should be assumed, which is + * equivalent to a +10% adjustment. + */ +#define MC_CMD_PTP_OUT_GET_ATTRIBUTES_V2_FREQ_ADJ_MAX_OFST 32 +#define MC_CMD_PTP_OUT_GET_ATTRIBUTES_V2_FREQ_ADJ_MAX_LEN 8 +#define MC_CMD_PTP_OUT_GET_ATTRIBUTES_V2_FREQ_ADJ_MAX_LO_OFST 32 +#define MC_CMD_PTP_OUT_GET_ATTRIBUTES_V2_FREQ_ADJ_MAX_LO_LEN 4 +#define MC_CMD_PTP_OUT_GET_ATTRIBUTES_V2_FREQ_ADJ_MAX_LO_LBN 256 +#define MC_CMD_PTP_OUT_GET_ATTRIBUTES_V2_FREQ_ADJ_MAX_LO_WIDTH 32 +#define MC_CMD_PTP_OUT_GET_ATTRIBUTES_V2_FREQ_ADJ_MAX_HI_OFST 36 +#define MC_CMD_PTP_OUT_GET_ATTRIBUTES_V2_FREQ_ADJ_MAX_HI_LEN 4 +#define MC_CMD_PTP_OUT_GET_ATTRIBUTES_V2_FREQ_ADJ_MAX_HI_LBN 288 +#define MC_CMD_PTP_OUT_GET_ATTRIBUTES_V2_FREQ_ADJ_MAX_HI_WIDTH 32 + /* MC_CMD_PTP_OUT_GET_TIMESTAMP_CORRECTIONS msgresponse */ #define MC_CMD_PTP_OUT_GET_TIMESTAMP_CORRECTIONS_LEN 16 /* Uncorrected error on PTP transmit timestamps in NIC clock format */ @@ -3443,12 +4180,16 @@ /***********************************/ /* MC_CMD_CSR_READ32 * Read 32bit words from the indirect memory map. + * + * Note - this command originally belonged to INSECURE category. But access is + * required to specific registers for customer diagnostics. The command handler + * has additional checks to reject insecure calls. */ #define MC_CMD_CSR_READ32 0xc #define MC_CMD_CSR_READ32_MSGSET 0xc #undef MC_CMD_0xc_PRIVILEGE_CTG -#define MC_CMD_0xc_PRIVILEGE_CTG SRIOV_CTG_INSECURE +#define MC_CMD_0xc_PRIVILEGE_CTG SRIOV_CTG_ADMIN /* MC_CMD_CSR_READ32_IN msgrequest */ #define MC_CMD_CSR_READ32_IN_LEN 12 @@ -4221,6 +4962,7 @@ /* Flags associated with this function */ #define MC_CMD_DRV_ATTACH_EXT_OUT_FUNC_FLAGS_OFST 4 #define MC_CMD_DRV_ATTACH_EXT_OUT_FUNC_FLAGS_LEN 4 +/* enum property: bitshift */ /* enum: Labels the lowest-numbered function visible to the OS */ #define MC_CMD_DRV_ATTACH_EXT_OUT_FLAG_PRIMARY 0x0 /* enum: The function can control the link state of the physical port it is @@ -4454,6 +5196,54 @@ /* MC_CMD_GET_PHY_CFG_IN msgrequest */ #define MC_CMD_GET_PHY_CFG_IN_LEN 0 +/* MC_CMD_GET_PHY_CFG_IN_V2 msgrequest */ +#define MC_CMD_GET_PHY_CFG_IN_V2_LEN 8 +/* Target port to request PHY state for. Uses MAE_LINK_ENDPOINT_SELECTOR which + * identifies a real or virtual network port by MAE port and link end. See the + * structure definition for more details + */ +#define MC_CMD_GET_PHY_CFG_IN_V2_TARGET_OFST 0 +#define MC_CMD_GET_PHY_CFG_IN_V2_TARGET_LEN 8 +#define MC_CMD_GET_PHY_CFG_IN_V2_TARGET_LO_OFST 0 +#define MC_CMD_GET_PHY_CFG_IN_V2_TARGET_LO_LEN 4 +#define MC_CMD_GET_PHY_CFG_IN_V2_TARGET_LO_LBN 0 +#define MC_CMD_GET_PHY_CFG_IN_V2_TARGET_LO_WIDTH 32 +#define MC_CMD_GET_PHY_CFG_IN_V2_TARGET_HI_OFST 4 +#define MC_CMD_GET_PHY_CFG_IN_V2_TARGET_HI_LEN 4 +#define MC_CMD_GET_PHY_CFG_IN_V2_TARGET_HI_LBN 32 +#define MC_CMD_GET_PHY_CFG_IN_V2_TARGET_HI_WIDTH 32 +/* See structuredef: MAE_LINK_ENDPOINT_SELECTOR */ +#define MC_CMD_GET_PHY_CFG_IN_V2_TARGET_MPORT_SELECTOR_OFST 0 +#define MC_CMD_GET_PHY_CFG_IN_V2_TARGET_MPORT_SELECTOR_LEN 4 +#define MC_CMD_GET_PHY_CFG_IN_V2_TARGET_MPORT_SELECTOR_FLAT_OFST 0 +#define MC_CMD_GET_PHY_CFG_IN_V2_TARGET_MPORT_SELECTOR_FLAT_LEN 4 +#define MC_CMD_GET_PHY_CFG_IN_V2_TARGET_MPORT_SELECTOR_TYPE_OFST 3 +#define MC_CMD_GET_PHY_CFG_IN_V2_TARGET_MPORT_SELECTOR_TYPE_LEN 1 +#define MC_CMD_GET_PHY_CFG_IN_V2_TARGET_MPORT_SELECTOR_MPORT_ID_OFST 0 +#define MC_CMD_GET_PHY_CFG_IN_V2_TARGET_MPORT_SELECTOR_MPORT_ID_LEN 3 +#define MC_CMD_GET_PHY_CFG_IN_V2_TARGET_MPORT_SELECTOR_PPORT_ID_LBN 0 +#define MC_CMD_GET_PHY_CFG_IN_V2_TARGET_MPORT_SELECTOR_PPORT_ID_WIDTH 4 +#define MC_CMD_GET_PHY_CFG_IN_V2_TARGET_MPORT_SELECTOR_FUNC_INTF_ID_LBN 20 +#define MC_CMD_GET_PHY_CFG_IN_V2_TARGET_MPORT_SELECTOR_FUNC_INTF_ID_WIDTH 4 +#define MC_CMD_GET_PHY_CFG_IN_V2_TARGET_MPORT_SELECTOR_FUNC_MH_PF_ID_LBN 16 +#define MC_CMD_GET_PHY_CFG_IN_V2_TARGET_MPORT_SELECTOR_FUNC_MH_PF_ID_WIDTH 4 +#define MC_CMD_GET_PHY_CFG_IN_V2_TARGET_MPORT_SELECTOR_FUNC_PF_ID_OFST 2 +#define MC_CMD_GET_PHY_CFG_IN_V2_TARGET_MPORT_SELECTOR_FUNC_PF_ID_LEN 1 +#define MC_CMD_GET_PHY_CFG_IN_V2_TARGET_MPORT_SELECTOR_FUNC_VF_ID_OFST 0 +#define MC_CMD_GET_PHY_CFG_IN_V2_TARGET_MPORT_SELECTOR_FUNC_VF_ID_LEN 2 +#define MC_CMD_GET_PHY_CFG_IN_V2_TARGET_LINK_END_OFST 4 +#define MC_CMD_GET_PHY_CFG_IN_V2_TARGET_LINK_END_LEN 4 +#define MC_CMD_GET_PHY_CFG_IN_V2_TARGET_FLAT_OFST 0 +#define MC_CMD_GET_PHY_CFG_IN_V2_TARGET_FLAT_LEN 8 +#define MC_CMD_GET_PHY_CFG_IN_V2_TARGET_FLAT_LO_OFST 0 +#define MC_CMD_GET_PHY_CFG_IN_V2_TARGET_FLAT_LO_LEN 4 +#define MC_CMD_GET_PHY_CFG_IN_V2_TARGET_FLAT_LO_LBN 0 +#define MC_CMD_GET_PHY_CFG_IN_V2_TARGET_FLAT_LO_WIDTH 32 +#define MC_CMD_GET_PHY_CFG_IN_V2_TARGET_FLAT_HI_OFST 4 +#define MC_CMD_GET_PHY_CFG_IN_V2_TARGET_FLAT_HI_LEN 4 +#define MC_CMD_GET_PHY_CFG_IN_V2_TARGET_FLAT_HI_LBN 32 +#define MC_CMD_GET_PHY_CFG_IN_V2_TARGET_FLAT_HI_WIDTH 32 + /* MC_CMD_GET_PHY_CFG_OUT msgresponse */ #define MC_CMD_GET_PHY_CFG_OUT_LEN 72 /* flags */ @@ -4549,6 +5339,9 @@ #define MC_CMD_PHY_CAP_25G_BASER_FEC_REQUESTED_OFST 8 #define MC_CMD_PHY_CAP_25G_BASER_FEC_REQUESTED_LBN 21 #define MC_CMD_PHY_CAP_25G_BASER_FEC_REQUESTED_WIDTH 1 +#define MC_CMD_PHY_CAP_200000FDX_OFST 8 +#define MC_CMD_PHY_CAP_200000FDX_LBN 22 +#define MC_CMD_PHY_CAP_200000FDX_WIDTH 1 /* ?? */ #define MC_CMD_GET_PHY_CFG_OUT_CHANNEL_OFST 12 #define MC_CMD_GET_PHY_CFG_OUT_CHANNEL_LEN 4 @@ -4582,6 +5375,7 @@ #define MC_CMD_MEDIA_DSFP 0x8 #define MC_CMD_GET_PHY_CFG_OUT_MMD_MASK_OFST 48 #define MC_CMD_GET_PHY_CFG_OUT_MMD_MASK_LEN 4 +/* enum property: bitshift */ /* enum: Native clause 22 */ #define MC_CMD_MMD_CLAUSE22 0x0 #define MC_CMD_MMD_CLAUSE45_PMAPMD 0x1 /* enum */ @@ -4847,6 +5641,54 @@ /* MC_CMD_GET_LOOPBACK_MODES_IN msgrequest */ #define MC_CMD_GET_LOOPBACK_MODES_IN_LEN 0 +/* MC_CMD_GET_LOOPBACK_MODES_IN_V2 msgrequest */ +#define MC_CMD_GET_LOOPBACK_MODES_IN_V2_LEN 8 +/* Target port to request loopback modes for. Uses MAE_LINK_ENDPOINT_SELECTOR + * which identifies a real or virtual network port by MAE port and link end. + * See the structure definition for more details + */ +#define MC_CMD_GET_LOOPBACK_MODES_IN_V2_TARGET_OFST 0 +#define MC_CMD_GET_LOOPBACK_MODES_IN_V2_TARGET_LEN 8 +#define MC_CMD_GET_LOOPBACK_MODES_IN_V2_TARGET_LO_OFST 0 +#define MC_CMD_GET_LOOPBACK_MODES_IN_V2_TARGET_LO_LEN 4 +#define MC_CMD_GET_LOOPBACK_MODES_IN_V2_TARGET_LO_LBN 0 +#define MC_CMD_GET_LOOPBACK_MODES_IN_V2_TARGET_LO_WIDTH 32 +#define MC_CMD_GET_LOOPBACK_MODES_IN_V2_TARGET_HI_OFST 4 +#define MC_CMD_GET_LOOPBACK_MODES_IN_V2_TARGET_HI_LEN 4 +#define MC_CMD_GET_LOOPBACK_MODES_IN_V2_TARGET_HI_LBN 32 +#define MC_CMD_GET_LOOPBACK_MODES_IN_V2_TARGET_HI_WIDTH 32 +/* See structuredef: MAE_LINK_ENDPOINT_SELECTOR */ +#define MC_CMD_GET_LOOPBACK_MODES_IN_V2_TARGET_MPORT_SELECTOR_OFST 0 +#define MC_CMD_GET_LOOPBACK_MODES_IN_V2_TARGET_MPORT_SELECTOR_LEN 4 +#define MC_CMD_GET_LOOPBACK_MODES_IN_V2_TARGET_MPORT_SELECTOR_FLAT_OFST 0 +#define MC_CMD_GET_LOOPBACK_MODES_IN_V2_TARGET_MPORT_SELECTOR_FLAT_LEN 4 +#define MC_CMD_GET_LOOPBACK_MODES_IN_V2_TARGET_MPORT_SELECTOR_TYPE_OFST 3 +#define MC_CMD_GET_LOOPBACK_MODES_IN_V2_TARGET_MPORT_SELECTOR_TYPE_LEN 1 +#define MC_CMD_GET_LOOPBACK_MODES_IN_V2_TARGET_MPORT_SELECTOR_MPORT_ID_OFST 0 +#define MC_CMD_GET_LOOPBACK_MODES_IN_V2_TARGET_MPORT_SELECTOR_MPORT_ID_LEN 3 +#define MC_CMD_GET_LOOPBACK_MODES_IN_V2_TARGET_MPORT_SELECTOR_PPORT_ID_LBN 0 +#define MC_CMD_GET_LOOPBACK_MODES_IN_V2_TARGET_MPORT_SELECTOR_PPORT_ID_WIDTH 4 +#define MC_CMD_GET_LOOPBACK_MODES_IN_V2_TARGET_MPORT_SELECTOR_FUNC_INTF_ID_LBN 20 +#define MC_CMD_GET_LOOPBACK_MODES_IN_V2_TARGET_MPORT_SELECTOR_FUNC_INTF_ID_WIDTH 4 +#define MC_CMD_GET_LOOPBACK_MODES_IN_V2_TARGET_MPORT_SELECTOR_FUNC_MH_PF_ID_LBN 16 +#define MC_CMD_GET_LOOPBACK_MODES_IN_V2_TARGET_MPORT_SELECTOR_FUNC_MH_PF_ID_WIDTH 4 +#define MC_CMD_GET_LOOPBACK_MODES_IN_V2_TARGET_MPORT_SELECTOR_FUNC_PF_ID_OFST 2 +#define MC_CMD_GET_LOOPBACK_MODES_IN_V2_TARGET_MPORT_SELECTOR_FUNC_PF_ID_LEN 1 +#define MC_CMD_GET_LOOPBACK_MODES_IN_V2_TARGET_MPORT_SELECTOR_FUNC_VF_ID_OFST 0 +#define MC_CMD_GET_LOOPBACK_MODES_IN_V2_TARGET_MPORT_SELECTOR_FUNC_VF_ID_LEN 2 +#define MC_CMD_GET_LOOPBACK_MODES_IN_V2_TARGET_LINK_END_OFST 4 +#define MC_CMD_GET_LOOPBACK_MODES_IN_V2_TARGET_LINK_END_LEN 4 +#define MC_CMD_GET_LOOPBACK_MODES_IN_V2_TARGET_FLAT_OFST 0 +#define MC_CMD_GET_LOOPBACK_MODES_IN_V2_TARGET_FLAT_LEN 8 +#define MC_CMD_GET_LOOPBACK_MODES_IN_V2_TARGET_FLAT_LO_OFST 0 +#define MC_CMD_GET_LOOPBACK_MODES_IN_V2_TARGET_FLAT_LO_LEN 4 +#define MC_CMD_GET_LOOPBACK_MODES_IN_V2_TARGET_FLAT_LO_LBN 0 +#define MC_CMD_GET_LOOPBACK_MODES_IN_V2_TARGET_FLAT_LO_WIDTH 32 +#define MC_CMD_GET_LOOPBACK_MODES_IN_V2_TARGET_FLAT_HI_OFST 4 +#define MC_CMD_GET_LOOPBACK_MODES_IN_V2_TARGET_FLAT_HI_LEN 4 +#define MC_CMD_GET_LOOPBACK_MODES_IN_V2_TARGET_FLAT_HI_LBN 32 +#define MC_CMD_GET_LOOPBACK_MODES_IN_V2_TARGET_FLAT_HI_WIDTH 32 + /* MC_CMD_GET_LOOPBACK_MODES_OUT msgresponse */ #define MC_CMD_GET_LOOPBACK_MODES_OUT_LEN 40 /* Supported loopbacks. */ @@ -4860,6 +5702,7 @@ #define MC_CMD_GET_LOOPBACK_MODES_OUT_100M_HI_LEN 4 #define MC_CMD_GET_LOOPBACK_MODES_OUT_100M_HI_LBN 32 #define MC_CMD_GET_LOOPBACK_MODES_OUT_100M_HI_WIDTH 32 +/* enum property: bitshift */ /* enum: None. */ #define MC_CMD_LOOPBACK_NONE 0x0 /* enum: Data. */ @@ -4949,6 +5792,7 @@ #define MC_CMD_GET_LOOPBACK_MODES_OUT_1G_HI_LEN 4 #define MC_CMD_GET_LOOPBACK_MODES_OUT_1G_HI_LBN 96 #define MC_CMD_GET_LOOPBACK_MODES_OUT_1G_HI_WIDTH 32 +/* enum property: bitshift */ /* Enum values, see field(s): */ /* 100M */ /* Supported loopbacks. */ @@ -4962,6 +5806,7 @@ #define MC_CMD_GET_LOOPBACK_MODES_OUT_10G_HI_LEN 4 #define MC_CMD_GET_LOOPBACK_MODES_OUT_10G_HI_LBN 160 #define MC_CMD_GET_LOOPBACK_MODES_OUT_10G_HI_WIDTH 32 +/* enum property: bitshift */ /* Enum values, see field(s): */ /* 100M */ /* Supported loopbacks. */ @@ -4975,6 +5820,7 @@ #define MC_CMD_GET_LOOPBACK_MODES_OUT_SUGGESTED_HI_LEN 4 #define MC_CMD_GET_LOOPBACK_MODES_OUT_SUGGESTED_HI_LBN 224 #define MC_CMD_GET_LOOPBACK_MODES_OUT_SUGGESTED_HI_WIDTH 32 +/* enum property: bitshift */ /* Enum values, see field(s): */ /* 100M */ /* Supported loopbacks. */ @@ -4988,6 +5834,7 @@ #define MC_CMD_GET_LOOPBACK_MODES_OUT_40G_HI_LEN 4 #define MC_CMD_GET_LOOPBACK_MODES_OUT_40G_HI_LBN 288 #define MC_CMD_GET_LOOPBACK_MODES_OUT_40G_HI_WIDTH 32 +/* enum property: bitshift */ /* Enum values, see field(s): */ /* 100M */ @@ -5006,6 +5853,7 @@ #define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_100M_HI_LEN 4 #define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_100M_HI_LBN 32 #define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_100M_HI_WIDTH 32 +/* enum property: bitshift */ /* enum: None. */ /* MC_CMD_LOOPBACK_NONE 0x0 */ /* enum: Data. */ @@ -5095,6 +5943,7 @@ #define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_1G_HI_LEN 4 #define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_1G_HI_LBN 96 #define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_1G_HI_WIDTH 32 +/* enum property: bitshift */ /* Enum values, see field(s): */ /* 100M */ /* Supported loopbacks. */ @@ -5108,6 +5957,7 @@ #define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_10G_HI_LEN 4 #define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_10G_HI_LBN 160 #define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_10G_HI_WIDTH 32 +/* enum property: bitshift */ /* Enum values, see field(s): */ /* 100M */ /* Supported loopbacks. */ @@ -5121,6 +5971,7 @@ #define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_SUGGESTED_HI_LEN 4 #define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_SUGGESTED_HI_LBN 224 #define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_SUGGESTED_HI_WIDTH 32 +/* enum property: bitshift */ /* Enum values, see field(s): */ /* 100M */ /* Supported loopbacks. */ @@ -5134,6 +5985,7 @@ #define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_40G_HI_LEN 4 #define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_40G_HI_LBN 288 #define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_40G_HI_WIDTH 32 +/* enum property: bitshift */ /* Enum values, see field(s): */ /* 100M */ /* Supported 25G loopbacks. */ @@ -5147,6 +5999,7 @@ #define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_25G_HI_LEN 4 #define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_25G_HI_LBN 352 #define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_25G_HI_WIDTH 32 +/* enum property: bitshift */ /* Enum values, see field(s): */ /* 100M */ /* Supported 50 loopbacks. */ @@ -5160,6 +6013,7 @@ #define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_50G_HI_LEN 4 #define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_50G_HI_LBN 416 #define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_50G_HI_WIDTH 32 +/* enum property: bitshift */ /* Enum values, see field(s): */ /* 100M */ /* Supported 100G loopbacks. */ @@ -5173,6 +6027,214 @@ #define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_100G_HI_LEN 4 #define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_100G_HI_LBN 480 #define MC_CMD_GET_LOOPBACK_MODES_OUT_V2_100G_HI_WIDTH 32 +/* enum property: bitshift */ +/* Enum values, see field(s): */ +/* 100M */ + +/* MC_CMD_GET_LOOPBACK_MODES_OUT_V3 msgresponse: Supported loopback modes for + * newer NICs with 200G support + */ +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_LEN 72 +/* Supported loopbacks. */ +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_100M_OFST 0 +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_100M_LEN 8 +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_100M_LO_OFST 0 +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_100M_LO_LEN 4 +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_100M_LO_LBN 0 +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_100M_LO_WIDTH 32 +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_100M_HI_OFST 4 +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_100M_HI_LEN 4 +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_100M_HI_LBN 32 +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_100M_HI_WIDTH 32 +/* enum property: bitshift */ +/* enum: None. */ +/* MC_CMD_LOOPBACK_NONE 0x0 */ +/* enum: Data. */ +/* MC_CMD_LOOPBACK_DATA 0x1 */ +/* enum: GMAC. */ +/* MC_CMD_LOOPBACK_GMAC 0x2 */ +/* enum: XGMII. */ +/* MC_CMD_LOOPBACK_XGMII 0x3 */ +/* enum: XGXS. */ +/* MC_CMD_LOOPBACK_XGXS 0x4 */ +/* enum: XAUI. */ +/* MC_CMD_LOOPBACK_XAUI 0x5 */ +/* enum: GMII. */ +/* MC_CMD_LOOPBACK_GMII 0x6 */ +/* enum: SGMII. */ +/* MC_CMD_LOOPBACK_SGMII 0x7 */ +/* enum: XGBR. */ +/* MC_CMD_LOOPBACK_XGBR 0x8 */ +/* enum: XFI. */ +/* MC_CMD_LOOPBACK_XFI 0x9 */ +/* enum: XAUI Far. */ +/* MC_CMD_LOOPBACK_XAUI_FAR 0xa */ +/* enum: GMII Far. */ +/* MC_CMD_LOOPBACK_GMII_FAR 0xb */ +/* enum: SGMII Far. */ +/* MC_CMD_LOOPBACK_SGMII_FAR 0xc */ +/* enum: XFI Far. */ +/* MC_CMD_LOOPBACK_XFI_FAR 0xd */ +/* enum: GPhy. */ +/* MC_CMD_LOOPBACK_GPHY 0xe */ +/* enum: PhyXS. */ +/* MC_CMD_LOOPBACK_PHYXS 0xf */ +/* enum: PCS. */ +/* MC_CMD_LOOPBACK_PCS 0x10 */ +/* enum: PMA-PMD. */ +/* MC_CMD_LOOPBACK_PMAPMD 0x11 */ +/* enum: Cross-Port. */ +/* MC_CMD_LOOPBACK_XPORT 0x12 */ +/* enum: XGMII-Wireside. */ +/* MC_CMD_LOOPBACK_XGMII_WS 0x13 */ +/* enum: XAUI Wireside. */ +/* MC_CMD_LOOPBACK_XAUI_WS 0x14 */ +/* enum: XAUI Wireside Far. */ +/* MC_CMD_LOOPBACK_XAUI_WS_FAR 0x15 */ +/* enum: XAUI Wireside near. */ +/* MC_CMD_LOOPBACK_XAUI_WS_NEAR 0x16 */ +/* enum: GMII Wireside. */ +/* MC_CMD_LOOPBACK_GMII_WS 0x17 */ +/* enum: XFI Wireside. */ +/* MC_CMD_LOOPBACK_XFI_WS 0x18 */ +/* enum: XFI Wireside Far. */ +/* MC_CMD_LOOPBACK_XFI_WS_FAR 0x19 */ +/* enum: PhyXS Wireside. */ +/* MC_CMD_LOOPBACK_PHYXS_WS 0x1a */ +/* enum: PMA lanes MAC-Serdes. */ +/* MC_CMD_LOOPBACK_PMA_INT 0x1b */ +/* enum: KR Serdes Parallel (Encoder). */ +/* MC_CMD_LOOPBACK_SD_NEAR 0x1c */ +/* enum: KR Serdes Serial. */ +/* MC_CMD_LOOPBACK_SD_FAR 0x1d */ +/* enum: PMA lanes MAC-Serdes Wireside. */ +/* MC_CMD_LOOPBACK_PMA_INT_WS 0x1e */ +/* enum: KR Serdes Parallel Wireside (Full PCS). */ +/* MC_CMD_LOOPBACK_SD_FEP2_WS 0x1f */ +/* enum: KR Serdes Parallel Wireside (Sym Aligner to TX). */ +/* MC_CMD_LOOPBACK_SD_FEP1_5_WS 0x20 */ +/* enum: KR Serdes Parallel Wireside (Deserializer to Serializer). */ +/* MC_CMD_LOOPBACK_SD_FEP_WS 0x21 */ +/* enum: KR Serdes Serial Wireside. */ +/* MC_CMD_LOOPBACK_SD_FES_WS 0x22 */ +/* enum: Near side of AOE Siena side port */ +/* MC_CMD_LOOPBACK_AOE_INT_NEAR 0x23 */ +/* enum: Medford Wireside datapath loopback */ +/* MC_CMD_LOOPBACK_DATA_WS 0x24 */ +/* enum: Force link up without setting up any physical loopback (snapper use + * only) + */ +/* MC_CMD_LOOPBACK_FORCE_EXT_LINK 0x25 */ +/* Supported loopbacks. */ +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_1G_OFST 8 +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_1G_LEN 8 +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_1G_LO_OFST 8 +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_1G_LO_LEN 4 +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_1G_LO_LBN 64 +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_1G_LO_WIDTH 32 +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_1G_HI_OFST 12 +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_1G_HI_LEN 4 +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_1G_HI_LBN 96 +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_1G_HI_WIDTH 32 +/* enum property: bitshift */ +/* Enum values, see field(s): */ +/* 100M */ +/* Supported loopbacks. */ +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_10G_OFST 16 +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_10G_LEN 8 +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_10G_LO_OFST 16 +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_10G_LO_LEN 4 +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_10G_LO_LBN 128 +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_10G_LO_WIDTH 32 +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_10G_HI_OFST 20 +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_10G_HI_LEN 4 +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_10G_HI_LBN 160 +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_10G_HI_WIDTH 32 +/* enum property: bitshift */ +/* Enum values, see field(s): */ +/* 100M */ +/* Supported loopbacks. */ +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_SUGGESTED_OFST 24 +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_SUGGESTED_LEN 8 +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_SUGGESTED_LO_OFST 24 +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_SUGGESTED_LO_LEN 4 +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_SUGGESTED_LO_LBN 192 +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_SUGGESTED_LO_WIDTH 32 +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_SUGGESTED_HI_OFST 28 +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_SUGGESTED_HI_LEN 4 +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_SUGGESTED_HI_LBN 224 +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_SUGGESTED_HI_WIDTH 32 +/* enum property: bitshift */ +/* Enum values, see field(s): */ +/* 100M */ +/* Supported loopbacks. */ +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_40G_OFST 32 +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_40G_LEN 8 +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_40G_LO_OFST 32 +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_40G_LO_LEN 4 +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_40G_LO_LBN 256 +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_40G_LO_WIDTH 32 +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_40G_HI_OFST 36 +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_40G_HI_LEN 4 +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_40G_HI_LBN 288 +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_40G_HI_WIDTH 32 +/* enum property: bitshift */ +/* Enum values, see field(s): */ +/* 100M */ +/* Supported 25G loopbacks. */ +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_25G_OFST 40 +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_25G_LEN 8 +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_25G_LO_OFST 40 +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_25G_LO_LEN 4 +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_25G_LO_LBN 320 +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_25G_LO_WIDTH 32 +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_25G_HI_OFST 44 +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_25G_HI_LEN 4 +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_25G_HI_LBN 352 +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_25G_HI_WIDTH 32 +/* enum property: bitshift */ +/* Enum values, see field(s): */ +/* 100M */ +/* Supported 50 loopbacks. */ +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_50G_OFST 48 +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_50G_LEN 8 +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_50G_LO_OFST 48 +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_50G_LO_LEN 4 +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_50G_LO_LBN 384 +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_50G_LO_WIDTH 32 +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_50G_HI_OFST 52 +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_50G_HI_LEN 4 +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_50G_HI_LBN 416 +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_50G_HI_WIDTH 32 +/* enum property: bitshift */ +/* Enum values, see field(s): */ +/* 100M */ +/* Supported 100G loopbacks. */ +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_100G_OFST 56 +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_100G_LEN 8 +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_100G_LO_OFST 56 +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_100G_LO_LEN 4 +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_100G_LO_LBN 448 +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_100G_LO_WIDTH 32 +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_100G_HI_OFST 60 +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_100G_HI_LEN 4 +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_100G_HI_LBN 480 +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_100G_HI_WIDTH 32 +/* enum property: bitshift */ +/* Enum values, see field(s): */ +/* 100M */ +/* Supported 200G loopbacks. */ +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_200G_OFST 64 +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_200G_LEN 8 +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_200G_LO_OFST 64 +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_200G_LO_LEN 4 +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_200G_LO_LBN 512 +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_200G_LO_WIDTH 32 +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_200G_HI_OFST 68 +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_200G_HI_LEN 4 +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_200G_HI_LBN 544 +#define MC_CMD_GET_LOOPBACK_MODES_OUT_V3_200G_HI_WIDTH 32 +/* enum property: bitshift */ /* Enum values, see field(s): */ /* 100M */ @@ -5222,6 +6284,54 @@ /* MC_CMD_GET_LINK_IN msgrequest */ #define MC_CMD_GET_LINK_IN_LEN 0 +/* MC_CMD_GET_LINK_IN_V2 msgrequest */ +#define MC_CMD_GET_LINK_IN_V2_LEN 8 +/* Target port to request link state for. Uses MAE_LINK_ENDPOINT_SELECTOR which + * identifies a real or virtual network port by MAE port and link end. See the + * structure definition for more details. + */ +#define MC_CMD_GET_LINK_IN_V2_TARGET_OFST 0 +#define MC_CMD_GET_LINK_IN_V2_TARGET_LEN 8 +#define MC_CMD_GET_LINK_IN_V2_TARGET_LO_OFST 0 +#define MC_CMD_GET_LINK_IN_V2_TARGET_LO_LEN 4 +#define MC_CMD_GET_LINK_IN_V2_TARGET_LO_LBN 0 +#define MC_CMD_GET_LINK_IN_V2_TARGET_LO_WIDTH 32 +#define MC_CMD_GET_LINK_IN_V2_TARGET_HI_OFST 4 +#define MC_CMD_GET_LINK_IN_V2_TARGET_HI_LEN 4 +#define MC_CMD_GET_LINK_IN_V2_TARGET_HI_LBN 32 +#define MC_CMD_GET_LINK_IN_V2_TARGET_HI_WIDTH 32 +/* See structuredef: MAE_LINK_ENDPOINT_SELECTOR */ +#define MC_CMD_GET_LINK_IN_V2_TARGET_MPORT_SELECTOR_OFST 0 +#define MC_CMD_GET_LINK_IN_V2_TARGET_MPORT_SELECTOR_LEN 4 +#define MC_CMD_GET_LINK_IN_V2_TARGET_MPORT_SELECTOR_FLAT_OFST 0 +#define MC_CMD_GET_LINK_IN_V2_TARGET_MPORT_SELECTOR_FLAT_LEN 4 +#define MC_CMD_GET_LINK_IN_V2_TARGET_MPORT_SELECTOR_TYPE_OFST 3 +#define MC_CMD_GET_LINK_IN_V2_TARGET_MPORT_SELECTOR_TYPE_LEN 1 +#define MC_CMD_GET_LINK_IN_V2_TARGET_MPORT_SELECTOR_MPORT_ID_OFST 0 +#define MC_CMD_GET_LINK_IN_V2_TARGET_MPORT_SELECTOR_MPORT_ID_LEN 3 +#define MC_CMD_GET_LINK_IN_V2_TARGET_MPORT_SELECTOR_PPORT_ID_LBN 0 +#define MC_CMD_GET_LINK_IN_V2_TARGET_MPORT_SELECTOR_PPORT_ID_WIDTH 4 +#define MC_CMD_GET_LINK_IN_V2_TARGET_MPORT_SELECTOR_FUNC_INTF_ID_LBN 20 +#define MC_CMD_GET_LINK_IN_V2_TARGET_MPORT_SELECTOR_FUNC_INTF_ID_WIDTH 4 +#define MC_CMD_GET_LINK_IN_V2_TARGET_MPORT_SELECTOR_FUNC_MH_PF_ID_LBN 16 +#define MC_CMD_GET_LINK_IN_V2_TARGET_MPORT_SELECTOR_FUNC_MH_PF_ID_WIDTH 4 +#define MC_CMD_GET_LINK_IN_V2_TARGET_MPORT_SELECTOR_FUNC_PF_ID_OFST 2 +#define MC_CMD_GET_LINK_IN_V2_TARGET_MPORT_SELECTOR_FUNC_PF_ID_LEN 1 +#define MC_CMD_GET_LINK_IN_V2_TARGET_MPORT_SELECTOR_FUNC_VF_ID_OFST 0 +#define MC_CMD_GET_LINK_IN_V2_TARGET_MPORT_SELECTOR_FUNC_VF_ID_LEN 2 +#define MC_CMD_GET_LINK_IN_V2_TARGET_LINK_END_OFST 4 +#define MC_CMD_GET_LINK_IN_V2_TARGET_LINK_END_LEN 4 +#define MC_CMD_GET_LINK_IN_V2_TARGET_FLAT_OFST 0 +#define MC_CMD_GET_LINK_IN_V2_TARGET_FLAT_LEN 8 +#define MC_CMD_GET_LINK_IN_V2_TARGET_FLAT_LO_OFST 0 +#define MC_CMD_GET_LINK_IN_V2_TARGET_FLAT_LO_LEN 4 +#define MC_CMD_GET_LINK_IN_V2_TARGET_FLAT_LO_LBN 0 +#define MC_CMD_GET_LINK_IN_V2_TARGET_FLAT_LO_WIDTH 32 +#define MC_CMD_GET_LINK_IN_V2_TARGET_FLAT_HI_OFST 4 +#define MC_CMD_GET_LINK_IN_V2_TARGET_FLAT_HI_LEN 4 +#define MC_CMD_GET_LINK_IN_V2_TARGET_FLAT_HI_LBN 32 +#define MC_CMD_GET_LINK_IN_V2_TARGET_FLAT_HI_WIDTH 32 + /* MC_CMD_GET_LINK_OUT msgresponse */ #define MC_CMD_GET_LINK_OUT_LEN 28 /* Near-side advertised capabilities. Refer to @@ -5498,6 +6608,95 @@ #define MC_CMD_SET_LINK_IN_V2_MODULE_SEQ_IGNORE_LBN 7 #define MC_CMD_SET_LINK_IN_V2_MODULE_SEQ_IGNORE_WIDTH 1 +/* MC_CMD_SET_LINK_IN_V3 msgrequest */ +#define MC_CMD_SET_LINK_IN_V3_LEN 28 +/* Near-side advertised capabilities. Refer to + * MC_CMD_GET_PHY_CFG_OUT/SUPPORTED_CAP for bit definitions. + */ +#define MC_CMD_SET_LINK_IN_V3_CAP_OFST 0 +#define MC_CMD_SET_LINK_IN_V3_CAP_LEN 4 +/* Flags */ +#define MC_CMD_SET_LINK_IN_V3_FLAGS_OFST 4 +#define MC_CMD_SET_LINK_IN_V3_FLAGS_LEN 4 +#define MC_CMD_SET_LINK_IN_V3_LOWPOWER_OFST 4 +#define MC_CMD_SET_LINK_IN_V3_LOWPOWER_LBN 0 +#define MC_CMD_SET_LINK_IN_V3_LOWPOWER_WIDTH 1 +#define MC_CMD_SET_LINK_IN_V3_POWEROFF_OFST 4 +#define MC_CMD_SET_LINK_IN_V3_POWEROFF_LBN 1 +#define MC_CMD_SET_LINK_IN_V3_POWEROFF_WIDTH 1 +#define MC_CMD_SET_LINK_IN_V3_TXDIS_OFST 4 +#define MC_CMD_SET_LINK_IN_V3_TXDIS_LBN 2 +#define MC_CMD_SET_LINK_IN_V3_TXDIS_WIDTH 1 +#define MC_CMD_SET_LINK_IN_V3_LINKDOWN_OFST 4 +#define MC_CMD_SET_LINK_IN_V3_LINKDOWN_LBN 3 +#define MC_CMD_SET_LINK_IN_V3_LINKDOWN_WIDTH 1 +/* Loopback mode. */ +#define MC_CMD_SET_LINK_IN_V3_LOOPBACK_MODE_OFST 8 +#define MC_CMD_SET_LINK_IN_V3_LOOPBACK_MODE_LEN 4 +/* Enum values, see field(s): */ +/* MC_CMD_GET_LOOPBACK_MODES/MC_CMD_GET_LOOPBACK_MODES_OUT/100M */ +/* A loopback speed of "0" is supported, and means (choose any available + * speed). + */ +#define MC_CMD_SET_LINK_IN_V3_LOOPBACK_SPEED_OFST 12 +#define MC_CMD_SET_LINK_IN_V3_LOOPBACK_SPEED_LEN 4 +#define MC_CMD_SET_LINK_IN_V3_MODULE_SEQ_OFST 16 +#define MC_CMD_SET_LINK_IN_V3_MODULE_SEQ_LEN 1 +#define MC_CMD_SET_LINK_IN_V3_MODULE_SEQ_NUMBER_OFST 16 +#define MC_CMD_SET_LINK_IN_V3_MODULE_SEQ_NUMBER_LBN 0 +#define MC_CMD_SET_LINK_IN_V3_MODULE_SEQ_NUMBER_WIDTH 7 +#define MC_CMD_SET_LINK_IN_V3_MODULE_SEQ_IGNORE_OFST 16 +#define MC_CMD_SET_LINK_IN_V3_MODULE_SEQ_IGNORE_LBN 7 +#define MC_CMD_SET_LINK_IN_V3_MODULE_SEQ_IGNORE_WIDTH 1 +/* Padding */ +#define MC_CMD_SET_LINK_IN_V3_RESERVED_OFST 17 +#define MC_CMD_SET_LINK_IN_V3_RESERVED_LEN 3 +/* Target port to set link state for. Uses MAE_LINK_ENDPOINT_SELECTOR which + * identifies a real or virtual network port by MAE port and link end. See the + * structure definition for more details + */ +#define MC_CMD_SET_LINK_IN_V3_TARGET_OFST 20 +#define MC_CMD_SET_LINK_IN_V3_TARGET_LEN 8 +#define MC_CMD_SET_LINK_IN_V3_TARGET_LO_OFST 20 +#define MC_CMD_SET_LINK_IN_V3_TARGET_LO_LEN 4 +#define MC_CMD_SET_LINK_IN_V3_TARGET_LO_LBN 160 +#define MC_CMD_SET_LINK_IN_V3_TARGET_LO_WIDTH 32 +#define MC_CMD_SET_LINK_IN_V3_TARGET_HI_OFST 24 +#define MC_CMD_SET_LINK_IN_V3_TARGET_HI_LEN 4 +#define MC_CMD_SET_LINK_IN_V3_TARGET_HI_LBN 192 +#define MC_CMD_SET_LINK_IN_V3_TARGET_HI_WIDTH 32 +/* See structuredef: MAE_LINK_ENDPOINT_SELECTOR */ +#define MC_CMD_SET_LINK_IN_V3_TARGET_MPORT_SELECTOR_OFST 20 +#define MC_CMD_SET_LINK_IN_V3_TARGET_MPORT_SELECTOR_LEN 4 +#define MC_CMD_SET_LINK_IN_V3_TARGET_MPORT_SELECTOR_FLAT_OFST 20 +#define MC_CMD_SET_LINK_IN_V3_TARGET_MPORT_SELECTOR_FLAT_LEN 4 +#define MC_CMD_SET_LINK_IN_V3_TARGET_MPORT_SELECTOR_TYPE_OFST 23 +#define MC_CMD_SET_LINK_IN_V3_TARGET_MPORT_SELECTOR_TYPE_LEN 1 +#define MC_CMD_SET_LINK_IN_V3_TARGET_MPORT_SELECTOR_MPORT_ID_OFST 20 +#define MC_CMD_SET_LINK_IN_V3_TARGET_MPORT_SELECTOR_MPORT_ID_LEN 3 +#define MC_CMD_SET_LINK_IN_V3_TARGET_MPORT_SELECTOR_PPORT_ID_LBN 160 +#define MC_CMD_SET_LINK_IN_V3_TARGET_MPORT_SELECTOR_PPORT_ID_WIDTH 4 +#define MC_CMD_SET_LINK_IN_V3_TARGET_MPORT_SELECTOR_FUNC_INTF_ID_LBN 180 +#define MC_CMD_SET_LINK_IN_V3_TARGET_MPORT_SELECTOR_FUNC_INTF_ID_WIDTH 4 +#define MC_CMD_SET_LINK_IN_V3_TARGET_MPORT_SELECTOR_FUNC_MH_PF_ID_LBN 176 +#define MC_CMD_SET_LINK_IN_V3_TARGET_MPORT_SELECTOR_FUNC_MH_PF_ID_WIDTH 4 +#define MC_CMD_SET_LINK_IN_V3_TARGET_MPORT_SELECTOR_FUNC_PF_ID_OFST 22 +#define MC_CMD_SET_LINK_IN_V3_TARGET_MPORT_SELECTOR_FUNC_PF_ID_LEN 1 +#define MC_CMD_SET_LINK_IN_V3_TARGET_MPORT_SELECTOR_FUNC_VF_ID_OFST 20 +#define MC_CMD_SET_LINK_IN_V3_TARGET_MPORT_SELECTOR_FUNC_VF_ID_LEN 2 +#define MC_CMD_SET_LINK_IN_V3_TARGET_LINK_END_OFST 24 +#define MC_CMD_SET_LINK_IN_V3_TARGET_LINK_END_LEN 4 +#define MC_CMD_SET_LINK_IN_V3_TARGET_FLAT_OFST 20 +#define MC_CMD_SET_LINK_IN_V3_TARGET_FLAT_LEN 8 +#define MC_CMD_SET_LINK_IN_V3_TARGET_FLAT_LO_OFST 20 +#define MC_CMD_SET_LINK_IN_V3_TARGET_FLAT_LO_LEN 4 +#define MC_CMD_SET_LINK_IN_V3_TARGET_FLAT_LO_LBN 160 +#define MC_CMD_SET_LINK_IN_V3_TARGET_FLAT_LO_WIDTH 32 +#define MC_CMD_SET_LINK_IN_V3_TARGET_FLAT_HI_OFST 24 +#define MC_CMD_SET_LINK_IN_V3_TARGET_FLAT_HI_LEN 4 +#define MC_CMD_SET_LINK_IN_V3_TARGET_FLAT_HI_LBN 192 +#define MC_CMD_SET_LINK_IN_V3_TARGET_FLAT_HI_WIDTH 32 + /* MC_CMD_SET_LINK_OUT msgresponse */ #define MC_CMD_SET_LINK_OUT_LEN 0 @@ -5719,19 +6918,9 @@ #define MC_CMD_SET_MAC_V3_IN_CFG_FCS_OFST 28 #define MC_CMD_SET_MAC_V3_IN_CFG_FCS_LBN 4 #define MC_CMD_SET_MAC_V3_IN_CFG_FCS_WIDTH 1 -/* Identifies the MAC to update by the specifying the end of a logical MAE - * link. Setting TARGET to MAE_LINK_ENDPOINT_COMPAT is equivalent to using the - * previous version of the command (MC_CMD_SET_MAC_EXT). Not all possible - * combinations of MPORT_END and MPORT_SELECTOR in TARGET will work in all - * circumstances. 1. Some will always work (e.g. a VF can always address its - * logical MAC using MPORT_SELECTOR=ASSIGNED,LINK_END=VNIC), 2. Some are not - * meaningful and will always fail with EINVAL (e.g. attempting to address the - * VNIC end of a link to a physical port), 3. Some are meaningful but require - * the MCDI client to have the required permission and fail with EPERM - * otherwise (e.g. trying to set the MAC on a VF the caller cannot administer), - * and 4. Some could be implementation-specific and fail with ENOTSUP if not - * available (no examples exist right now). See SF-123581-TC section 4.3 for - * more details. +/* Target port to set mac state for. Uses MAE_LINK_ENDPOINT_SELECTOR which + * identifies a real or virtual network port by MAE port and link end. See the + * structure definition for more details */ #define MC_CMD_SET_MAC_V3_IN_TARGET_OFST 32 #define MC_CMD_SET_MAC_V3_IN_TARGET_LEN 8 @@ -5743,6 +6932,7 @@ #define MC_CMD_SET_MAC_V3_IN_TARGET_HI_LEN 4 #define MC_CMD_SET_MAC_V3_IN_TARGET_HI_LBN 288 #define MC_CMD_SET_MAC_V3_IN_TARGET_HI_WIDTH 32 +/* See structuredef: MAE_LINK_ENDPOINT_SELECTOR */ #define MC_CMD_SET_MAC_V3_IN_TARGET_MPORT_SELECTOR_OFST 32 #define MC_CMD_SET_MAC_V3_IN_TARGET_MPORT_SELECTOR_LEN 4 #define MC_CMD_SET_MAC_V3_IN_TARGET_MPORT_SELECTOR_FLAT_OFST 32 @@ -5938,6 +7128,98 @@ #define MC_CMD_MAC_STATS_IN_PORT_ID_OFST 16 #define MC_CMD_MAC_STATS_IN_PORT_ID_LEN 4 +/* MC_CMD_MAC_STATS_V2_IN msgrequest */ +#define MC_CMD_MAC_STATS_V2_IN_LEN 28 +/* ??? */ +#define MC_CMD_MAC_STATS_V2_IN_DMA_ADDR_OFST 0 +#define MC_CMD_MAC_STATS_V2_IN_DMA_ADDR_LEN 8 +#define MC_CMD_MAC_STATS_V2_IN_DMA_ADDR_LO_OFST 0 +#define MC_CMD_MAC_STATS_V2_IN_DMA_ADDR_LO_LEN 4 +#define MC_CMD_MAC_STATS_V2_IN_DMA_ADDR_LO_LBN 0 +#define MC_CMD_MAC_STATS_V2_IN_DMA_ADDR_LO_WIDTH 32 +#define MC_CMD_MAC_STATS_V2_IN_DMA_ADDR_HI_OFST 4 +#define MC_CMD_MAC_STATS_V2_IN_DMA_ADDR_HI_LEN 4 +#define MC_CMD_MAC_STATS_V2_IN_DMA_ADDR_HI_LBN 32 +#define MC_CMD_MAC_STATS_V2_IN_DMA_ADDR_HI_WIDTH 32 +#define MC_CMD_MAC_STATS_V2_IN_CMD_OFST 8 +#define MC_CMD_MAC_STATS_V2_IN_CMD_LEN 4 +#define MC_CMD_MAC_STATS_V2_IN_DMA_OFST 8 +#define MC_CMD_MAC_STATS_V2_IN_DMA_LBN 0 +#define MC_CMD_MAC_STATS_V2_IN_DMA_WIDTH 1 +#define MC_CMD_MAC_STATS_V2_IN_CLEAR_OFST 8 +#define MC_CMD_MAC_STATS_V2_IN_CLEAR_LBN 1 +#define MC_CMD_MAC_STATS_V2_IN_CLEAR_WIDTH 1 +#define MC_CMD_MAC_STATS_V2_IN_PERIODIC_CHANGE_OFST 8 +#define MC_CMD_MAC_STATS_V2_IN_PERIODIC_CHANGE_LBN 2 +#define MC_CMD_MAC_STATS_V2_IN_PERIODIC_CHANGE_WIDTH 1 +#define MC_CMD_MAC_STATS_V2_IN_PERIODIC_ENABLE_OFST 8 +#define MC_CMD_MAC_STATS_V2_IN_PERIODIC_ENABLE_LBN 3 +#define MC_CMD_MAC_STATS_V2_IN_PERIODIC_ENABLE_WIDTH 1 +#define MC_CMD_MAC_STATS_V2_IN_PERIODIC_CLEAR_OFST 8 +#define MC_CMD_MAC_STATS_V2_IN_PERIODIC_CLEAR_LBN 4 +#define MC_CMD_MAC_STATS_V2_IN_PERIODIC_CLEAR_WIDTH 1 +#define MC_CMD_MAC_STATS_V2_IN_PERIODIC_NOEVENT_OFST 8 +#define MC_CMD_MAC_STATS_V2_IN_PERIODIC_NOEVENT_LBN 5 +#define MC_CMD_MAC_STATS_V2_IN_PERIODIC_NOEVENT_WIDTH 1 +#define MC_CMD_MAC_STATS_V2_IN_PERIOD_MS_OFST 8 +#define MC_CMD_MAC_STATS_V2_IN_PERIOD_MS_LBN 16 +#define MC_CMD_MAC_STATS_V2_IN_PERIOD_MS_WIDTH 16 +/* DMA length. Should be set to MAC_STATS_NUM_STATS * sizeof(uint64_t), as + * returned by MC_CMD_GET_CAPABILITIES_V4_OUT. For legacy firmware not + * supporting MC_CMD_GET_CAPABILITIES_V4_OUT, DMA_LEN should be set to + * MC_CMD_MAC_NSTATS * sizeof(uint64_t) + */ +#define MC_CMD_MAC_STATS_V2_IN_DMA_LEN_OFST 12 +#define MC_CMD_MAC_STATS_V2_IN_DMA_LEN_LEN 4 +/* port id so vadapter stats can be provided */ +#define MC_CMD_MAC_STATS_V2_IN_PORT_ID_OFST 16 +#define MC_CMD_MAC_STATS_V2_IN_PORT_ID_LEN 4 +/* Target port to request statistics for. Uses MAE_LINK_ENDPOINT_SELECTOR which + * identifies a real or virtual network port by MAE port and link end. See the + * structure definition for more details + */ +#define MC_CMD_MAC_STATS_V2_IN_TARGET_OFST 20 +#define MC_CMD_MAC_STATS_V2_IN_TARGET_LEN 8 +#define MC_CMD_MAC_STATS_V2_IN_TARGET_LO_OFST 20 +#define MC_CMD_MAC_STATS_V2_IN_TARGET_LO_LEN 4 +#define MC_CMD_MAC_STATS_V2_IN_TARGET_LO_LBN 160 +#define MC_CMD_MAC_STATS_V2_IN_TARGET_LO_WIDTH 32 +#define MC_CMD_MAC_STATS_V2_IN_TARGET_HI_OFST 24 +#define MC_CMD_MAC_STATS_V2_IN_TARGET_HI_LEN 4 +#define MC_CMD_MAC_STATS_V2_IN_TARGET_HI_LBN 192 +#define MC_CMD_MAC_STATS_V2_IN_TARGET_HI_WIDTH 32 +/* See structuredef: MAE_LINK_ENDPOINT_SELECTOR */ +#define MC_CMD_MAC_STATS_V2_IN_TARGET_MPORT_SELECTOR_OFST 20 +#define MC_CMD_MAC_STATS_V2_IN_TARGET_MPORT_SELECTOR_LEN 4 +#define MC_CMD_MAC_STATS_V2_IN_TARGET_MPORT_SELECTOR_FLAT_OFST 20 +#define MC_CMD_MAC_STATS_V2_IN_TARGET_MPORT_SELECTOR_FLAT_LEN 4 +#define MC_CMD_MAC_STATS_V2_IN_TARGET_MPORT_SELECTOR_TYPE_OFST 23 +#define MC_CMD_MAC_STATS_V2_IN_TARGET_MPORT_SELECTOR_TYPE_LEN 1 +#define MC_CMD_MAC_STATS_V2_IN_TARGET_MPORT_SELECTOR_MPORT_ID_OFST 20 +#define MC_CMD_MAC_STATS_V2_IN_TARGET_MPORT_SELECTOR_MPORT_ID_LEN 3 +#define MC_CMD_MAC_STATS_V2_IN_TARGET_MPORT_SELECTOR_PPORT_ID_LBN 160 +#define MC_CMD_MAC_STATS_V2_IN_TARGET_MPORT_SELECTOR_PPORT_ID_WIDTH 4 +#define MC_CMD_MAC_STATS_V2_IN_TARGET_MPORT_SELECTOR_FUNC_INTF_ID_LBN 180 +#define MC_CMD_MAC_STATS_V2_IN_TARGET_MPORT_SELECTOR_FUNC_INTF_ID_WIDTH 4 +#define MC_CMD_MAC_STATS_V2_IN_TARGET_MPORT_SELECTOR_FUNC_MH_PF_ID_LBN 176 +#define MC_CMD_MAC_STATS_V2_IN_TARGET_MPORT_SELECTOR_FUNC_MH_PF_ID_WIDTH 4 +#define MC_CMD_MAC_STATS_V2_IN_TARGET_MPORT_SELECTOR_FUNC_PF_ID_OFST 22 +#define MC_CMD_MAC_STATS_V2_IN_TARGET_MPORT_SELECTOR_FUNC_PF_ID_LEN 1 +#define MC_CMD_MAC_STATS_V2_IN_TARGET_MPORT_SELECTOR_FUNC_VF_ID_OFST 20 +#define MC_CMD_MAC_STATS_V2_IN_TARGET_MPORT_SELECTOR_FUNC_VF_ID_LEN 2 +#define MC_CMD_MAC_STATS_V2_IN_TARGET_LINK_END_OFST 24 +#define MC_CMD_MAC_STATS_V2_IN_TARGET_LINK_END_LEN 4 +#define MC_CMD_MAC_STATS_V2_IN_TARGET_FLAT_OFST 20 +#define MC_CMD_MAC_STATS_V2_IN_TARGET_FLAT_LEN 8 +#define MC_CMD_MAC_STATS_V2_IN_TARGET_FLAT_LO_OFST 20 +#define MC_CMD_MAC_STATS_V2_IN_TARGET_FLAT_LO_LEN 4 +#define MC_CMD_MAC_STATS_V2_IN_TARGET_FLAT_LO_LBN 160 +#define MC_CMD_MAC_STATS_V2_IN_TARGET_FLAT_LO_WIDTH 32 +#define MC_CMD_MAC_STATS_V2_IN_TARGET_FLAT_HI_OFST 24 +#define MC_CMD_MAC_STATS_V2_IN_TARGET_FLAT_HI_LEN 4 +#define MC_CMD_MAC_STATS_V2_IN_TARGET_FLAT_HI_LBN 192 +#define MC_CMD_MAC_STATS_V2_IN_TARGET_FLAT_HI_WIDTH 32 + /* MC_CMD_MAC_STATS_OUT_DMA msgresponse */ #define MC_CMD_MAC_STATS_OUT_DMA_LEN 0 @@ -5954,6 +7236,7 @@ #define MC_CMD_MAC_STATS_OUT_NO_DMA_STATISTICS_HI_LBN 32 #define MC_CMD_MAC_STATS_OUT_NO_DMA_STATISTICS_HI_WIDTH 32 #define MC_CMD_MAC_STATS_OUT_NO_DMA_STATISTICS_NUM MC_CMD_MAC_NSTATS +/* enum property: index */ #define MC_CMD_MAC_GENERATION_START 0x0 /* enum */ #define MC_CMD_MAC_DMABUF_START 0x1 /* enum */ #define MC_CMD_MAC_TX_PKTS 0x1 /* enum */ @@ -6116,6 +7399,7 @@ #define MC_CMD_MAC_STATS_V2_OUT_NO_DMA_STATISTICS_HI_LBN 32 #define MC_CMD_MAC_STATS_V2_OUT_NO_DMA_STATISTICS_HI_WIDTH 32 #define MC_CMD_MAC_STATS_V2_OUT_NO_DMA_STATISTICS_NUM MC_CMD_MAC_NSTATS_V2 +/* enum property: index */ /* enum: Start of FEC stats buffer space, Medford2 and up */ #define MC_CMD_MAC_FEC_DMABUF_START 0x61 /* enum: Number of uncorrected FEC codewords on link (RS-FEC only for Medford2) @@ -6155,6 +7439,7 @@ #define MC_CMD_MAC_STATS_V3_OUT_NO_DMA_STATISTICS_HI_LBN 32 #define MC_CMD_MAC_STATS_V3_OUT_NO_DMA_STATISTICS_HI_WIDTH 32 #define MC_CMD_MAC_STATS_V3_OUT_NO_DMA_STATISTICS_NUM MC_CMD_MAC_NSTATS_V3 +/* enum property: index */ /* enum: Start of CTPIO stats buffer space, Medford2 and up */ #define MC_CMD_MAC_CTPIO_DMABUF_START 0x68 /* enum: Number of CTPIO fallbacks because a DMA packet was in progress on the @@ -6235,6 +7520,7 @@ #define MC_CMD_MAC_STATS_V4_OUT_NO_DMA_STATISTICS_HI_LBN 32 #define MC_CMD_MAC_STATS_V4_OUT_NO_DMA_STATISTICS_HI_WIDTH 32 #define MC_CMD_MAC_STATS_V4_OUT_NO_DMA_STATISTICS_NUM MC_CMD_MAC_NSTATS_V4 +/* enum property: index */ /* enum: Start of V4 stats buffer space */ #define MC_CMD_MAC_V4_DMABUF_START 0x79 /* enum: RXDP counter: Number of packets truncated because scattering was @@ -6522,6 +7808,7 @@ #define MC_CMD_WOL_FILTER_RESET_IN_LEN 4 #define MC_CMD_WOL_FILTER_RESET_IN_MASK_OFST 0 #define MC_CMD_WOL_FILTER_RESET_IN_MASK_LEN 4 +/* enum property: bitmask */ #define MC_CMD_WOL_FILTER_RESET_IN_WAKE_FILTERS 0x1 /* enum */ #define MC_CMD_WOL_FILTER_RESET_IN_LIGHTSOUT_OFFLOADS 0x2 /* enum */ @@ -6566,6 +7853,7 @@ /* Bit mask of supported types. */ #define MC_CMD_NVRAM_TYPES_OUT_TYPES_OFST 0 #define MC_CMD_NVRAM_TYPES_OUT_TYPES_LEN 4 +/* enum property: bitshift */ /* enum: Disabled callisto. */ #define MC_CMD_NVRAM_TYPE_DISABLED_CALLISTO 0x0 /* enum: MC firmware. */ @@ -7613,6 +8901,54 @@ /* MC_CMD_GET_PHY_STATE_IN msgrequest */ #define MC_CMD_GET_PHY_STATE_IN_LEN 0 +/* MC_CMD_GET_PHY_STATE_IN_V2 msgrequest */ +#define MC_CMD_GET_PHY_STATE_IN_V2_LEN 8 +/* Target port to request PHY state for. Uses MAE_LINK_ENDPOINT_SELECTOR which + * identifies a real or virtual network port by MAE port and link end. See the + * structure definition for more details. + */ +#define MC_CMD_GET_PHY_STATE_IN_V2_TARGET_OFST 0 +#define MC_CMD_GET_PHY_STATE_IN_V2_TARGET_LEN 8 +#define MC_CMD_GET_PHY_STATE_IN_V2_TARGET_LO_OFST 0 +#define MC_CMD_GET_PHY_STATE_IN_V2_TARGET_LO_LEN 4 +#define MC_CMD_GET_PHY_STATE_IN_V2_TARGET_LO_LBN 0 +#define MC_CMD_GET_PHY_STATE_IN_V2_TARGET_LO_WIDTH 32 +#define MC_CMD_GET_PHY_STATE_IN_V2_TARGET_HI_OFST 4 +#define MC_CMD_GET_PHY_STATE_IN_V2_TARGET_HI_LEN 4 +#define MC_CMD_GET_PHY_STATE_IN_V2_TARGET_HI_LBN 32 +#define MC_CMD_GET_PHY_STATE_IN_V2_TARGET_HI_WIDTH 32 +/* See structuredef: MAE_LINK_ENDPOINT_SELECTOR */ +#define MC_CMD_GET_PHY_STATE_IN_V2_TARGET_MPORT_SELECTOR_OFST 0 +#define MC_CMD_GET_PHY_STATE_IN_V2_TARGET_MPORT_SELECTOR_LEN 4 +#define MC_CMD_GET_PHY_STATE_IN_V2_TARGET_MPORT_SELECTOR_FLAT_OFST 0 +#define MC_CMD_GET_PHY_STATE_IN_V2_TARGET_MPORT_SELECTOR_FLAT_LEN 4 +#define MC_CMD_GET_PHY_STATE_IN_V2_TARGET_MPORT_SELECTOR_TYPE_OFST 3 +#define MC_CMD_GET_PHY_STATE_IN_V2_TARGET_MPORT_SELECTOR_TYPE_LEN 1 +#define MC_CMD_GET_PHY_STATE_IN_V2_TARGET_MPORT_SELECTOR_MPORT_ID_OFST 0 +#define MC_CMD_GET_PHY_STATE_IN_V2_TARGET_MPORT_SELECTOR_MPORT_ID_LEN 3 +#define MC_CMD_GET_PHY_STATE_IN_V2_TARGET_MPORT_SELECTOR_PPORT_ID_LBN 0 +#define MC_CMD_GET_PHY_STATE_IN_V2_TARGET_MPORT_SELECTOR_PPORT_ID_WIDTH 4 +#define MC_CMD_GET_PHY_STATE_IN_V2_TARGET_MPORT_SELECTOR_FUNC_INTF_ID_LBN 20 +#define MC_CMD_GET_PHY_STATE_IN_V2_TARGET_MPORT_SELECTOR_FUNC_INTF_ID_WIDTH 4 +#define MC_CMD_GET_PHY_STATE_IN_V2_TARGET_MPORT_SELECTOR_FUNC_MH_PF_ID_LBN 16 +#define MC_CMD_GET_PHY_STATE_IN_V2_TARGET_MPORT_SELECTOR_FUNC_MH_PF_ID_WIDTH 4 +#define MC_CMD_GET_PHY_STATE_IN_V2_TARGET_MPORT_SELECTOR_FUNC_PF_ID_OFST 2 +#define MC_CMD_GET_PHY_STATE_IN_V2_TARGET_MPORT_SELECTOR_FUNC_PF_ID_LEN 1 +#define MC_CMD_GET_PHY_STATE_IN_V2_TARGET_MPORT_SELECTOR_FUNC_VF_ID_OFST 0 +#define MC_CMD_GET_PHY_STATE_IN_V2_TARGET_MPORT_SELECTOR_FUNC_VF_ID_LEN 2 +#define MC_CMD_GET_PHY_STATE_IN_V2_TARGET_LINK_END_OFST 4 +#define MC_CMD_GET_PHY_STATE_IN_V2_TARGET_LINK_END_LEN 4 +#define MC_CMD_GET_PHY_STATE_IN_V2_TARGET_FLAT_OFST 0 +#define MC_CMD_GET_PHY_STATE_IN_V2_TARGET_FLAT_LEN 8 +#define MC_CMD_GET_PHY_STATE_IN_V2_TARGET_FLAT_LO_OFST 0 +#define MC_CMD_GET_PHY_STATE_IN_V2_TARGET_FLAT_LO_LEN 4 +#define MC_CMD_GET_PHY_STATE_IN_V2_TARGET_FLAT_LO_LBN 0 +#define MC_CMD_GET_PHY_STATE_IN_V2_TARGET_FLAT_LO_WIDTH 32 +#define MC_CMD_GET_PHY_STATE_IN_V2_TARGET_FLAT_HI_OFST 4 +#define MC_CMD_GET_PHY_STATE_IN_V2_TARGET_FLAT_HI_LEN 4 +#define MC_CMD_GET_PHY_STATE_IN_V2_TARGET_FLAT_HI_LBN 32 +#define MC_CMD_GET_PHY_STATE_IN_V2_TARGET_FLAT_HI_WIDTH 32 + /* MC_CMD_GET_PHY_STATE_OUT msgresponse */ #define MC_CMD_GET_PHY_STATE_OUT_LEN 4 #define MC_CMD_GET_PHY_STATE_OUT_STATE_OFST 0 @@ -7884,6 +9220,62 @@ #define MC_CMD_GET_PHY_MEDIA_INFO_IN_DSFP_BANK_LBN 16 #define MC_CMD_GET_PHY_MEDIA_INFO_IN_DSFP_BANK_WIDTH 16 +/* MC_CMD_GET_PHY_MEDIA_INFO_IN_V2 msgrequest */ +#define MC_CMD_GET_PHY_MEDIA_INFO_IN_V2_LEN 12 +#define MC_CMD_GET_PHY_MEDIA_INFO_IN_V2_PAGE_OFST 0 +#define MC_CMD_GET_PHY_MEDIA_INFO_IN_V2_PAGE_LEN 4 +#define MC_CMD_GET_PHY_MEDIA_INFO_IN_V2_DSFP_PAGE_OFST 0 +#define MC_CMD_GET_PHY_MEDIA_INFO_IN_V2_DSFP_PAGE_LBN 0 +#define MC_CMD_GET_PHY_MEDIA_INFO_IN_V2_DSFP_PAGE_WIDTH 16 +#define MC_CMD_GET_PHY_MEDIA_INFO_IN_V2_DSFP_BANK_OFST 0 +#define MC_CMD_GET_PHY_MEDIA_INFO_IN_V2_DSFP_BANK_LBN 16 +#define MC_CMD_GET_PHY_MEDIA_INFO_IN_V2_DSFP_BANK_WIDTH 16 +/* Target port to request PHY state for. Uses MAE_LINK_ENDPOINT_SELECTOR which + * identifies a real or virtual network port by MAE port and link end. See the + * structure definition for more details + */ +#define MC_CMD_GET_PHY_MEDIA_INFO_IN_V2_TARGET_OFST 4 +#define MC_CMD_GET_PHY_MEDIA_INFO_IN_V2_TARGET_LEN 8 +#define MC_CMD_GET_PHY_MEDIA_INFO_IN_V2_TARGET_LO_OFST 4 +#define MC_CMD_GET_PHY_MEDIA_INFO_IN_V2_TARGET_LO_LEN 4 +#define MC_CMD_GET_PHY_MEDIA_INFO_IN_V2_TARGET_LO_LBN 32 +#define MC_CMD_GET_PHY_MEDIA_INFO_IN_V2_TARGET_LO_WIDTH 32 +#define MC_CMD_GET_PHY_MEDIA_INFO_IN_V2_TARGET_HI_OFST 8 +#define MC_CMD_GET_PHY_MEDIA_INFO_IN_V2_TARGET_HI_LEN 4 +#define MC_CMD_GET_PHY_MEDIA_INFO_IN_V2_TARGET_HI_LBN 64 +#define MC_CMD_GET_PHY_MEDIA_INFO_IN_V2_TARGET_HI_WIDTH 32 +/* See structuredef: MAE_LINK_ENDPOINT_SELECTOR */ +#define MC_CMD_GET_PHY_MEDIA_INFO_IN_V2_TARGET_MPORT_SELECTOR_OFST 4 +#define MC_CMD_GET_PHY_MEDIA_INFO_IN_V2_TARGET_MPORT_SELECTOR_LEN 4 +#define MC_CMD_GET_PHY_MEDIA_INFO_IN_V2_TARGET_MPORT_SELECTOR_FLAT_OFST 4 +#define MC_CMD_GET_PHY_MEDIA_INFO_IN_V2_TARGET_MPORT_SELECTOR_FLAT_LEN 4 +#define MC_CMD_GET_PHY_MEDIA_INFO_IN_V2_TARGET_MPORT_SELECTOR_TYPE_OFST 7 +#define MC_CMD_GET_PHY_MEDIA_INFO_IN_V2_TARGET_MPORT_SELECTOR_TYPE_LEN 1 +#define MC_CMD_GET_PHY_MEDIA_INFO_IN_V2_TARGET_MPORT_SELECTOR_MPORT_ID_OFST 4 +#define MC_CMD_GET_PHY_MEDIA_INFO_IN_V2_TARGET_MPORT_SELECTOR_MPORT_ID_LEN 3 +#define MC_CMD_GET_PHY_MEDIA_INFO_IN_V2_TARGET_MPORT_SELECTOR_PPORT_ID_LBN 32 +#define MC_CMD_GET_PHY_MEDIA_INFO_IN_V2_TARGET_MPORT_SELECTOR_PPORT_ID_WIDTH 4 +#define MC_CMD_GET_PHY_MEDIA_INFO_IN_V2_TARGET_MPORT_SELECTOR_FUNC_INTF_ID_LBN 52 +#define MC_CMD_GET_PHY_MEDIA_INFO_IN_V2_TARGET_MPORT_SELECTOR_FUNC_INTF_ID_WIDTH 4 +#define MC_CMD_GET_PHY_MEDIA_INFO_IN_V2_TARGET_MPORT_SELECTOR_FUNC_MH_PF_ID_LBN 48 +#define MC_CMD_GET_PHY_MEDIA_INFO_IN_V2_TARGET_MPORT_SELECTOR_FUNC_MH_PF_ID_WIDTH 4 +#define MC_CMD_GET_PHY_MEDIA_INFO_IN_V2_TARGET_MPORT_SELECTOR_FUNC_PF_ID_OFST 6 +#define MC_CMD_GET_PHY_MEDIA_INFO_IN_V2_TARGET_MPORT_SELECTOR_FUNC_PF_ID_LEN 1 +#define MC_CMD_GET_PHY_MEDIA_INFO_IN_V2_TARGET_MPORT_SELECTOR_FUNC_VF_ID_OFST 4 +#define MC_CMD_GET_PHY_MEDIA_INFO_IN_V2_TARGET_MPORT_SELECTOR_FUNC_VF_ID_LEN 2 +#define MC_CMD_GET_PHY_MEDIA_INFO_IN_V2_TARGET_LINK_END_OFST 8 +#define MC_CMD_GET_PHY_MEDIA_INFO_IN_V2_TARGET_LINK_END_LEN 4 +#define MC_CMD_GET_PHY_MEDIA_INFO_IN_V2_TARGET_FLAT_OFST 4 +#define MC_CMD_GET_PHY_MEDIA_INFO_IN_V2_TARGET_FLAT_LEN 8 +#define MC_CMD_GET_PHY_MEDIA_INFO_IN_V2_TARGET_FLAT_LO_OFST 4 +#define MC_CMD_GET_PHY_MEDIA_INFO_IN_V2_TARGET_FLAT_LO_LEN 4 +#define MC_CMD_GET_PHY_MEDIA_INFO_IN_V2_TARGET_FLAT_LO_LBN 32 +#define MC_CMD_GET_PHY_MEDIA_INFO_IN_V2_TARGET_FLAT_LO_WIDTH 32 +#define MC_CMD_GET_PHY_MEDIA_INFO_IN_V2_TARGET_FLAT_HI_OFST 8 +#define MC_CMD_GET_PHY_MEDIA_INFO_IN_V2_TARGET_FLAT_HI_LEN 4 +#define MC_CMD_GET_PHY_MEDIA_INFO_IN_V2_TARGET_FLAT_HI_LBN 64 +#define MC_CMD_GET_PHY_MEDIA_INFO_IN_V2_TARGET_FLAT_HI_WIDTH 32 + /* MC_CMD_GET_PHY_MEDIA_INFO_OUT msgresponse */ #define MC_CMD_GET_PHY_MEDIA_INFO_OUT_LENMIN 5 #define MC_CMD_GET_PHY_MEDIA_INFO_OUT_LENMAX 252 @@ -9069,27 +10461,22 @@ * and a generation count for this version of the sensor table. On systems * advertising the DYNAMIC_SENSORS capability bit, this replaces the * MC_CMD_READ_SENSORS command. On multi-MC systems this may include sensors - * added by the NMC. - * - * Sensor handles are persistent for the lifetime of the sensor and are used to - * identify sensors in MC_CMD_DYNAMIC_SENSORS_GET_DESCRIPTIONS and - * MC_CMD_DYNAMIC_SENSORS_GET_VALUES. - * - * The generation count is maintained by the MC, is persistent across reboots - * and will be incremented each time the sensor table is modified. When the - * table is modified, a CODE_DYNAMIC_SENSORS_CHANGE event will be generated - * containing the new generation count. The driver should compare this against - * the current generation count, and if it is different, call - * MC_CMD_DYNAMIC_SENSORS_LIST again to update it's copy of the sensor table. - * - * The sensor count is provided to allow a future path to supporting more than + * added by the NMC. Sensor handles are persistent for the lifetime of the + * sensor and are used to identify sensors in + * MC_CMD_DYNAMIC_SENSORS_GET_DESCRIPTIONS and + * MC_CMD_DYNAMIC_SENSORS_GET_VALUES. The generation count is maintained by the + * MC, is persistent across reboots and will be incremented each time the + * sensor table is modified. When the table is modified, a + * CODE_DYNAMIC_SENSORS_CHANGE event will be generated containing the new + * generation count. The driver should compare this against the current + * generation count, and if it is different, call MC_CMD_DYNAMIC_SENSORS_LIST + * again to update it's copy of the sensor table. The sensor count is provided + * to allow a future path to supporting more than * MC_CMD_DYNAMIC_SENSORS_GET_READINGS_IN_HANDLES_MAXNUM_MCDI2 sensors, i.e. * the maximum number that will fit in a single response. As this is a fairly * large number (253) it is not anticipated that this will be needed in the - * near future, so can currently be ignored. - * - * On Riverhead this command is implemented as a a wrapper for `list` in the - * sensor_query SPHINX service. + * near future, so can currently be ignored. On Riverhead this command is + * implemented as a wrapper for `list` in the sensor_query SPHINX service. */ #define MC_CMD_DYNAMIC_SENSORS_LIST 0x66 #define MC_CMD_DYNAMIC_SENSORS_LIST_MSGSET 0x66 @@ -9127,15 +10514,13 @@ /***********************************/ /* MC_CMD_DYNAMIC_SENSORS_GET_DESCRIPTIONS * Get descriptions for a set of sensors, specified as an array of sensor - * handles as returned by MC_CMD_DYNAMIC_SENSORS_LIST - * - * Any handles which do not correspond to a sensor currently managed by the MC - * will be dropped from from the response. This may happen when a sensor table - * update is in progress, and effectively means the set of usable sensors is - * the intersection between the sets of sensors known to the driver and the MC. - * - * On Riverhead this command is implemented as a a wrapper for - * `get_descriptions` in the sensor_query SPHINX service. + * handles as returned by MC_CMD_DYNAMIC_SENSORS_LIST. Any handles which do not + * correspond to a sensor currently managed by the MC will be dropped from from + * the response. This may happen when a sensor table update is in progress, and + * effectively means the set of usable sensors is the intersection between the + * sets of sensors known to the driver and the MC. On Riverhead this command is + * implemented as a wrapper for `get_descriptions` in the sensor_query SPHINX + * service. */ #define MC_CMD_DYNAMIC_SENSORS_GET_DESCRIPTIONS 0x67 #define MC_CMD_DYNAMIC_SENSORS_GET_DESCRIPTIONS_MSGSET 0x67 @@ -9173,19 +10558,15 @@ /***********************************/ /* MC_CMD_DYNAMIC_SENSORS_GET_READINGS * Read the state and value for a set of sensors, specified as an array of - * sensor handles as returned by MC_CMD_DYNAMIC_SENSORS_LIST. - * - * In the case of a broken sensor, then the state of the response's - * MC_CMD_DYNAMIC_SENSORS_VALUE entry will be set to BROKEN, and any value - * provided should be treated as erroneous. - * - * Any handles which do not correspond to a sensor currently managed by the MC - * will be dropped from from the response. This may happen when a sensor table - * update is in progress, and effectively means the set of usable sensors is - * the intersection between the sets of sensors known to the driver and the MC. - * - * On Riverhead this command is implemented as a a wrapper for `get_readings` - * in the sensor_query SPHINX service. + * sensor handles as returned by MC_CMD_DYNAMIC_SENSORS_LIST. In the case of a + * broken sensor, then the state of the response's MC_CMD_DYNAMIC_SENSORS_VALUE + * entry will be set to BROKEN, and any value provided should be treated as + * erroneous. Any handles which do not correspond to a sensor currently managed + * by the MC will be dropped from from the response. This may happen when a + * sensor table update is in progress, and effectively means the set of usable + * sensors is the intersection between the sets of sensors known to the driver + * and the MC. On Riverhead this command is implemented as a wrapper for + * `get_readings` in the sensor_query SPHINX service. */ #define MC_CMD_DYNAMIC_SENSORS_GET_READINGS 0x68 #define MC_CMD_DYNAMIC_SENSORS_GET_READINGS_MSGSET 0x68 @@ -11629,6 +13010,9 @@ #define MC_CMD_FILTER_OP_IN_MATCH_FWDEF1_OFST 16 #define MC_CMD_FILTER_OP_IN_MATCH_FWDEF1_LBN 11 #define MC_CMD_FILTER_OP_IN_MATCH_FWDEF1_WIDTH 1 +#define MC_CMD_FILTER_OP_IN_MATCH_UNKNOWN_IPV4_MCAST_DST_OFST 16 +#define MC_CMD_FILTER_OP_IN_MATCH_UNKNOWN_IPV4_MCAST_DST_LBN 29 +#define MC_CMD_FILTER_OP_IN_MATCH_UNKNOWN_IPV4_MCAST_DST_WIDTH 1 #define MC_CMD_FILTER_OP_IN_MATCH_UNKNOWN_MCAST_DST_OFST 16 #define MC_CMD_FILTER_OP_IN_MATCH_UNKNOWN_MCAST_DST_LBN 30 #define MC_CMD_FILTER_OP_IN_MATCH_UNKNOWN_MCAST_DST_WIDTH 1 @@ -11833,6 +13217,9 @@ #define MC_CMD_FILTER_OP_EXT_IN_MATCH_IFRM_UNKNOWN_UCAST_DST_OFST 16 #define MC_CMD_FILTER_OP_EXT_IN_MATCH_IFRM_UNKNOWN_UCAST_DST_LBN 25 #define MC_CMD_FILTER_OP_EXT_IN_MATCH_IFRM_UNKNOWN_UCAST_DST_WIDTH 1 +#define MC_CMD_FILTER_OP_EXT_IN_MATCH_UNKNOWN_IPV4_MCAST_DST_OFST 16 +#define MC_CMD_FILTER_OP_EXT_IN_MATCH_UNKNOWN_IPV4_MCAST_DST_LBN 29 +#define MC_CMD_FILTER_OP_EXT_IN_MATCH_UNKNOWN_IPV4_MCAST_DST_WIDTH 1 #define MC_CMD_FILTER_OP_EXT_IN_MATCH_UNKNOWN_MCAST_DST_OFST 16 #define MC_CMD_FILTER_OP_EXT_IN_MATCH_UNKNOWN_MCAST_DST_LBN 30 #define MC_CMD_FILTER_OP_EXT_IN_MATCH_UNKNOWN_MCAST_DST_WIDTH 1 @@ -12118,6 +13505,9 @@ #define MC_CMD_FILTER_OP_V3_IN_MATCH_IFRM_UNKNOWN_UCAST_DST_OFST 16 #define MC_CMD_FILTER_OP_V3_IN_MATCH_IFRM_UNKNOWN_UCAST_DST_LBN 25 #define MC_CMD_FILTER_OP_V3_IN_MATCH_IFRM_UNKNOWN_UCAST_DST_WIDTH 1 +#define MC_CMD_FILTER_OP_V3_IN_MATCH_UNKNOWN_IPV4_MCAST_DST_OFST 16 +#define MC_CMD_FILTER_OP_V3_IN_MATCH_UNKNOWN_IPV4_MCAST_DST_LBN 29 +#define MC_CMD_FILTER_OP_V3_IN_MATCH_UNKNOWN_IPV4_MCAST_DST_WIDTH 1 #define MC_CMD_FILTER_OP_V3_IN_MATCH_UNKNOWN_MCAST_DST_OFST 16 #define MC_CMD_FILTER_OP_V3_IN_MATCH_UNKNOWN_MCAST_DST_LBN 30 #define MC_CMD_FILTER_OP_V3_IN_MATCH_UNKNOWN_MCAST_DST_WIDTH 1 @@ -12663,6 +14053,7 @@ #define MC_CMD_PARSER_DISP_RW_OUT_PORT_DP_MAPPING_OFST 0 #define MC_CMD_PARSER_DISP_RW_OUT_PORT_DP_MAPPING_LEN 4 #define MC_CMD_PARSER_DISP_RW_OUT_PORT_DP_MAPPING_NUM 4 +/* enum property: bitmask */ #define MC_CMD_PARSER_DISP_RW_OUT_DP0 0x1 /* enum */ #define MC_CMD_PARSER_DISP_RW_OUT_DP1 0x2 /* enum */ @@ -13511,10 +14902,9 @@ /***********************************/ /* MC_CMD_GET_CAPABILITIES - * Get device capabilities. - * - * This is supplementary to the MC_CMD_GET_BOARD_CFG command, and intended to - * reference inherent device capabilities as opposed to current NVRAM config. + * Get device capabilities. This is supplementary to the MC_CMD_GET_BOARD_CFG + * command, and intended to reference inherent device capabilities as opposed + * to current NVRAM config. */ #define MC_CMD_GET_CAPABILITIES 0xbe #define MC_CMD_GET_CAPABILITIES_MSGSET 0xbe @@ -16473,6 +17863,15 @@ #define MC_CMD_GET_CAPABILITIES_V7_OUT_RSS_STEER_ON_OUTER_SUPPORTED_OFST 148 #define MC_CMD_GET_CAPABILITIES_V7_OUT_RSS_STEER_ON_OUTER_SUPPORTED_LBN 12 #define MC_CMD_GET_CAPABILITIES_V7_OUT_RSS_STEER_ON_OUTER_SUPPORTED_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_V7_OUT_MAE_ACTION_SET_ALLOC_V3_SUPPORTED_OFST 148 +#define MC_CMD_GET_CAPABILITIES_V7_OUT_MAE_ACTION_SET_ALLOC_V3_SUPPORTED_LBN 13 +#define MC_CMD_GET_CAPABILITIES_V7_OUT_MAE_ACTION_SET_ALLOC_V3_SUPPORTED_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_V7_OUT_DYNAMIC_MPORT_JOURNAL_OFST 148 +#define MC_CMD_GET_CAPABILITIES_V7_OUT_DYNAMIC_MPORT_JOURNAL_LBN 14 +#define MC_CMD_GET_CAPABILITIES_V7_OUT_DYNAMIC_MPORT_JOURNAL_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_V7_OUT_CLIENT_CMD_VF_PROXY_OFST 148 +#define MC_CMD_GET_CAPABILITIES_V7_OUT_CLIENT_CMD_VF_PROXY_LBN 15 +#define MC_CMD_GET_CAPABILITIES_V7_OUT_CLIENT_CMD_VF_PROXY_WIDTH 1 /* MC_CMD_GET_CAPABILITIES_V8_OUT msgresponse */ #define MC_CMD_GET_CAPABILITIES_V8_OUT_LEN 160 @@ -16974,6 +18373,15 @@ #define MC_CMD_GET_CAPABILITIES_V8_OUT_RSS_STEER_ON_OUTER_SUPPORTED_OFST 148 #define MC_CMD_GET_CAPABILITIES_V8_OUT_RSS_STEER_ON_OUTER_SUPPORTED_LBN 12 #define MC_CMD_GET_CAPABILITIES_V8_OUT_RSS_STEER_ON_OUTER_SUPPORTED_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_V8_OUT_MAE_ACTION_SET_ALLOC_V3_SUPPORTED_OFST 148 +#define MC_CMD_GET_CAPABILITIES_V8_OUT_MAE_ACTION_SET_ALLOC_V3_SUPPORTED_LBN 13 +#define MC_CMD_GET_CAPABILITIES_V8_OUT_MAE_ACTION_SET_ALLOC_V3_SUPPORTED_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_V8_OUT_DYNAMIC_MPORT_JOURNAL_OFST 148 +#define MC_CMD_GET_CAPABILITIES_V8_OUT_DYNAMIC_MPORT_JOURNAL_LBN 14 +#define MC_CMD_GET_CAPABILITIES_V8_OUT_DYNAMIC_MPORT_JOURNAL_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_V8_OUT_CLIENT_CMD_VF_PROXY_OFST 148 +#define MC_CMD_GET_CAPABILITIES_V8_OUT_CLIENT_CMD_VF_PROXY_LBN 15 +#define MC_CMD_GET_CAPABILITIES_V8_OUT_CLIENT_CMD_VF_PROXY_WIDTH 1 /* These bits are reserved for communicating test-specific capabilities to * host-side test software. All production drivers should treat this field as * opaque. @@ -17489,6 +18897,15 @@ #define MC_CMD_GET_CAPABILITIES_V9_OUT_RSS_STEER_ON_OUTER_SUPPORTED_OFST 148 #define MC_CMD_GET_CAPABILITIES_V9_OUT_RSS_STEER_ON_OUTER_SUPPORTED_LBN 12 #define MC_CMD_GET_CAPABILITIES_V9_OUT_RSS_STEER_ON_OUTER_SUPPORTED_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_V9_OUT_MAE_ACTION_SET_ALLOC_V3_SUPPORTED_OFST 148 +#define MC_CMD_GET_CAPABILITIES_V9_OUT_MAE_ACTION_SET_ALLOC_V3_SUPPORTED_LBN 13 +#define MC_CMD_GET_CAPABILITIES_V9_OUT_MAE_ACTION_SET_ALLOC_V3_SUPPORTED_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_V9_OUT_DYNAMIC_MPORT_JOURNAL_OFST 148 +#define MC_CMD_GET_CAPABILITIES_V9_OUT_DYNAMIC_MPORT_JOURNAL_LBN 14 +#define MC_CMD_GET_CAPABILITIES_V9_OUT_DYNAMIC_MPORT_JOURNAL_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_V9_OUT_CLIENT_CMD_VF_PROXY_OFST 148 +#define MC_CMD_GET_CAPABILITIES_V9_OUT_CLIENT_CMD_VF_PROXY_LBN 15 +#define MC_CMD_GET_CAPABILITIES_V9_OUT_CLIENT_CMD_VF_PROXY_WIDTH 1 /* These bits are reserved for communicating test-specific capabilities to * host-side test software. All production drivers should treat this field as * opaque. @@ -18039,6 +19456,15 @@ #define MC_CMD_GET_CAPABILITIES_V10_OUT_RSS_STEER_ON_OUTER_SUPPORTED_OFST 148 #define MC_CMD_GET_CAPABILITIES_V10_OUT_RSS_STEER_ON_OUTER_SUPPORTED_LBN 12 #define MC_CMD_GET_CAPABILITIES_V10_OUT_RSS_STEER_ON_OUTER_SUPPORTED_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_V10_OUT_MAE_ACTION_SET_ALLOC_V3_SUPPORTED_OFST 148 +#define MC_CMD_GET_CAPABILITIES_V10_OUT_MAE_ACTION_SET_ALLOC_V3_SUPPORTED_LBN 13 +#define MC_CMD_GET_CAPABILITIES_V10_OUT_MAE_ACTION_SET_ALLOC_V3_SUPPORTED_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_V10_OUT_DYNAMIC_MPORT_JOURNAL_OFST 148 +#define MC_CMD_GET_CAPABILITIES_V10_OUT_DYNAMIC_MPORT_JOURNAL_LBN 14 +#define MC_CMD_GET_CAPABILITIES_V10_OUT_DYNAMIC_MPORT_JOURNAL_WIDTH 1 +#define MC_CMD_GET_CAPABILITIES_V10_OUT_CLIENT_CMD_VF_PROXY_OFST 148 +#define MC_CMD_GET_CAPABILITIES_V10_OUT_CLIENT_CMD_VF_PROXY_LBN 15 +#define MC_CMD_GET_CAPABILITIES_V10_OUT_CLIENT_CMD_VF_PROXY_WIDTH 1 /* These bits are reserved for communicating test-specific capabilities to * host-side test software. All production drivers should treat this field as * opaque. @@ -18134,6 +19560,13 @@ * are not defined. */ #define MC_CMD_V2_EXTN_IN_MCDI_MESSAGE_TYPE_TSA 0x1 +/* enum: MCDI command used for platform management. Typically, these commands + * are used for low-level operations directed at the platform as a whole (e.g. + * MMIO device enumeration) rather than individual functions and use a + * dedicated comms channel (e.g. RPmsg/IPI). May be handled by the same or + * different CPU as MCDI_MESSAGE_TYPE_MC. + */ +#define MC_CMD_V2_EXTN_IN_MCDI_MESSAGE_TYPE_PLATFORM 0x2 /***********************************/ @@ -22051,8 +23484,8 @@ * TLV_PORT_MODE_*). A superset of MC_CMD_GET_PORT_MODES_OUT/MODES that * contains all modes implemented in firmware for a particular board. Modes * listed in MODES are considered production modes and should be exposed in - * userland tools. Modes listed in in ENGINEERING_MODES, but not in MODES - * should be considered hidden (not to be exposed in userland tools) and for + * userland tools. Modes listed in ENGINEERING_MODES, but not in MODES should + * be considered hidden (not to be exposed in userland tools) and for * engineering use only. There are no other semantic differences and any mode * listed in either MODES or ENGINEERING_MODES can be set on the board. */ @@ -26509,6 +27942,7 @@ #define MC_CMD_FPGA_OP_GET_MAC_STATS_OUT_STATISTICS_MINNUM 0 #define MC_CMD_FPGA_OP_GET_MAC_STATS_OUT_STATISTICS_MAXNUM 31 #define MC_CMD_FPGA_OP_GET_MAC_STATS_OUT_STATISTICS_MAXNUM_MCDI2 127 +/* enum property: index */ #define MC_CMD_FPGA_MAC_TX_TOTAL_PACKETS 0x0 /* enum */ #define MC_CMD_FPGA_MAC_TX_TOTAL_BYTES 0x1 /* enum */ #define MC_CMD_FPGA_MAC_TX_TOTAL_GOOD_PACKETS 0x2 /* enum */ @@ -26617,6 +28051,65 @@ /* MC_CMD_EXTERNAL_MAE_SET_LINK_MODE_OUT msgresponse */ #define MC_CMD_EXTERNAL_MAE_SET_LINK_MODE_OUT_LEN 0 + +/***********************************/ +/* MC_CMD_GET_BUFTBL_STATS + * Currently EF10 only. Read usage and limits for Buffer Table + */ +#define MC_CMD_GET_BUFTBL_STATS 0x6a +#define MC_CMD_GET_BUFTBL_STATS_MSGSET 0x6a +#undef MC_CMD_0x6a_PRIVILEGE_CTG + +#define MC_CMD_0x6a_PRIVILEGE_CTG SRIOV_CTG_GENERAL + +/* MC_CMD_GET_BUFTBL_STATS_IN msgrequest */ +#define MC_CMD_GET_BUFTBL_STATS_IN_LEN 0 + +/* MC_CMD_GET_BUFTBL_STATS_OUT msgresponse */ +#define MC_CMD_GET_BUFTBL_STATS_OUT_LEN 40 +/* number of buffer table entries per set */ +#define MC_CMD_GET_BUFTBL_STATS_OUT_BUFTBL_ENTRIES_PER_SET_OFST 0 +#define MC_CMD_GET_BUFTBL_STATS_OUT_BUFTBL_ENTRIES_PER_SET_LEN 4 +/* number of buffer table entries per cluster */ +#define MC_CMD_GET_BUFTBL_STATS_OUT_BUFTBL_ENTRIES_PER_CLUSTER_OFST 4 +#define MC_CMD_GET_BUFTBL_STATS_OUT_BUFTBL_ENTRIES_PER_CLUSTER_LEN 4 +/* Maximum size buffer table can grow to, in clusters. On EF10, this can + * potentially vary depending on the size of the Descriptor Cache. + */ +#define MC_CMD_GET_BUFTBL_STATS_OUT_BUFTBL_MAX_CLUSTERS_OFST 8 +#define MC_CMD_GET_BUFTBL_STATS_OUT_BUFTBL_MAX_CLUSTERS_LEN 4 +/* High water mark for number of buffer table clusters which have been + * allocated. + */ +#define MC_CMD_GET_BUFTBL_STATS_OUT_BUFTBL_HIGH_WATER_CLUSTERS_OFST 12 +#define MC_CMD_GET_BUFTBL_STATS_OUT_BUFTBL_HIGH_WATER_CLUSTERS_LEN 4 +/* Number of free buffer table clusters on the free cluster list. */ +#define MC_CMD_GET_BUFTBL_STATS_OUT_BUFTBL_FREE_CLUSTERS_OFST 16 +#define MC_CMD_GET_BUFTBL_STATS_OUT_BUFTBL_FREE_CLUSTERS_LEN 4 +/* Number of free buffer table sets on the free set list. */ +#define MC_CMD_GET_BUFTBL_STATS_OUT_BUFTBL_FREE_SETS_OFST 20 +#define MC_CMD_GET_BUFTBL_STATS_OUT_BUFTBL_FREE_SETS_LEN 4 +/* Number of chunks of fully-used clusters allocated to the MC for EVQ, RXQ and + * TXQs. + */ +#define MC_CMD_GET_BUFTBL_STATS_OUT_BUFTBL_MC_FULL_CLUSTERS_OFST 24 +#define MC_CMD_GET_BUFTBL_STATS_OUT_BUFTBL_MC_FULL_CLUSTERS_LEN 4 +/* Number of chunks in partially-used clusters allocated to the MC for EVQ, RXQ + * and TXQs. + */ +#define MC_CMD_GET_BUFTBL_STATS_OUT_BUFTBL_MC_PART_CLUSTERS_OFST 28 +#define MC_CMD_GET_BUFTBL_STATS_OUT_BUFTBL_MC_PART_CLUSTERS_LEN 4 +/* Number of buffer table sets (chunks) allocated to the host via + * MC_CMD_ALLOC_BUFTBL_CHUNK. + */ +#define MC_CMD_GET_BUFTBL_STATS_OUT_BUFTBL_HOST_SETS_OFST 32 +#define MC_CMD_GET_BUFTBL_STATS_OUT_BUFTBL_HOST_SETS_LEN 4 +/* Maximum number of VIs per NIC. On EF10 this is the current value as used to + * size the Descriptor Cache in hardware. + */ +#define MC_CMD_GET_BUFTBL_STATS_OUT_VI_MAX_OFST 36 +#define MC_CMD_GET_BUFTBL_STATS_OUT_VI_MAX_LEN 4 + /* CLIENT_HANDLE structuredef: A client is an abstract entity that can make * requests of the device and that can own resources managed by the device. * Examples of clients include PCIe functions and dynamic clients. A client @@ -26684,8 +28177,8 @@ /* SCHED_CREDIT_CHECK_RESULT structuredef */ #define SCHED_CREDIT_CHECK_RESULT_LEN 16 -/* The instance of the scheduler. Refer to XN-200389-AW for the location of - * these schedulers in the hardware. +/* The instance of the scheduler. Refer to XN-200389-AW (snic/hnic) and + * XN-200425-TC (cdx) for the location of these schedulers in the hardware. */ #define SCHED_CREDIT_CHECK_RESULT_SCHED_INSTANCE_OFST 0 #define SCHED_CREDIT_CHECK_RESULT_SCHED_INSTANCE_LEN 1 @@ -26697,6 +28190,18 @@ #define SCHED_CREDIT_CHECK_RESULT_HUB_HOST_D 0x5 /* enum */ #define SCHED_CREDIT_CHECK_RESULT_HUB_REPLAY 0x6 /* enum */ #define SCHED_CREDIT_CHECK_RESULT_DMAC_H2C 0x7 /* enum */ +#define SCHED_CREDIT_CHECK_RESULT_HUB_NET_B 0x8 /* enum */ +#define SCHED_CREDIT_CHECK_RESULT_HUB_NET_REPLAY 0x9 /* enum */ +#define SCHED_CREDIT_CHECK_RESULT_ADAPTER_C2H_C 0xa /* enum */ +#define SCHED_CREDIT_CHECK_RESULT_A2_H2C_C 0xb /* enum */ +#define SCHED_CREDIT_CHECK_RESULT_A3_SOFT_ADAPTOR_C 0xc /* enum */ +#define SCHED_CREDIT_CHECK_RESULT_A4_DPU_WRITE_C 0xd /* enum */ +#define SCHED_CREDIT_CHECK_RESULT_JRC_RRU 0xe /* enum */ +#define SCHED_CREDIT_CHECK_RESULT_CDM_SINK 0xf /* enum */ +#define SCHED_CREDIT_CHECK_RESULT_PCIE_SINK 0x10 /* enum */ +#define SCHED_CREDIT_CHECK_RESULT_UPORT_SINK 0x11 /* enum */ +#define SCHED_CREDIT_CHECK_RESULT_PSX_SINK 0x12 /* enum */ +#define SCHED_CREDIT_CHECK_RESULT_A5_DPU_READ_C 0x13 /* enum */ #define SCHED_CREDIT_CHECK_RESULT_SCHED_INSTANCE_LBN 0 #define SCHED_CREDIT_CHECK_RESULT_SCHED_INSTANCE_WIDTH 8 /* The type of node that this result refers to. */ @@ -26706,6 +28211,10 @@ #define SCHED_CREDIT_CHECK_RESULT_DEST 0x0 /* enum: Source node */ #define SCHED_CREDIT_CHECK_RESULT_SOURCE 0x1 +/* enum: Destination node credit type 1 (new to the Keystone schedulers, see + * SF-120268-TC) + */ +#define SCHED_CREDIT_CHECK_RESULT_DEST_CREDIT1 0x2 #define SCHED_CREDIT_CHECK_RESULT_NODE_TYPE_LBN 8 #define SCHED_CREDIT_CHECK_RESULT_NODE_TYPE_WIDTH 8 /* Level of node in scheduler hierarchy (level 0 is the bottom of the @@ -27813,6 +29322,51 @@ #define MC_CMD_CHECK_SCHEDULER_CREDITS_OUT_RESULTS_MAXNUM 14 #define MC_CMD_CHECK_SCHEDULER_CREDITS_OUT_RESULTS_MAXNUM_MCDI2 62 + +/***********************************/ +/* MC_CMD_TXQ_STATS + * Query per-TXQ statistics. + */ +#define MC_CMD_TXQ_STATS 0x1d5 +#define MC_CMD_TXQ_STATS_MSGSET 0x1d5 +#undef MC_CMD_0x1d5_PRIVILEGE_CTG + +#define MC_CMD_0x1d5_PRIVILEGE_CTG SRIOV_CTG_GENERAL + +/* MC_CMD_TXQ_STATS_IN msgrequest */ +#define MC_CMD_TXQ_STATS_IN_LEN 8 +/* Instance of TXQ to retrieve statistics for */ +#define MC_CMD_TXQ_STATS_IN_INSTANCE_OFST 0 +#define MC_CMD_TXQ_STATS_IN_INSTANCE_LEN 4 +/* Flags for the request */ +#define MC_CMD_TXQ_STATS_IN_FLAGS_OFST 4 +#define MC_CMD_TXQ_STATS_IN_FLAGS_LEN 4 +#define MC_CMD_TXQ_STATS_IN_CLEAR_OFST 4 +#define MC_CMD_TXQ_STATS_IN_CLEAR_LBN 0 +#define MC_CMD_TXQ_STATS_IN_CLEAR_WIDTH 1 + +/* MC_CMD_TXQ_STATS_OUT msgresponse */ +#define MC_CMD_TXQ_STATS_OUT_LENMIN 0 +#define MC_CMD_TXQ_STATS_OUT_LENMAX 248 +#define MC_CMD_TXQ_STATS_OUT_LENMAX_MCDI2 1016 +#define MC_CMD_TXQ_STATS_OUT_LEN(num) (0+8*(num)) +#define MC_CMD_TXQ_STATS_OUT_STATISTICS_NUM(len) (((len)-0)/8) +#define MC_CMD_TXQ_STATS_OUT_STATISTICS_OFST 0 +#define MC_CMD_TXQ_STATS_OUT_STATISTICS_LEN 8 +#define MC_CMD_TXQ_STATS_OUT_STATISTICS_LO_OFST 0 +#define MC_CMD_TXQ_STATS_OUT_STATISTICS_LO_LEN 4 +#define MC_CMD_TXQ_STATS_OUT_STATISTICS_LO_LBN 0 +#define MC_CMD_TXQ_STATS_OUT_STATISTICS_LO_WIDTH 32 +#define MC_CMD_TXQ_STATS_OUT_STATISTICS_HI_OFST 4 +#define MC_CMD_TXQ_STATS_OUT_STATISTICS_HI_LEN 4 +#define MC_CMD_TXQ_STATS_OUT_STATISTICS_HI_LBN 32 +#define MC_CMD_TXQ_STATS_OUT_STATISTICS_HI_WIDTH 32 +#define MC_CMD_TXQ_STATS_OUT_STATISTICS_MINNUM 0 +#define MC_CMD_TXQ_STATS_OUT_STATISTICS_MAXNUM 31 +#define MC_CMD_TXQ_STATS_OUT_STATISTICS_MAXNUM_MCDI2 127 +/* enum property: index */ +#define MC_CMD_TXQ_STATS_CTPIO_MAX_FILL 0x0 /* enum */ + /* FUNCTION_PERSONALITY structuredef: The meanings of the personalities are * defined in SF-120734-TC with more information in SF-122717-TC. */ @@ -28296,6 +29850,7 @@ #define MC_CMD_DESC_PROXY_FUNC_CREATE_IN_FUNC_HI_LEN 4 #define MC_CMD_DESC_PROXY_FUNC_CREATE_IN_FUNC_HI_LBN 32 #define MC_CMD_DESC_PROXY_FUNC_CREATE_IN_FUNC_HI_WIDTH 32 +/* See structuredef: PCIE_FUNCTION */ #define MC_CMD_DESC_PROXY_FUNC_CREATE_IN_FUNC_PF_OFST 0 #define MC_CMD_DESC_PROXY_FUNC_CREATE_IN_FUNC_PF_LEN 2 #define MC_CMD_DESC_PROXY_FUNC_CREATE_IN_FUNC_VF_OFST 2 @@ -28332,6 +29887,7 @@ #define MC_CMD_DESC_PROXY_FUNC_CREATE_OUT_FUNC_HI_LEN 4 #define MC_CMD_DESC_PROXY_FUNC_CREATE_OUT_FUNC_HI_LBN 64 #define MC_CMD_DESC_PROXY_FUNC_CREATE_OUT_FUNC_HI_WIDTH 32 +/* See structuredef: PCIE_FUNCTION */ #define MC_CMD_DESC_PROXY_FUNC_CREATE_OUT_FUNC_PF_OFST 4 #define MC_CMD_DESC_PROXY_FUNC_CREATE_OUT_FUNC_PF_LEN 2 #define MC_CMD_DESC_PROXY_FUNC_CREATE_OUT_FUNC_VF_OFST 6 @@ -28709,6 +30265,7 @@ #define MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_FUNC_HI_LEN 4 #define MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_FUNC_HI_LBN 64 #define MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_FUNC_HI_WIDTH 32 +/* See structuredef: PCIE_FUNCTION */ #define MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_FUNC_PF_OFST 4 #define MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_FUNC_PF_LEN 2 #define MC_CMD_DESC_PROXY_FUNC_OPEN_OUT_FUNC_VF_OFST 6 @@ -28788,6 +30345,7 @@ #define DESC_PROXY_FUNC_MAP_FUNC_HI_WIDTH 32 #define DESC_PROXY_FUNC_MAP_FUNC_LBN 0 #define DESC_PROXY_FUNC_MAP_FUNC_WIDTH 64 +/* See structuredef: PCIE_FUNCTION */ #define DESC_PROXY_FUNC_MAP_FUNC_PF_OFST 0 #define DESC_PROXY_FUNC_MAP_FUNC_PF_LEN 2 #define DESC_PROXY_FUNC_MAP_FUNC_PF_LBN 0 @@ -28851,6 +30409,27 @@ #define MC_CMD_DESC_PROXY_FUNC_ENUM_OUT_FUNC_MAP_MINNUM 0 #define MC_CMD_DESC_PROXY_FUNC_ENUM_OUT_FUNC_MAP_MAXNUM 4 #define MC_CMD_DESC_PROXY_FUNC_ENUM_OUT_FUNC_MAP_MAXNUM_MCDI2 19 +/* See structuredef: DESC_PROXY_FUNC_MAP */ +#define MC_CMD_DESC_PROXY_FUNC_ENUM_OUT_FUNC_MAP_FUNC_OFST 4 +#define MC_CMD_DESC_PROXY_FUNC_ENUM_OUT_FUNC_MAP_FUNC_LEN 8 +#define MC_CMD_DESC_PROXY_FUNC_ENUM_OUT_FUNC_MAP_FUNC_LO_OFST 4 +#define MC_CMD_DESC_PROXY_FUNC_ENUM_OUT_FUNC_MAP_FUNC_LO_LEN 4 +#define MC_CMD_DESC_PROXY_FUNC_ENUM_OUT_FUNC_MAP_FUNC_LO_LBN 32 +#define MC_CMD_DESC_PROXY_FUNC_ENUM_OUT_FUNC_MAP_FUNC_LO_WIDTH 32 +#define MC_CMD_DESC_PROXY_FUNC_ENUM_OUT_FUNC_MAP_FUNC_HI_OFST 8 +#define MC_CMD_DESC_PROXY_FUNC_ENUM_OUT_FUNC_MAP_FUNC_HI_LEN 4 +#define MC_CMD_DESC_PROXY_FUNC_ENUM_OUT_FUNC_MAP_FUNC_HI_LBN 64 +#define MC_CMD_DESC_PROXY_FUNC_ENUM_OUT_FUNC_MAP_FUNC_HI_WIDTH 32 +#define MC_CMD_DESC_PROXY_FUNC_ENUM_OUT_FUNC_MAP_FUNC_PF_OFST 4 +#define MC_CMD_DESC_PROXY_FUNC_ENUM_OUT_FUNC_MAP_FUNC_PF_LEN 2 +#define MC_CMD_DESC_PROXY_FUNC_ENUM_OUT_FUNC_MAP_FUNC_VF_OFST 6 +#define MC_CMD_DESC_PROXY_FUNC_ENUM_OUT_FUNC_MAP_FUNC_VF_LEN 2 +#define MC_CMD_DESC_PROXY_FUNC_ENUM_OUT_FUNC_MAP_FUNC_INTF_OFST 8 +#define MC_CMD_DESC_PROXY_FUNC_ENUM_OUT_FUNC_MAP_FUNC_INTF_LEN 4 +#define MC_CMD_DESC_PROXY_FUNC_ENUM_OUT_FUNC_MAP_PERSONALITY_OFST 12 +#define MC_CMD_DESC_PROXY_FUNC_ENUM_OUT_FUNC_MAP_PERSONALITY_LEN 4 +#define MC_CMD_DESC_PROXY_FUNC_ENUM_OUT_FUNC_MAP_LABEL_OFST 16 +#define MC_CMD_DESC_PROXY_FUNC_ENUM_OUT_FUNC_MAP_LABEL_LEN 40 /***********************************/ @@ -29015,6 +30594,7 @@ #define MC_CMD_DESC_PROXY_FUNC_GET_VI_INFO_OUT_VI_MAP_MINNUM 0 #define MC_CMD_DESC_PROXY_FUNC_GET_VI_INFO_OUT_VI_MAP_MAXNUM 63 #define MC_CMD_DESC_PROXY_FUNC_GET_VI_INFO_OUT_VI_MAP_MAXNUM_MCDI2 255 +/* See structuredef: QUEUE_ID */ #define MC_CMD_DESC_PROXY_FUNC_GET_VI_INFO_OUT_VI_MAP_ABS_VI_OFST 0 #define MC_CMD_DESC_PROXY_FUNC_GET_VI_INFO_OUT_VI_MAP_ABS_VI_LEN 2 #define MC_CMD_DESC_PROXY_FUNC_GET_VI_INFO_OUT_VI_MAP_REL_QUEUE_LBN 16 @@ -29082,6 +30662,7 @@ #define MC_CMD_GET_ADDR_SPC_ID_IN_FUNC_HI_LEN 4 #define MC_CMD_GET_ADDR_SPC_ID_IN_FUNC_HI_LBN 64 #define MC_CMD_GET_ADDR_SPC_ID_IN_FUNC_HI_WIDTH 32 +/* See structuredef: PCIE_FUNCTION */ #define MC_CMD_GET_ADDR_SPC_ID_IN_FUNC_PF_OFST 4 #define MC_CMD_GET_ADDR_SPC_ID_IN_FUNC_PF_LEN 2 #define MC_CMD_GET_ADDR_SPC_ID_IN_FUNC_VF_OFST 6 @@ -29162,6 +30743,7 @@ * backwards compatibility only, callers should use PCIE_INTERFACE_CALLER. */ #define MC_CMD_GET_CLIENT_HANDLE_IN_PCIE_FUNCTION_INTF_NULL 0xffffffff +/* See structuredef: PCIE_FUNCTION */ #define MC_CMD_GET_CLIENT_HANDLE_IN_FUNC_PF_OFST 4 #define MC_CMD_GET_CLIENT_HANDLE_IN_FUNC_PF_LEN 2 #define MC_CMD_GET_CLIENT_HANDLE_IN_FUNC_VF_OFST 6 @@ -29320,6 +30902,7 @@ #define MAE_ENC_FIELD_PAIRS_ENC_IP_TTL_MASK_LEN 1 #define MAE_ENC_FIELD_PAIRS_ENC_IP_TTL_MASK_LBN 1096 #define MAE_ENC_FIELD_PAIRS_ENC_IP_TTL_MASK_WIDTH 8 +/* Deprecated in favour of ENC_FLAGS alias. */ #define MAE_ENC_FIELD_PAIRS_ENC_VLAN_FLAGS_OFST 138 #define MAE_ENC_FIELD_PAIRS_ENC_VLAN_FLAGS_LEN 1 #define MAE_ENC_FIELD_PAIRS_ENC_HAS_OVLAN_OFST 138 @@ -29333,10 +30916,12 @@ #define MAE_ENC_FIELD_PAIRS_ENC_IP_FRAG_WIDTH 1 #define MAE_ENC_FIELD_PAIRS_ENC_VLAN_FLAGS_LBN 1104 #define MAE_ENC_FIELD_PAIRS_ENC_VLAN_FLAGS_WIDTH 8 +/* More generic alias for ENC_VLAN_FLAGS. */ #define MAE_ENC_FIELD_PAIRS_ENC_FLAGS_OFST 138 #define MAE_ENC_FIELD_PAIRS_ENC_FLAGS_LEN 1 #define MAE_ENC_FIELD_PAIRS_ENC_FLAGS_LBN 1104 #define MAE_ENC_FIELD_PAIRS_ENC_FLAGS_WIDTH 8 +/* Deprecated in favour of ENC_FLAGS_MASK alias. */ #define MAE_ENC_FIELD_PAIRS_ENC_VLAN_FLAGS_MASK_OFST 139 #define MAE_ENC_FIELD_PAIRS_ENC_VLAN_FLAGS_MASK_LEN 1 #define MAE_ENC_FIELD_PAIRS_ENC_HAS_OVLAN_MASK_OFST 139 @@ -29350,6 +30935,7 @@ #define MAE_ENC_FIELD_PAIRS_ENC_IP_FRAG_MASK_WIDTH 1 #define MAE_ENC_FIELD_PAIRS_ENC_VLAN_FLAGS_MASK_LBN 1112 #define MAE_ENC_FIELD_PAIRS_ENC_VLAN_FLAGS_MASK_WIDTH 8 +/* More generic alias for ENC_FLAGS_MASK. */ #define MAE_ENC_FIELD_PAIRS_ENC_FLAGS_MASK_OFST 139 #define MAE_ENC_FIELD_PAIRS_ENC_FLAGS_MASK_LEN 1 #define MAE_ENC_FIELD_PAIRS_ENC_FLAGS_MASK_LBN 1112 @@ -29503,6 +31089,10 @@ #define MAE_FIELD_MASK_VALUE_PAIRS_IP_TOS_MASK_LEN 1 #define MAE_FIELD_MASK_VALUE_PAIRS_IP_TOS_MASK_LBN 1144 #define MAE_FIELD_MASK_VALUE_PAIRS_IP_TOS_MASK_WIDTH 8 +/* Due to hardware limitations, firmware may return + * MC_CMD_ERR_EINVAL(BAD_IP_TTL) when attempting to match on an IP_TTL value + * other than 1. + */ #define MAE_FIELD_MASK_VALUE_PAIRS_IP_TTL_OFST 144 #define MAE_FIELD_MASK_VALUE_PAIRS_IP_TTL_LEN 1 #define MAE_FIELD_MASK_VALUE_PAIRS_IP_TTL_LBN 1152 @@ -29826,6 +31416,10 @@ #define MAE_FIELD_MASK_VALUE_PAIRS_V2_IP_TOS_MASK_LEN 1 #define MAE_FIELD_MASK_VALUE_PAIRS_V2_IP_TOS_MASK_LBN 1144 #define MAE_FIELD_MASK_VALUE_PAIRS_V2_IP_TOS_MASK_WIDTH 8 +/* Due to hardware limitations, firmware may return + * MC_CMD_ERR_EINVAL(BAD_IP_TTL) when attempting to match on an IP_TTL value + * other than 1. + */ #define MAE_FIELD_MASK_VALUE_PAIRS_V2_IP_TTL_OFST 144 #define MAE_FIELD_MASK_VALUE_PAIRS_V2_IP_TTL_LEN 1 #define MAE_FIELD_MASK_VALUE_PAIRS_V2_IP_TTL_LBN 1152 @@ -30120,7 +31714,7 @@ /* MAE_MPORT_SELECTOR structuredef: MPORTS are identified by an opaque unsigned * integer value (mport_id) that is guaranteed to be representable within * 32-bits or within any NIC interface field that needs store the value - * (whichever is narrowers). This selector structure provides a stable way to + * (whichever is narrower). This selector structure provides a stable way to * refer to m-ports. */ #define MAE_MPORT_SELECTOR_LEN 4 @@ -30195,10 +31789,22 @@ #define MAE_MPORT_SELECTOR_FLAT_WIDTH 32 /* MAE_LINK_ENDPOINT_SELECTOR structuredef: Structure that identifies a real or - * virtual network port by MAE port and link end + * virtual network port by MAE port and link end. Intended to be used by + * network port MCDI commands. Setting FLAT to MAE_LINK_ENDPOINT_COMPAT is + * equivalent to using the previous version of the command. Not all possible + * combinations of MPORT_END and MPORT_SELECTOR in MAE_LINK_ENDPOINT_SELECTOR + * will work in all circumstances. 1. Some will always work (e.g. a VF can + * always address its logical MAC using MPORT_SELECTOR=ASSIGNED,LINK_END=VNIC), + * 2. Some are not meaningful and will always fail with EINVAL (e.g. attempting + * to address the VNIC end of a link to a physical port), 3. Some are + * meaningful but require the MCDI client to have the required permission and + * fail with EPERM otherwise (e.g. trying to set the MAC on a VF the caller + * cannot administer), and 4. Some could be implementation-specific and fail + * with ENOTSUP if not available (no examples exist right now). See + * SF-123581-TC section 4.3 for more details. */ #define MAE_LINK_ENDPOINT_SELECTOR_LEN 8 -/* The MAE MPORT of interest */ +/* Identifier for the MAE MPORT of interest */ #define MAE_LINK_ENDPOINT_SELECTOR_MPORT_SELECTOR_OFST 0 #define MAE_LINK_ENDPOINT_SELECTOR_MPORT_SELECTOR_LEN 4 #define MAE_LINK_ENDPOINT_SELECTOR_MPORT_SELECTOR_LBN 0 @@ -30395,6 +32001,90 @@ #define MC_CMD_MAE_GET_CAPS_V2_OUT_CT_COUNTERS_OFST 56 #define MC_CMD_MAE_GET_CAPS_V2_OUT_CT_COUNTERS_LEN 4 +/* MC_CMD_MAE_GET_CAPS_V3_OUT msgresponse */ +#define MC_CMD_MAE_GET_CAPS_V3_OUT_LEN 64 +/* The number of field IDs that the NIC supports. Any field with a ID greater + * than or equal to the value returned in this field must be treated as having + * a support level of MAE_FIELD_UNSUPPORTED in all requests. + */ +#define MC_CMD_MAE_GET_CAPS_V3_OUT_MATCH_FIELD_COUNT_OFST 0 +#define MC_CMD_MAE_GET_CAPS_V3_OUT_MATCH_FIELD_COUNT_LEN 4 +#define MC_CMD_MAE_GET_CAPS_V3_OUT_ENCAP_TYPES_SUPPORTED_OFST 4 +#define MC_CMD_MAE_GET_CAPS_V3_OUT_ENCAP_TYPES_SUPPORTED_LEN 4 +#define MC_CMD_MAE_GET_CAPS_V3_OUT_ENCAP_TYPE_VXLAN_OFST 4 +#define MC_CMD_MAE_GET_CAPS_V3_OUT_ENCAP_TYPE_VXLAN_LBN 0 +#define MC_CMD_MAE_GET_CAPS_V3_OUT_ENCAP_TYPE_VXLAN_WIDTH 1 +#define MC_CMD_MAE_GET_CAPS_V3_OUT_ENCAP_TYPE_NVGRE_OFST 4 +#define MC_CMD_MAE_GET_CAPS_V3_OUT_ENCAP_TYPE_NVGRE_LBN 1 +#define MC_CMD_MAE_GET_CAPS_V3_OUT_ENCAP_TYPE_NVGRE_WIDTH 1 +#define MC_CMD_MAE_GET_CAPS_V3_OUT_ENCAP_TYPE_GENEVE_OFST 4 +#define MC_CMD_MAE_GET_CAPS_V3_OUT_ENCAP_TYPE_GENEVE_LBN 2 +#define MC_CMD_MAE_GET_CAPS_V3_OUT_ENCAP_TYPE_GENEVE_WIDTH 1 +#define MC_CMD_MAE_GET_CAPS_V3_OUT_ENCAP_TYPE_L2GRE_OFST 4 +#define MC_CMD_MAE_GET_CAPS_V3_OUT_ENCAP_TYPE_L2GRE_LBN 3 +#define MC_CMD_MAE_GET_CAPS_V3_OUT_ENCAP_TYPE_L2GRE_WIDTH 1 +/* Deprecated alias for AR_COUNTERS. */ +#define MC_CMD_MAE_GET_CAPS_V3_OUT_COUNTERS_OFST 8 +#define MC_CMD_MAE_GET_CAPS_V3_OUT_COUNTERS_LEN 4 +/* The total number of AR counters available to allocate. */ +#define MC_CMD_MAE_GET_CAPS_V3_OUT_AR_COUNTERS_OFST 8 +#define MC_CMD_MAE_GET_CAPS_V3_OUT_AR_COUNTERS_LEN 4 +/* The total number of counters lists available to allocate. A value of zero + * indicates that counter lists are not supported by the NIC. (But single + * counters may still be.) + */ +#define MC_CMD_MAE_GET_CAPS_V3_OUT_COUNTER_LISTS_OFST 12 +#define MC_CMD_MAE_GET_CAPS_V3_OUT_COUNTER_LISTS_LEN 4 +/* The total number of encap header structures available to allocate. */ +#define MC_CMD_MAE_GET_CAPS_V3_OUT_ENCAP_HEADER_LIMIT_OFST 16 +#define MC_CMD_MAE_GET_CAPS_V3_OUT_ENCAP_HEADER_LIMIT_LEN 4 +/* Reserved. Should be zero. */ +#define MC_CMD_MAE_GET_CAPS_V3_OUT_RSVD_OFST 20 +#define MC_CMD_MAE_GET_CAPS_V3_OUT_RSVD_LEN 4 +/* The total number of action sets available to allocate. */ +#define MC_CMD_MAE_GET_CAPS_V3_OUT_ACTION_SETS_OFST 24 +#define MC_CMD_MAE_GET_CAPS_V3_OUT_ACTION_SETS_LEN 4 +/* The total number of action set lists available to allocate. */ +#define MC_CMD_MAE_GET_CAPS_V3_OUT_ACTION_SET_LISTS_OFST 28 +#define MC_CMD_MAE_GET_CAPS_V3_OUT_ACTION_SET_LISTS_LEN 4 +/* The total number of outer rules available to allocate. */ +#define MC_CMD_MAE_GET_CAPS_V3_OUT_OUTER_RULES_OFST 32 +#define MC_CMD_MAE_GET_CAPS_V3_OUT_OUTER_RULES_LEN 4 +/* The total number of action rules available to allocate. */ +#define MC_CMD_MAE_GET_CAPS_V3_OUT_ACTION_RULES_OFST 36 +#define MC_CMD_MAE_GET_CAPS_V3_OUT_ACTION_RULES_LEN 4 +/* The number of priorities available for ACTION_RULE filters. It is invalid to + * install a MATCH_ACTION filter with a priority number >= ACTION_PRIOS. + */ +#define MC_CMD_MAE_GET_CAPS_V3_OUT_ACTION_PRIOS_OFST 40 +#define MC_CMD_MAE_GET_CAPS_V3_OUT_ACTION_PRIOS_LEN 4 +/* The number of priorities available for OUTER_RULE filters. It is invalid to + * install an OUTER_RULE filter with a priority number >= OUTER_PRIOS. + */ +#define MC_CMD_MAE_GET_CAPS_V3_OUT_OUTER_PRIOS_OFST 44 +#define MC_CMD_MAE_GET_CAPS_V3_OUT_OUTER_PRIOS_LEN 4 +/* MAE API major version. Currently 1. If this field is not present in the + * response (i.e. response shorter than 384 bits), then its value is zero. If + * the value does not match the client's expectations, the client should raise + * a fatal error. + */ +#define MC_CMD_MAE_GET_CAPS_V3_OUT_API_VER_OFST 48 +#define MC_CMD_MAE_GET_CAPS_V3_OUT_API_VER_LEN 4 +/* Mask of supported counter types. Each bit position corresponds to a value of + * the MAE_COUNTER_TYPE enum. If this field is missing (i.e. V1 response), + * clients must assume that only AR counters are supported (i.e. + * COUNTER_TYPES_SUPPORTED==0x1). See also + * MC_CMD_MAE_COUNTERS_STREAM_START/COUNTER_TYPES_MASK. + */ +#define MC_CMD_MAE_GET_CAPS_V3_OUT_COUNTER_TYPES_SUPPORTED_OFST 52 +#define MC_CMD_MAE_GET_CAPS_V3_OUT_COUNTER_TYPES_SUPPORTED_LEN 4 +/* The total number of conntrack counters available to allocate. */ +#define MC_CMD_MAE_GET_CAPS_V3_OUT_CT_COUNTERS_OFST 56 +#define MC_CMD_MAE_GET_CAPS_V3_OUT_CT_COUNTERS_LEN 4 +/* The total number of Outer Rule counters available to allocate. */ +#define MC_CMD_MAE_GET_CAPS_V3_OUT_OR_COUNTERS_OFST 60 +#define MC_CMD_MAE_GET_CAPS_V3_OUT_OR_COUNTERS_LEN 4 + /***********************************/ /* MC_CMD_MAE_GET_AR_CAPS @@ -30498,10 +32188,13 @@ /* Generation count. Packets with generation count >= GENERATION_COUNT will * contain valid counter values for counter IDs allocated in this call, unless * the counter values are zero and zero squash is enabled. Note that there is - * an independent GENERATION_COUNT object per counter type. + * an independent GENERATION_COUNT object per counter type, and that generation + * counts wrap from 0xffffffff to 1. */ #define MC_CMD_MAE_COUNTER_ALLOC_OUT_GENERATION_COUNT_OFST 0 #define MC_CMD_MAE_COUNTER_ALLOC_OUT_GENERATION_COUNT_LEN 4 +/* enum: Generation counter 0 is reserved and unused. */ +#define MC_CMD_MAE_COUNTER_ALLOC_OUT_GENERATION_COUNT_INVALID 0x0 /* The number of counter IDs that the NIC allocated. It is never less than 1; * failure to allocate a single counter will cause an error to be returned. It * is never greater than REQUESTED_COUNT, but may be less. @@ -30516,6 +32209,8 @@ #define MC_CMD_MAE_COUNTER_ALLOC_OUT_COUNTER_ID_MAXNUM_MCDI2 253 /* enum: A counter ID that is guaranteed never to represent a real counter */ #define MC_CMD_MAE_COUNTER_ALLOC_OUT_COUNTER_ID_NULL 0xffffffff +/* Other enum values, see field(s): */ +/* MAE_COUNTER_ID */ /***********************************/ @@ -30577,7 +32272,8 @@ * values will be written for these counters. If values for these counter IDs * are present, the counter ID has been reallocated. A counter ID will not be * reallocated within a single read cycle as this would merge increments from - * the 'old' and 'new' counters. + * the 'old' and 'new' counters. GENERATION_COUNT_INVALID is reserved and + * unused. */ #define MC_CMD_MAE_COUNTER_FREE_OUT_GENERATION_COUNT_OFST 0 #define MC_CMD_MAE_COUNTER_FREE_OUT_GENERATION_COUNT_LEN 4 @@ -30696,7 +32392,8 @@ /* Generation count for AR counters. The final set of AR counter values will be * written out in packets with count == GENERATION_COUNT. An empty packet with * count > GENERATION_COUNT indicates that no more counter values of this type - * will be written to this stream. + * will be written to this stream. GENERATION_COUNT_INVALID is reserved and + * unused. */ #define MC_CMD_MAE_COUNTERS_STREAM_STOP_OUT_GENERATION_COUNT_OFST 0 #define MC_CMD_MAE_COUNTERS_STREAM_STOP_OUT_GENERATION_COUNT_LEN 4 @@ -30712,6 +32409,7 @@ * final set of counter values will be written out in packets with count == * GENERATION_COUNT. An empty packet with count > GENERATION_COUNT indicates * that no more counter values of this type will be written to this stream. + * GENERATION_COUNT_INVALID is reserved and unused. */ #define MC_CMD_MAE_COUNTERS_STREAM_STOP_V2_OUT_GENERATION_COUNT_OFST 0 #define MC_CMD_MAE_COUNTERS_STREAM_STOP_V2_OUT_GENERATION_COUNT_LEN 4 @@ -30960,6 +32658,24 @@ #define MC_CMD_MAE_ACTION_SET_ALLOC_IN_SUPPRESS_SELF_DELIVERY_OFST 0 #define MC_CMD_MAE_ACTION_SET_ALLOC_IN_SUPPRESS_SELF_DELIVERY_LBN 14 #define MC_CMD_MAE_ACTION_SET_ALLOC_IN_SUPPRESS_SELF_DELIVERY_WIDTH 1 +#define MC_CMD_MAE_ACTION_SET_ALLOC_IN_DO_REPLACE_RDP_C_PL_OFST 0 +#define MC_CMD_MAE_ACTION_SET_ALLOC_IN_DO_REPLACE_RDP_C_PL_LBN 15 +#define MC_CMD_MAE_ACTION_SET_ALLOC_IN_DO_REPLACE_RDP_C_PL_WIDTH 1 +#define MC_CMD_MAE_ACTION_SET_ALLOC_IN_DO_REPLACE_RDP_D_PL_OFST 0 +#define MC_CMD_MAE_ACTION_SET_ALLOC_IN_DO_REPLACE_RDP_D_PL_LBN 16 +#define MC_CMD_MAE_ACTION_SET_ALLOC_IN_DO_REPLACE_RDP_D_PL_WIDTH 1 +#define MC_CMD_MAE_ACTION_SET_ALLOC_IN_DO_REPLACE_RDP_OUT_HOST_CHAN_OFST 0 +#define MC_CMD_MAE_ACTION_SET_ALLOC_IN_DO_REPLACE_RDP_OUT_HOST_CHAN_LBN 17 +#define MC_CMD_MAE_ACTION_SET_ALLOC_IN_DO_REPLACE_RDP_OUT_HOST_CHAN_WIDTH 1 +#define MC_CMD_MAE_ACTION_SET_ALLOC_IN_DO_SET_NET_CHAN_OFST 0 +#define MC_CMD_MAE_ACTION_SET_ALLOC_IN_DO_SET_NET_CHAN_LBN 18 +#define MC_CMD_MAE_ACTION_SET_ALLOC_IN_DO_SET_NET_CHAN_WIDTH 1 +#define MC_CMD_MAE_ACTION_SET_ALLOC_IN_LACP_PLUGIN_OFST 0 +#define MC_CMD_MAE_ACTION_SET_ALLOC_IN_LACP_PLUGIN_LBN 19 +#define MC_CMD_MAE_ACTION_SET_ALLOC_IN_LACP_PLUGIN_WIDTH 1 +#define MC_CMD_MAE_ACTION_SET_ALLOC_IN_LACP_INC_L4_OFST 0 +#define MC_CMD_MAE_ACTION_SET_ALLOC_IN_LACP_INC_L4_LBN 20 +#define MC_CMD_MAE_ACTION_SET_ALLOC_IN_LACP_INC_L4_WIDTH 1 /* If VLAN_PUSH >= 1, TCI value to be inserted as outermost VLAN. */ #define MC_CMD_MAE_ACTION_SET_ALLOC_IN_VLAN0_TCI_BE_OFST 4 #define MC_CMD_MAE_ACTION_SET_ALLOC_IN_VLAN0_TCI_BE_LEN 2 @@ -30985,19 +32701,23 @@ #define MC_CMD_MAE_ACTION_SET_ALLOC_IN_DELIVER_OFST 20 #define MC_CMD_MAE_ACTION_SET_ALLOC_IN_DELIVER_LEN 4 /* Allows an action set to trigger several counter updates. Set to - * COUNTER_LIST_ID_NULL to request no counter action. + * MAE_COUNTER_ID_NULL to request no counter action. */ #define MC_CMD_MAE_ACTION_SET_ALLOC_IN_COUNTER_LIST_ID_OFST 24 #define MC_CMD_MAE_ACTION_SET_ALLOC_IN_COUNTER_LIST_ID_LEN 4 +/* Enum values, see field(s): */ +/* MAE_COUNTER_ID */ /* If a driver only wished to update one counter within this action set, then * it can supply a COUNTER_ID instead of allocating a single-element counter * list. The ID must have been allocated with COUNTER_TYPE=AR. This field - * should be set to COUNTER_ID_NULL if this behaviour is not required. It is - * not valid to supply a non-NULL value for both COUNTER_LIST_ID and + * should be set to MAE_COUNTER_ID_NULL if this behaviour is not required. It + * is not valid to supply a non-NULL value for both COUNTER_LIST_ID and * COUNTER_ID. */ #define MC_CMD_MAE_ACTION_SET_ALLOC_IN_COUNTER_ID_OFST 28 #define MC_CMD_MAE_ACTION_SET_ALLOC_IN_COUNTER_ID_LEN 4 +/* Enum values, see field(s): */ +/* MAE_COUNTER_ID */ #define MC_CMD_MAE_ACTION_SET_ALLOC_IN_MARK_VALUE_OFST 32 #define MC_CMD_MAE_ACTION_SET_ALLOC_IN_MARK_VALUE_LEN 4 /* Set to MAC_ID_NULL to request no source MAC replacement. */ @@ -31041,6 +32761,24 @@ #define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_SUPPRESS_SELF_DELIVERY_OFST 0 #define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_SUPPRESS_SELF_DELIVERY_LBN 14 #define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_SUPPRESS_SELF_DELIVERY_WIDTH 1 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_REPLACE_RDP_C_PL_OFST 0 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_REPLACE_RDP_C_PL_LBN 15 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_REPLACE_RDP_C_PL_WIDTH 1 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_REPLACE_RDP_D_PL_OFST 0 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_REPLACE_RDP_D_PL_LBN 16 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_REPLACE_RDP_D_PL_WIDTH 1 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_REPLACE_RDP_OUT_HOST_CHAN_OFST 0 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_REPLACE_RDP_OUT_HOST_CHAN_LBN 17 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_REPLACE_RDP_OUT_HOST_CHAN_WIDTH 1 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_SET_NET_CHAN_OFST 0 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_SET_NET_CHAN_LBN 18 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DO_SET_NET_CHAN_WIDTH 1 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_LACP_PLUGIN_OFST 0 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_LACP_PLUGIN_LBN 19 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_LACP_PLUGIN_WIDTH 1 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_LACP_INC_L4_OFST 0 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_LACP_INC_L4_LBN 20 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_LACP_INC_L4_WIDTH 1 /* If VLAN_PUSH >= 1, TCI value to be inserted as outermost VLAN. */ #define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_VLAN0_TCI_BE_OFST 4 #define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_VLAN0_TCI_BE_LEN 2 @@ -31066,19 +32804,23 @@ #define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DELIVER_OFST 20 #define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_DELIVER_LEN 4 /* Allows an action set to trigger several counter updates. Set to - * COUNTER_LIST_ID_NULL to request no counter action. + * MAE_COUNTER_ID_NULL to request no counter action. */ #define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_COUNTER_LIST_ID_OFST 24 #define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_COUNTER_LIST_ID_LEN 4 +/* Enum values, see field(s): */ +/* MAE_COUNTER_ID */ /* If a driver only wished to update one counter within this action set, then * it can supply a COUNTER_ID instead of allocating a single-element counter * list. The ID must have been allocated with COUNTER_TYPE=AR. This field - * should be set to COUNTER_ID_NULL if this behaviour is not required. It is - * not valid to supply a non-NULL value for both COUNTER_LIST_ID and + * should be set to MAE_COUNTER_ID_NULL if this behaviour is not required. It + * is not valid to supply a non-NULL value for both COUNTER_LIST_ID and * COUNTER_ID. */ #define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_COUNTER_ID_OFST 28 #define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_COUNTER_ID_LEN 4 +/* Enum values, see field(s): */ +/* MAE_COUNTER_ID */ #define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_MARK_VALUE_OFST 32 #define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_MARK_VALUE_LEN 4 /* Set to MAC_ID_NULL to request no source MAC replacement. */ @@ -31131,6 +32873,172 @@ #define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_ECN_ECT_1_TO_CE_LBN 6 #define MC_CMD_MAE_ACTION_SET_ALLOC_V2_IN_ECN_ECT_1_TO_CE_WIDTH 1 +/* MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN msgrequest: Only supported if + * MAE_ACTION_SET_ALLOC_V3_SUPPORTED is advertised in + * MC_CMD_GET_CAPABILITIES_V10_OUT. + */ +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_LEN 53 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_FLAGS_OFST 0 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_FLAGS_LEN 4 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_VLAN_PUSH_OFST 0 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_VLAN_PUSH_LBN 0 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_VLAN_PUSH_WIDTH 2 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_VLAN_POP_OFST 0 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_VLAN_POP_LBN 4 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_VLAN_POP_WIDTH 2 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DECAP_OFST 0 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DECAP_LBN 8 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DECAP_WIDTH 1 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_MARK_OFST 0 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_MARK_LBN 9 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_MARK_WIDTH 1 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_FLAG_OFST 0 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_FLAG_LBN 10 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_FLAG_WIDTH 1 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DO_NAT_OFST 0 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DO_NAT_LBN 11 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DO_NAT_WIDTH 1 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DO_DECR_IP_TTL_OFST 0 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DO_DECR_IP_TTL_LBN 12 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DO_DECR_IP_TTL_WIDTH 1 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DO_SET_SRC_MPORT_OFST 0 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DO_SET_SRC_MPORT_LBN 13 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DO_SET_SRC_MPORT_WIDTH 1 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_SUPPRESS_SELF_DELIVERY_OFST 0 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_SUPPRESS_SELF_DELIVERY_LBN 14 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_SUPPRESS_SELF_DELIVERY_WIDTH 1 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DO_REPLACE_RDP_C_PL_OFST 0 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DO_REPLACE_RDP_C_PL_LBN 15 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DO_REPLACE_RDP_C_PL_WIDTH 1 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DO_REPLACE_RDP_D_PL_OFST 0 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DO_REPLACE_RDP_D_PL_LBN 16 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DO_REPLACE_RDP_D_PL_WIDTH 1 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DO_REPLACE_RDP_OUT_HOST_CHAN_OFST 0 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DO_REPLACE_RDP_OUT_HOST_CHAN_LBN 17 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DO_REPLACE_RDP_OUT_HOST_CHAN_WIDTH 1 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DO_SET_NET_CHAN_OFST 0 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DO_SET_NET_CHAN_LBN 18 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DO_SET_NET_CHAN_WIDTH 1 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_LACP_PLUGIN_OFST 0 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_LACP_PLUGIN_LBN 19 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_LACP_PLUGIN_WIDTH 1 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_LACP_INC_L4_OFST 0 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_LACP_INC_L4_LBN 20 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_LACP_INC_L4_WIDTH 1 +/* If VLAN_PUSH >= 1, TCI value to be inserted as outermost VLAN. */ +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_VLAN0_TCI_BE_OFST 4 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_VLAN0_TCI_BE_LEN 2 +/* If VLAN_PUSH >= 1, TPID value to be inserted as outermost VLAN. */ +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_VLAN0_PROTO_BE_OFST 6 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_VLAN0_PROTO_BE_LEN 2 +/* If VLAN_PUSH == 2, inner TCI value to be inserted. */ +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_VLAN1_TCI_BE_OFST 8 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_VLAN1_TCI_BE_LEN 2 +/* If VLAN_PUSH == 2, inner TPID value to be inserted. */ +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_VLAN1_PROTO_BE_OFST 10 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_VLAN1_PROTO_BE_LEN 2 +/* Reserved. Ignored by firmware. Should be set to zero or 0xffffffff. */ +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_RSVD_OFST 12 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_RSVD_LEN 4 +/* Set to ENCAP_HEADER_ID_NULL to request no encap action */ +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_ENCAP_HEADER_ID_OFST 16 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_ENCAP_HEADER_ID_LEN 4 +/* An m-port selector identifying the m-port that the modified packet should be + * delivered to. Set to MPORT_SELECTOR_NULL to request no delivery of the + * packet. + */ +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DELIVER_OFST 20 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DELIVER_LEN 4 +/* Allows an action set to trigger several counter updates. Set to + * MAE_COUNTER_ID_NULL to request no counter action. + */ +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_COUNTER_LIST_ID_OFST 24 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_COUNTER_LIST_ID_LEN 4 +/* Enum values, see field(s): */ +/* MAE_COUNTER_ID */ +/* If a driver only wished to update one counter within this action set, then + * it can supply a COUNTER_ID instead of allocating a single-element counter + * list. The ID must have been allocated with COUNTER_TYPE=AR. This field + * should be set to MAE_COUNTER_ID_NULL if this behaviour is not required. It + * is not valid to supply a non-NULL value for both COUNTER_LIST_ID and + * COUNTER_ID. + */ +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_COUNTER_ID_OFST 28 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_COUNTER_ID_LEN 4 +/* Enum values, see field(s): */ +/* MAE_COUNTER_ID */ +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_MARK_VALUE_OFST 32 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_MARK_VALUE_LEN 4 +/* Set to MAC_ID_NULL to request no source MAC replacement. */ +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_SRC_MAC_ID_OFST 36 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_SRC_MAC_ID_LEN 4 +/* Set to MAC_ID_NULL to request no destination MAC replacement. */ +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DST_MAC_ID_OFST 40 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DST_MAC_ID_LEN 4 +/* Source m-port ID to be reported for DO_SET_SRC_MPORT action. */ +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_REPORTED_SRC_MPORT_OFST 44 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_REPORTED_SRC_MPORT_LEN 4 +/* Actions for modifying the Differentiated Services Code-Point (DSCP) bits + * within IPv4 and IPv6 headers. + */ +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DSCP_CONTROL_OFST 48 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DSCP_CONTROL_LEN 2 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DO_DSCP_ENCAP_COPY_OFST 48 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DO_DSCP_ENCAP_COPY_LBN 0 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DO_DSCP_ENCAP_COPY_WIDTH 1 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DO_DSCP_DECAP_COPY_OFST 48 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DO_DSCP_DECAP_COPY_LBN 1 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DO_DSCP_DECAP_COPY_WIDTH 1 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DO_REPLACE_DSCP_OFST 48 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DO_REPLACE_DSCP_LBN 2 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DO_REPLACE_DSCP_WIDTH 1 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DSCP_VALUE_OFST 48 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DSCP_VALUE_LBN 3 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DSCP_VALUE_WIDTH 6 +/* Actions for modifying the Explicit Congestion Notification (ECN) bits within + * IPv4 and IPv6 headers. + */ +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_ECN_CONTROL_OFST 50 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_ECN_CONTROL_LEN 1 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DO_ECN_ENCAP_COPY_OFST 50 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DO_ECN_ENCAP_COPY_LBN 0 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DO_ECN_ENCAP_COPY_WIDTH 1 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DO_ECN_DECAP_COPY_OFST 50 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DO_ECN_DECAP_COPY_LBN 1 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DO_ECN_DECAP_COPY_WIDTH 1 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DO_REPLACE_ECN_OFST 50 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DO_REPLACE_ECN_LBN 2 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_DO_REPLACE_ECN_WIDTH 1 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_ECN_VALUE_OFST 50 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_ECN_VALUE_LBN 3 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_ECN_VALUE_WIDTH 2 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_ECN_ECT_0_TO_CE_OFST 50 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_ECN_ECT_0_TO_CE_LBN 5 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_ECN_ECT_0_TO_CE_WIDTH 1 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_ECN_ECT_1_TO_CE_OFST 50 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_ECN_ECT_1_TO_CE_LBN 6 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_ECN_ECT_1_TO_CE_WIDTH 1 +/* Actions for overwriting CH_ROUTE subfields. */ +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_RDP_OVERWRITE_OFST 51 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_RDP_OVERWRITE_LEN 1 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_RDP_C_PL_OFST 51 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_RDP_C_PL_LBN 0 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_RDP_C_PL_WIDTH 1 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_RDP_D_PL_OFST 51 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_RDP_D_PL_LBN 1 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_RDP_D_PL_WIDTH 1 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_RDP_PL_CHAN_OFST 51 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_RDP_PL_CHAN_LBN 2 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_RDP_PL_CHAN_WIDTH 1 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_RDP_OUT_HOST_CHAN_OFST 51 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_RDP_OUT_HOST_CHAN_LBN 3 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_RDP_OUT_HOST_CHAN_WIDTH 1 +/* Override outgoing CH_VC to network port for DO_SET_NET_CHAN action. Cannot + * be used in conjunction with DO_SET_SRC_MPORT action. + */ +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_NET_CHAN_OFST 52 +#define MC_CMD_MAE_ACTION_SET_ALLOC_V3_IN_NET_CHAN_LEN 1 + /* MC_CMD_MAE_ACTION_SET_ALLOC_OUT msgresponse */ #define MC_CMD_MAE_ACTION_SET_ALLOC_OUT_LEN 4 /* The MSB of the AS_ID is guaranteed to be clear if the ID is not @@ -31297,6 +33205,7 @@ */ #define MC_CMD_MAE_OUTER_RULE_INSERT_IN_PRIO_OFST 4 #define MC_CMD_MAE_OUTER_RULE_INSERT_IN_PRIO_LEN 4 +/* Deprecated alias for ACTION_CONTROL. */ #define MC_CMD_MAE_OUTER_RULE_INSERT_IN_LOOKUP_CONTROL_OFST 8 #define MC_CMD_MAE_OUTER_RULE_INSERT_IN_LOOKUP_CONTROL_LEN 4 #define MC_CMD_MAE_OUTER_RULE_INSERT_IN_DO_CT_OFST 8 @@ -31307,15 +33216,26 @@ #define MC_CMD_MAE_OUTER_RULE_INSERT_IN_CT_VNI_MODE_WIDTH 2 /* Enum values, see field(s): */ /* MAE_CT_VNI_MODE */ +#define MC_CMD_MAE_OUTER_RULE_INSERT_IN_DO_COUNT_OFST 8 +#define MC_CMD_MAE_OUTER_RULE_INSERT_IN_DO_COUNT_LBN 3 +#define MC_CMD_MAE_OUTER_RULE_INSERT_IN_DO_COUNT_WIDTH 1 +#define MC_CMD_MAE_OUTER_RULE_INSERT_IN_CT_TCP_FLAGS_INHIBIT_OFST 8 +#define MC_CMD_MAE_OUTER_RULE_INSERT_IN_CT_TCP_FLAGS_INHIBIT_LBN 4 +#define MC_CMD_MAE_OUTER_RULE_INSERT_IN_CT_TCP_FLAGS_INHIBIT_WIDTH 1 #define MC_CMD_MAE_OUTER_RULE_INSERT_IN_RECIRC_ID_OFST 8 #define MC_CMD_MAE_OUTER_RULE_INSERT_IN_RECIRC_ID_LBN 8 #define MC_CMD_MAE_OUTER_RULE_INSERT_IN_RECIRC_ID_WIDTH 8 #define MC_CMD_MAE_OUTER_RULE_INSERT_IN_CT_DOMAIN_OFST 8 #define MC_CMD_MAE_OUTER_RULE_INSERT_IN_CT_DOMAIN_LBN 16 #define MC_CMD_MAE_OUTER_RULE_INSERT_IN_CT_DOMAIN_WIDTH 16 -/* Reserved for future use. Must be set to zero. */ -#define MC_CMD_MAE_OUTER_RULE_INSERT_IN_RSVD_OFST 12 -#define MC_CMD_MAE_OUTER_RULE_INSERT_IN_RSVD_LEN 4 +/* This field controls the actions that are performed when a rule is hit. */ +#define MC_CMD_MAE_OUTER_RULE_INSERT_IN_ACTION_CONTROL_OFST 8 +#define MC_CMD_MAE_OUTER_RULE_INSERT_IN_ACTION_CONTROL_LEN 4 +/* ID of counter to increment when the rule is hit. Only used if the DO_COUNT + * flag is set. The ID must have been allocated with COUNTER_TYPE=OR. + */ +#define MC_CMD_MAE_OUTER_RULE_INSERT_IN_COUNTER_ID_OFST 12 +#define MC_CMD_MAE_OUTER_RULE_INSERT_IN_COUNTER_ID_LEN 4 /* Structure of the format MAE_ENC_FIELD_PAIRS. */ #define MC_CMD_MAE_OUTER_RULE_INSERT_IN_FIELD_MATCH_CRITERIA_OFST 16 #define MC_CMD_MAE_OUTER_RULE_INSERT_IN_FIELD_MATCH_CRITERIA_LEN 1 @@ -31367,6 +33287,59 @@ #define MC_CMD_MAE_OUTER_RULE_REMOVE_OUT_REMOVED_OR_ID_MAXNUM 32 #define MC_CMD_MAE_OUTER_RULE_REMOVE_OUT_REMOVED_OR_ID_MAXNUM_MCDI2 32 + +/***********************************/ +/* MC_CMD_MAE_OUTER_RULE_UPDATE + * Atomically change the response of an Outer Rule. + */ +#define MC_CMD_MAE_OUTER_RULE_UPDATE 0x17d +#define MC_CMD_MAE_OUTER_RULE_UPDATE_MSGSET 0x17d +#undef MC_CMD_0x17d_PRIVILEGE_CTG + +#define MC_CMD_0x17d_PRIVILEGE_CTG SRIOV_CTG_MAE + +/* MC_CMD_MAE_OUTER_RULE_UPDATE_IN msgrequest */ +#define MC_CMD_MAE_OUTER_RULE_UPDATE_IN_LEN 16 +/* ID of outer rule to update */ +#define MC_CMD_MAE_OUTER_RULE_UPDATE_IN_OR_ID_OFST 0 +#define MC_CMD_MAE_OUTER_RULE_UPDATE_IN_OR_ID_LEN 4 +/* Packets matching the rule will be parsed with this encapsulation. */ +#define MC_CMD_MAE_OUTER_RULE_UPDATE_IN_ENCAP_TYPE_OFST 4 +#define MC_CMD_MAE_OUTER_RULE_UPDATE_IN_ENCAP_TYPE_LEN 4 +/* Enum values, see field(s): */ +/* MAE_MCDI_ENCAP_TYPE */ +/* This field controls the actions that are performed when a rule is hit. */ +#define MC_CMD_MAE_OUTER_RULE_UPDATE_IN_ACTION_CONTROL_OFST 8 +#define MC_CMD_MAE_OUTER_RULE_UPDATE_IN_ACTION_CONTROL_LEN 4 +#define MC_CMD_MAE_OUTER_RULE_UPDATE_IN_DO_CT_OFST 8 +#define MC_CMD_MAE_OUTER_RULE_UPDATE_IN_DO_CT_LBN 0 +#define MC_CMD_MAE_OUTER_RULE_UPDATE_IN_DO_CT_WIDTH 1 +#define MC_CMD_MAE_OUTER_RULE_UPDATE_IN_CT_VNI_MODE_OFST 8 +#define MC_CMD_MAE_OUTER_RULE_UPDATE_IN_CT_VNI_MODE_LBN 1 +#define MC_CMD_MAE_OUTER_RULE_UPDATE_IN_CT_VNI_MODE_WIDTH 2 +/* Enum values, see field(s): */ +/* MAE_CT_VNI_MODE */ +#define MC_CMD_MAE_OUTER_RULE_UPDATE_IN_DO_COUNT_OFST 8 +#define MC_CMD_MAE_OUTER_RULE_UPDATE_IN_DO_COUNT_LBN 3 +#define MC_CMD_MAE_OUTER_RULE_UPDATE_IN_DO_COUNT_WIDTH 1 +#define MC_CMD_MAE_OUTER_RULE_UPDATE_IN_CT_TCP_FLAGS_INHIBIT_OFST 8 +#define MC_CMD_MAE_OUTER_RULE_UPDATE_IN_CT_TCP_FLAGS_INHIBIT_LBN 4 +#define MC_CMD_MAE_OUTER_RULE_UPDATE_IN_CT_TCP_FLAGS_INHIBIT_WIDTH 1 +#define MC_CMD_MAE_OUTER_RULE_UPDATE_IN_RECIRC_ID_OFST 8 +#define MC_CMD_MAE_OUTER_RULE_UPDATE_IN_RECIRC_ID_LBN 8 +#define MC_CMD_MAE_OUTER_RULE_UPDATE_IN_RECIRC_ID_WIDTH 8 +#define MC_CMD_MAE_OUTER_RULE_UPDATE_IN_CT_DOMAIN_OFST 8 +#define MC_CMD_MAE_OUTER_RULE_UPDATE_IN_CT_DOMAIN_LBN 16 +#define MC_CMD_MAE_OUTER_RULE_UPDATE_IN_CT_DOMAIN_WIDTH 16 +/* ID of counter to increment when the rule is hit. Only used if the DO_COUNT + * flag is set. The ID must have been allocated with COUNTER_TYPE=OR. + */ +#define MC_CMD_MAE_OUTER_RULE_UPDATE_IN_COUNTER_ID_OFST 12 +#define MC_CMD_MAE_OUTER_RULE_UPDATE_IN_COUNTER_ID_LEN 4 + +/* MC_CMD_MAE_OUTER_RULE_UPDATE_OUT msgresponse */ +#define MC_CMD_MAE_OUTER_RULE_UPDATE_OUT_LEN 0 + /* MAE_ACTION_RULE_RESPONSE structuredef */ #define MAE_ACTION_RULE_RESPONSE_LEN 16 #define MAE_ACTION_RULE_RESPONSE_ASL_ID_OFST 0 @@ -31932,6 +33905,7 @@ #define MC_CMD_MAE_MPORT_READ_JOURNAL_OUT_MORE_OFST 0 #define MC_CMD_MAE_MPORT_READ_JOURNAL_OUT_MORE_LBN 0 #define MC_CMD_MAE_MPORT_READ_JOURNAL_OUT_MORE_WIDTH 1 +/* The number of MAE_MPORT_DESC structures in MPORT_DESC_DATA. May be zero. */ #define MC_CMD_MAE_MPORT_READ_JOURNAL_OUT_MPORT_DESC_COUNT_OFST 4 #define MC_CMD_MAE_MPORT_READ_JOURNAL_OUT_MPORT_DESC_COUNT_LEN 4 #define MC_CMD_MAE_MPORT_READ_JOURNAL_OUT_SIZEOF_MPORT_DESC_OFST 8 @@ -31946,4 +33920,407 @@ #define MC_CMD_MAE_MPORT_READ_JOURNAL_OUT_MPORT_DESC_DATA_MAXNUM 240 #define MC_CMD_MAE_MPORT_READ_JOURNAL_OUT_MPORT_DESC_DATA_MAXNUM_MCDI2 1008 +/* TABLE_FIELD_DESCR structuredef: An individual table field descriptor. This + * describes the location and properties of one N-bit field within a wider + * M-bit key/mask/response value. + */ +#define TABLE_FIELD_DESCR_LEN 8 +/* Identifier for this field. */ +#define TABLE_FIELD_DESCR_FIELD_ID_OFST 0 +#define TABLE_FIELD_DESCR_FIELD_ID_LEN 2 +/* Enum values, see field(s): */ +/* TABLE_FIELD_ID */ +#define TABLE_FIELD_DESCR_FIELD_ID_LBN 0 +#define TABLE_FIELD_DESCR_FIELD_ID_WIDTH 16 +/* Lowest (least significant) bit number of the bits of this field. */ +#define TABLE_FIELD_DESCR_LBN_OFST 2 +#define TABLE_FIELD_DESCR_LBN_LEN 2 +#define TABLE_FIELD_DESCR_LBN_LBN 16 +#define TABLE_FIELD_DESCR_LBN_WIDTH 16 +/* Width of this field in bits. */ +#define TABLE_FIELD_DESCR_WIDTH_OFST 4 +#define TABLE_FIELD_DESCR_WIDTH_LEN 2 +#define TABLE_FIELD_DESCR_WIDTH_LBN 32 +#define TABLE_FIELD_DESCR_WIDTH_WIDTH 16 +/* The mask type for this field. (Note that masking is relevant to keys; fields + * of responses are always reported with the EXACT type.) + */ +#define TABLE_FIELD_DESCR_MASK_TYPE_OFST 6 +#define TABLE_FIELD_DESCR_MASK_TYPE_LEN 1 +/* enum: Field must never be selected in the mask. */ +#define TABLE_FIELD_DESCR_MASK_NEVER 0x0 +/* enum: Exact match: field must always be selected in the mask. */ +#define TABLE_FIELD_DESCR_MASK_EXACT 0x1 +/* enum: Ternary match: arbitrary mask bits are allowed. */ +#define TABLE_FIELD_DESCR_MASK_TERNARY 0x2 +/* enum: Whole field match: mask must be all 1 bits, or all 0 bits. */ +#define TABLE_FIELD_DESCR_MASK_WHOLE_FIELD 0x3 +/* enum: Longest prefix match: mask must be 1 bit(s) followed by 0 bit(s). */ +#define TABLE_FIELD_DESCR_MASK_LPM 0x4 +#define TABLE_FIELD_DESCR_MASK_TYPE_LBN 48 +#define TABLE_FIELD_DESCR_MASK_TYPE_WIDTH 8 +/* A version code that allows field semantics to be extended. All fields + * currently use version 0. + */ +#define TABLE_FIELD_DESCR_SCHEME_OFST 7 +#define TABLE_FIELD_DESCR_SCHEME_LEN 1 +#define TABLE_FIELD_DESCR_SCHEME_LBN 56 +#define TABLE_FIELD_DESCR_SCHEME_WIDTH 8 + + +/***********************************/ +/* MC_CMD_TABLE_LIST + * Return the list of tables which may be accessed via this table API. + */ +#define MC_CMD_TABLE_LIST 0x1c9 +#define MC_CMD_TABLE_LIST_MSGSET 0x1c9 +#undef MC_CMD_0x1c9_PRIVILEGE_CTG + +#define MC_CMD_0x1c9_PRIVILEGE_CTG SRIOV_CTG_GENERAL + +/* MC_CMD_TABLE_LIST_IN msgrequest */ +#define MC_CMD_TABLE_LIST_IN_LEN 4 +/* Index of the first item to be returned in the TABLE_ID sequence. (Set to 0 + * for the first call; further calls are only required if the whole sequence + * does not fit within the maximum MCDI message size.) + */ +#define MC_CMD_TABLE_LIST_IN_FIRST_TABLE_ID_INDEX_OFST 0 +#define MC_CMD_TABLE_LIST_IN_FIRST_TABLE_ID_INDEX_LEN 4 + +/* MC_CMD_TABLE_LIST_OUT msgresponse */ +#define MC_CMD_TABLE_LIST_OUT_LENMIN 4 +#define MC_CMD_TABLE_LIST_OUT_LENMAX 252 +#define MC_CMD_TABLE_LIST_OUT_LENMAX_MCDI2 1020 +#define MC_CMD_TABLE_LIST_OUT_LEN(num) (4+4*(num)) +#define MC_CMD_TABLE_LIST_OUT_TABLE_ID_NUM(len) (((len)-4)/4) +/* The total number of tables. */ +#define MC_CMD_TABLE_LIST_OUT_N_TABLES_OFST 0 +#define MC_CMD_TABLE_LIST_OUT_N_TABLES_LEN 4 +/* A sequence of table identifiers. If all N_TABLES items do not fit, further + * items can be obtained by repeating the call with a non-zero + * FIRST_TABLE_ID_INDEX. + */ +#define MC_CMD_TABLE_LIST_OUT_TABLE_ID_OFST 4 +#define MC_CMD_TABLE_LIST_OUT_TABLE_ID_LEN 4 +#define MC_CMD_TABLE_LIST_OUT_TABLE_ID_MINNUM 0 +#define MC_CMD_TABLE_LIST_OUT_TABLE_ID_MAXNUM 62 +#define MC_CMD_TABLE_LIST_OUT_TABLE_ID_MAXNUM_MCDI2 254 +/* Enum values, see field(s): */ +/* TABLE_ID */ + + +/***********************************/ +/* MC_CMD_TABLE_DESCRIPTOR + * Request the table descriptor for a particular table. This describes + * properties of the table and the format of the key and response. May return + * EINVAL for unknown table ID. + */ +#define MC_CMD_TABLE_DESCRIPTOR 0x1ca +#define MC_CMD_TABLE_DESCRIPTOR_MSGSET 0x1ca +#undef MC_CMD_0x1ca_PRIVILEGE_CTG + +#define MC_CMD_0x1ca_PRIVILEGE_CTG SRIOV_CTG_GENERAL + +/* MC_CMD_TABLE_DESCRIPTOR_IN msgrequest */ +#define MC_CMD_TABLE_DESCRIPTOR_IN_LEN 8 +/* Identifier for this field. */ +#define MC_CMD_TABLE_DESCRIPTOR_IN_TABLE_ID_OFST 0 +#define MC_CMD_TABLE_DESCRIPTOR_IN_TABLE_ID_LEN 4 +/* Enum values, see field(s): */ +/* TABLE_ID */ +/* Index of the first item to be returned in the FIELDS sequence. (Set to 0 for + * the first call; further calls are only required if the whole sequence does + * not fit within the maximum MCDI message size.) + */ +#define MC_CMD_TABLE_DESCRIPTOR_IN_FIRST_FIELDS_INDEX_OFST 4 +#define MC_CMD_TABLE_DESCRIPTOR_IN_FIRST_FIELDS_INDEX_LEN 4 + +/* MC_CMD_TABLE_DESCRIPTOR_OUT msgresponse */ +#define MC_CMD_TABLE_DESCRIPTOR_OUT_LENMIN 28 +#define MC_CMD_TABLE_DESCRIPTOR_OUT_LENMAX 252 +#define MC_CMD_TABLE_DESCRIPTOR_OUT_LENMAX_MCDI2 1020 +#define MC_CMD_TABLE_DESCRIPTOR_OUT_LEN(num) (20+8*(num)) +#define MC_CMD_TABLE_DESCRIPTOR_OUT_FIELDS_NUM(len) (((len)-20)/8) +/* Maximum number of entries in this table. */ +#define MC_CMD_TABLE_DESCRIPTOR_OUT_MAX_ENTRIES_OFST 0 +#define MC_CMD_TABLE_DESCRIPTOR_OUT_MAX_ENTRIES_LEN 4 +/* The type of table. (This is really just informational; the important + * properties of a table that affect programming can be deduced from other + * items in the table or field descriptor.) + */ +#define MC_CMD_TABLE_DESCRIPTOR_OUT_TYPE_OFST 4 +#define MC_CMD_TABLE_DESCRIPTOR_OUT_TYPE_LEN 2 +/* enum: Direct table (essentially just an array). Behaves like a BCAM for + * programming purposes, where the fact that the key is actually used as an + * array index is really just an implementation detail. + */ +#define MC_CMD_TABLE_DESCRIPTOR_OUT_TYPE_DIRECT 0x1 +/* enum: BCAM (binary CAM) table: exact match on all key fields." */ +#define MC_CMD_TABLE_DESCRIPTOR_OUT_TYPE_BCAM 0x2 +/* enum: TCAM (ternary CAM) table: matches fields with a mask. Each entry may + * have its own different mask. + */ +#define MC_CMD_TABLE_DESCRIPTOR_OUT_TYPE_TCAM 0x3 +/* enum: STCAM (semi-TCAM) table: like a TCAM but entries shared a limited + * number of unique masks. + */ +#define MC_CMD_TABLE_DESCRIPTOR_OUT_TYPE_STCAM 0x4 +/* Width of key (and corresponding mask, for TCAM or STCAM) in bits. */ +#define MC_CMD_TABLE_DESCRIPTOR_OUT_KEY_WIDTH_OFST 6 +#define MC_CMD_TABLE_DESCRIPTOR_OUT_KEY_WIDTH_LEN 2 +/* Width of response in bits. */ +#define MC_CMD_TABLE_DESCRIPTOR_OUT_RESP_WIDTH_OFST 8 +#define MC_CMD_TABLE_DESCRIPTOR_OUT_RESP_WIDTH_LEN 2 +/* The total number of fields in the key. */ +#define MC_CMD_TABLE_DESCRIPTOR_OUT_N_KEY_FIELDS_OFST 10 +#define MC_CMD_TABLE_DESCRIPTOR_OUT_N_KEY_FIELDS_LEN 2 +/* The total number of fields in the response. */ +#define MC_CMD_TABLE_DESCRIPTOR_OUT_N_RESP_FIELDS_OFST 12 +#define MC_CMD_TABLE_DESCRIPTOR_OUT_N_RESP_FIELDS_LEN 2 +/* Number of priorities for STCAM or TCAM; otherwise 0. The priority of a table + * entry (relevant when more than one masked entry matches) ranges from + * 0=highest to N_PRIORITIES-1=lowest. + */ +#define MC_CMD_TABLE_DESCRIPTOR_OUT_N_PRIORITIES_OFST 14 +#define MC_CMD_TABLE_DESCRIPTOR_OUT_N_PRIORITIES_LEN 2 +/* Maximum number of masks for STCAM; otherwise 0. */ +#define MC_CMD_TABLE_DESCRIPTOR_OUT_MAX_MASKS_OFST 16 +#define MC_CMD_TABLE_DESCRIPTOR_OUT_MAX_MASKS_LEN 2 +/* Flags. */ +#define MC_CMD_TABLE_DESCRIPTOR_OUT_FLAGS_OFST 18 +#define MC_CMD_TABLE_DESCRIPTOR_OUT_FLAGS_LEN 1 +#define MC_CMD_TABLE_DESCRIPTOR_OUT_ALLOC_MASKS_OFST 18 +#define MC_CMD_TABLE_DESCRIPTOR_OUT_ALLOC_MASKS_LBN 0 +#define MC_CMD_TABLE_DESCRIPTOR_OUT_ALLOC_MASKS_WIDTH 1 +/* Access scheme version code, allowing the method of accessing table entries + * to change semantics in future. A client which does not understand the value + * of this field should assume that it cannot program this table. Currently + * always set to 0 indicating the original MC_CMD_TABLE_INSERT/UPDATE/DELETE + * semantics. + */ +#define MC_CMD_TABLE_DESCRIPTOR_OUT_SCHEME_OFST 19 +#define MC_CMD_TABLE_DESCRIPTOR_OUT_SCHEME_LEN 1 +/* A sequence of TABLE_FIELD_DESCR structures: N_KEY_FIELDS items describing + * the key, followed by N_RESP_FIELDS items describing the response. If all + * N_KEY_FIELDS+N_RESP_FIELDS items do not fit, further items can be obtained + * by repeating the call with a non-zero FIRST_FIELDS_INDEX. + */ +#define MC_CMD_TABLE_DESCRIPTOR_OUT_FIELDS_OFST 20 +#define MC_CMD_TABLE_DESCRIPTOR_OUT_FIELDS_LEN 8 +#define MC_CMD_TABLE_DESCRIPTOR_OUT_FIELDS_LO_OFST 20 +#define MC_CMD_TABLE_DESCRIPTOR_OUT_FIELDS_LO_LEN 4 +#define MC_CMD_TABLE_DESCRIPTOR_OUT_FIELDS_LO_LBN 160 +#define MC_CMD_TABLE_DESCRIPTOR_OUT_FIELDS_LO_WIDTH 32 +#define MC_CMD_TABLE_DESCRIPTOR_OUT_FIELDS_HI_OFST 24 +#define MC_CMD_TABLE_DESCRIPTOR_OUT_FIELDS_HI_LEN 4 +#define MC_CMD_TABLE_DESCRIPTOR_OUT_FIELDS_HI_LBN 192 +#define MC_CMD_TABLE_DESCRIPTOR_OUT_FIELDS_HI_WIDTH 32 +#define MC_CMD_TABLE_DESCRIPTOR_OUT_FIELDS_MINNUM 1 +#define MC_CMD_TABLE_DESCRIPTOR_OUT_FIELDS_MAXNUM 29 +#define MC_CMD_TABLE_DESCRIPTOR_OUT_FIELDS_MAXNUM_MCDI2 125 + + +/***********************************/ +/* MC_CMD_TABLE_INSERT + * Insert a new entry into a table. The entry must not currently exist. May + * return EINVAL for unknown table ID or other bad request parameters, EEXIST + * if the entry already exists, ENOSPC if there is no space or EPERM if the + * operation is not permitted. In case of an error, the additional MCDI error + * argument field returns the raw error code from the underlying CAM driver. + */ +#define MC_CMD_TABLE_INSERT 0x1cd +#define MC_CMD_TABLE_INSERT_MSGSET 0x1cd +#undef MC_CMD_0x1cd_PRIVILEGE_CTG + +#define MC_CMD_0x1cd_PRIVILEGE_CTG SRIOV_CTG_GENERAL + +/* MC_CMD_TABLE_INSERT_IN msgrequest */ +#define MC_CMD_TABLE_INSERT_IN_LENMIN 16 +#define MC_CMD_TABLE_INSERT_IN_LENMAX 252 +#define MC_CMD_TABLE_INSERT_IN_LENMAX_MCDI2 1020 +#define MC_CMD_TABLE_INSERT_IN_LEN(num) (12+4*(num)) +#define MC_CMD_TABLE_INSERT_IN_DATA_NUM(len) (((len)-12)/4) +/* Table identifier. */ +#define MC_CMD_TABLE_INSERT_IN_TABLE_ID_OFST 0 +#define MC_CMD_TABLE_INSERT_IN_TABLE_ID_LEN 4 +/* Enum values, see field(s): */ +/* TABLE_ID */ +/* Width in bits of supplied key data (must match table properties). */ +#define MC_CMD_TABLE_INSERT_IN_KEY_WIDTH_OFST 4 +#define MC_CMD_TABLE_INSERT_IN_KEY_WIDTH_LEN 2 +/* Width in bits of supplied mask data (0 for direct/BCAM tables, or for STCAM + * when allocated MASK_ID is used instead). + */ +#define MC_CMD_TABLE_INSERT_IN_MASK_WIDTH_OFST 6 +#define MC_CMD_TABLE_INSERT_IN_MASK_WIDTH_LEN 2 +/* Width in bits of supplied response data (for INSERT and UPDATE operations + * this must match the table properties; for DELETE operations, no response + * data is required and this must be 0). + */ +#define MC_CMD_TABLE_INSERT_IN_RESP_WIDTH_OFST 8 +#define MC_CMD_TABLE_INSERT_IN_RESP_WIDTH_LEN 2 +/* Mask ID for STCAM table - used instead of mask data if the table descriptor + * reports ALLOC_MASKS==1. Otherwise set to 0. + */ +#define MC_CMD_TABLE_INSERT_IN_MASK_ID_OFST 6 +#define MC_CMD_TABLE_INSERT_IN_MASK_ID_LEN 2 +/* Priority for TCAM or STCAM, in range 0..N_PRIORITIES-1, otherwise 0. */ +#define MC_CMD_TABLE_INSERT_IN_PRIORITY_OFST 8 +#define MC_CMD_TABLE_INSERT_IN_PRIORITY_LEN 2 +/* (32-bit alignment padding - set to 0) */ +#define MC_CMD_TABLE_INSERT_IN_RESERVED_OFST 10 +#define MC_CMD_TABLE_INSERT_IN_RESERVED_LEN 2 +/* Sequence of key, mask (if MASK_WIDTH > 0), and response (if RESP_WIDTH > 0) + * data values. Each of these items is logically treated as a single wide N-bit + * value, in which the individual fields have been placed within that value per + * the LBN and WIDTH information from the table field descriptors. The wide + * N-bit value is padded with 0 bits at the MSB end if necessary to make a + * multiple of 32 bits. The value is then packed into this command as a + * sequence of 32-bit words, bits [31:0] first, then bits [63:32], etc. + */ +#define MC_CMD_TABLE_INSERT_IN_DATA_OFST 12 +#define MC_CMD_TABLE_INSERT_IN_DATA_LEN 4 +#define MC_CMD_TABLE_INSERT_IN_DATA_MINNUM 1 +#define MC_CMD_TABLE_INSERT_IN_DATA_MAXNUM 60 +#define MC_CMD_TABLE_INSERT_IN_DATA_MAXNUM_MCDI2 252 + +/* MC_CMD_TABLE_INSERT_OUT msgresponse */ +#define MC_CMD_TABLE_INSERT_OUT_LEN 0 + + +/***********************************/ +/* MC_CMD_TABLE_UPDATE + * Update an existing entry in a table with a new response value. May return + * EINVAL for unknown table ID or other bad request parameters, ENOENT if the + * entry does not already exist, or EPERM if the operation is not permitted. In + * case of an error, the additional MCDI error argument field returns the raw + * error code from the underlying CAM driver. + */ +#define MC_CMD_TABLE_UPDATE 0x1ce +#define MC_CMD_TABLE_UPDATE_MSGSET 0x1ce +#undef MC_CMD_0x1ce_PRIVILEGE_CTG + +#define MC_CMD_0x1ce_PRIVILEGE_CTG SRIOV_CTG_GENERAL + +/* MC_CMD_TABLE_UPDATE_IN msgrequest */ +#define MC_CMD_TABLE_UPDATE_IN_LENMIN 16 +#define MC_CMD_TABLE_UPDATE_IN_LENMAX 252 +#define MC_CMD_TABLE_UPDATE_IN_LENMAX_MCDI2 1020 +#define MC_CMD_TABLE_UPDATE_IN_LEN(num) (12+4*(num)) +#define MC_CMD_TABLE_UPDATE_IN_DATA_NUM(len) (((len)-12)/4) +/* Table identifier. */ +#define MC_CMD_TABLE_UPDATE_IN_TABLE_ID_OFST 0 +#define MC_CMD_TABLE_UPDATE_IN_TABLE_ID_LEN 4 +/* Enum values, see field(s): */ +/* TABLE_ID */ +/* Width in bits of supplied key data (must match table properties). */ +#define MC_CMD_TABLE_UPDATE_IN_KEY_WIDTH_OFST 4 +#define MC_CMD_TABLE_UPDATE_IN_KEY_WIDTH_LEN 2 +/* Width in bits of supplied mask data (0 for direct/BCAM tables, or for STCAM + * when allocated MASK_ID is used instead). + */ +#define MC_CMD_TABLE_UPDATE_IN_MASK_WIDTH_OFST 6 +#define MC_CMD_TABLE_UPDATE_IN_MASK_WIDTH_LEN 2 +/* Width in bits of supplied response data (for INSERT and UPDATE operations + * this must match the table properties; for DELETE operations, no response + * data is required and this must be 0). + */ +#define MC_CMD_TABLE_UPDATE_IN_RESP_WIDTH_OFST 8 +#define MC_CMD_TABLE_UPDATE_IN_RESP_WIDTH_LEN 2 +/* Mask ID for STCAM table - used instead of mask data if the table descriptor + * reports ALLOC_MASKS==1. Otherwise set to 0. + */ +#define MC_CMD_TABLE_UPDATE_IN_MASK_ID_OFST 6 +#define MC_CMD_TABLE_UPDATE_IN_MASK_ID_LEN 2 +/* Priority for TCAM or STCAM, in range 0..N_PRIORITIES-1, otherwise 0. */ +#define MC_CMD_TABLE_UPDATE_IN_PRIORITY_OFST 8 +#define MC_CMD_TABLE_UPDATE_IN_PRIORITY_LEN 2 +/* (32-bit alignment padding - set to 0) */ +#define MC_CMD_TABLE_UPDATE_IN_RESERVED_OFST 10 +#define MC_CMD_TABLE_UPDATE_IN_RESERVED_LEN 2 +/* Sequence of key, mask (if MASK_WIDTH > 0), and response (if RESP_WIDTH > 0) + * data values. Each of these items is logically treated as a single wide N-bit + * value, in which the individual fields have been placed within that value per + * the LBN and WIDTH information from the table field descriptors. The wide + * N-bit value is padded with 0 bits at the MSB end if necessary to make a + * multiple of 32 bits. The value is then packed into this command as a + * sequence of 32-bit words, bits [31:0] first, then bits [63:32], etc. + */ +#define MC_CMD_TABLE_UPDATE_IN_DATA_OFST 12 +#define MC_CMD_TABLE_UPDATE_IN_DATA_LEN 4 +#define MC_CMD_TABLE_UPDATE_IN_DATA_MINNUM 1 +#define MC_CMD_TABLE_UPDATE_IN_DATA_MAXNUM 60 +#define MC_CMD_TABLE_UPDATE_IN_DATA_MAXNUM_MCDI2 252 + +/* MC_CMD_TABLE_UPDATE_OUT msgresponse */ +#define MC_CMD_TABLE_UPDATE_OUT_LEN 0 + + +/***********************************/ +/* MC_CMD_TABLE_DELETE + * Delete an existing entry in a table. May return EINVAL for unknown table ID + * or other bad request parameters, ENOENT if the entry does not exist, or + * EPERM if the operation is not permitted. In case of an error, the additional + * MCDI error argument field returns the raw error code from the underlying CAM + * driver. + */ +#define MC_CMD_TABLE_DELETE 0x1cf +#define MC_CMD_TABLE_DELETE_MSGSET 0x1cf +#undef MC_CMD_0x1cf_PRIVILEGE_CTG + +#define MC_CMD_0x1cf_PRIVILEGE_CTG SRIOV_CTG_GENERAL + +/* MC_CMD_TABLE_DELETE_IN msgrequest */ +#define MC_CMD_TABLE_DELETE_IN_LENMIN 16 +#define MC_CMD_TABLE_DELETE_IN_LENMAX 252 +#define MC_CMD_TABLE_DELETE_IN_LENMAX_MCDI2 1020 +#define MC_CMD_TABLE_DELETE_IN_LEN(num) (12+4*(num)) +#define MC_CMD_TABLE_DELETE_IN_DATA_NUM(len) (((len)-12)/4) +/* Table identifier. */ +#define MC_CMD_TABLE_DELETE_IN_TABLE_ID_OFST 0 +#define MC_CMD_TABLE_DELETE_IN_TABLE_ID_LEN 4 +/* Enum values, see field(s): */ +/* TABLE_ID */ +/* Width in bits of supplied key data (must match table properties). */ +#define MC_CMD_TABLE_DELETE_IN_KEY_WIDTH_OFST 4 +#define MC_CMD_TABLE_DELETE_IN_KEY_WIDTH_LEN 2 +/* Width in bits of supplied mask data (0 for direct/BCAM tables, or for STCAM + * when allocated MASK_ID is used instead). + */ +#define MC_CMD_TABLE_DELETE_IN_MASK_WIDTH_OFST 6 +#define MC_CMD_TABLE_DELETE_IN_MASK_WIDTH_LEN 2 +/* Width in bits of supplied response data (for INSERT and UPDATE operations + * this must match the table properties; for DELETE operations, no response + * data is required and this must be 0). + */ +#define MC_CMD_TABLE_DELETE_IN_RESP_WIDTH_OFST 8 +#define MC_CMD_TABLE_DELETE_IN_RESP_WIDTH_LEN 2 +/* Mask ID for STCAM table - used instead of mask data if the table descriptor + * reports ALLOC_MASKS==1. Otherwise set to 0. + */ +#define MC_CMD_TABLE_DELETE_IN_MASK_ID_OFST 6 +#define MC_CMD_TABLE_DELETE_IN_MASK_ID_LEN 2 +/* Priority for TCAM or STCAM, in range 0..N_PRIORITIES-1, otherwise 0. */ +#define MC_CMD_TABLE_DELETE_IN_PRIORITY_OFST 8 +#define MC_CMD_TABLE_DELETE_IN_PRIORITY_LEN 2 +/* (32-bit alignment padding - set to 0) */ +#define MC_CMD_TABLE_DELETE_IN_RESERVED_OFST 10 +#define MC_CMD_TABLE_DELETE_IN_RESERVED_LEN 2 +/* Sequence of key, mask (if MASK_WIDTH > 0), and response (if RESP_WIDTH > 0) + * data values. Each of these items is logically treated as a single wide N-bit + * value, in which the individual fields have been placed within that value per + * the LBN and WIDTH information from the table field descriptors. The wide + * N-bit value is padded with 0 bits at the MSB end if necessary to make a + * multiple of 32 bits. The value is then packed into this command as a + * sequence of 32-bit words, bits [31:0] first, then bits [63:32], etc. + */ +#define MC_CMD_TABLE_DELETE_IN_DATA_OFST 12 +#define MC_CMD_TABLE_DELETE_IN_DATA_LEN 4 +#define MC_CMD_TABLE_DELETE_IN_DATA_MINNUM 1 +#define MC_CMD_TABLE_DELETE_IN_DATA_MAXNUM 60 +#define MC_CMD_TABLE_DELETE_IN_DATA_MAXNUM_MCDI2 252 + +/* MC_CMD_TABLE_DELETE_OUT msgresponse */ +#define MC_CMD_TABLE_DELETE_OUT_LEN 0 + #endif /* _SIENA_MC_DRIVER_PCOL_H */