diff mbox series

doc: add outer UDP checksum limitations for mlx5

Message ID 20230710084908.3503447-1-dsosnowski@nvidia.com (mailing list archive)
State Accepted, archived
Delegated to: Raslan Darawsheh
Headers
Series doc: add outer UDP checksum limitations for mlx5 |

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Commit Message

Dariusz Sosnowski July 10, 2023, 8:49 a.m. UTC 
  Currently available NVIDIA NICs and DPUs
do not have a capability to calculate the UDP checksum
in the header added using encapsulation flow actions.

This limitation was not documented in mlx5 PMD docs.
This patch adds this limitation to the docs and
describes application requirements.

Signed-off-by: Dariusz Sosnowski <dsosnowski@nvidia.com>
Acked-by: Ori Kam <orika@nvidia.com>
---
 doc/guides/nics/mlx5.rst | 8 ++++++++
 1 file changed, 8 insertions(+)

Comments

Raslan Darawsheh July 19, 2023, 8:32 a.m. UTC | #1 
Hi,

> -----Original Message-----
> From: Dariusz Sosnowski <dsosnowski@nvidia.com>
> Sent: Monday, July 10, 2023 11:49 AM
> To: Matan Azrad <matan@nvidia.com>; Slava Ovsiienko
> <viacheslavo@nvidia.com>; Ori Kam <orika@nvidia.com>; Suanming Mou
> <suanmingm@nvidia.com>
> Cc: dev@dpdk.org
> Subject: [PATCH] doc: add outer UDP checksum limitations for mlx5
> 
> Currently available NVIDIA NICs and DPUs do not have a capability to calculate
> the UDP checksum in the header added using encapsulation flow actions.
> 
> This limitation was not documented in mlx5 PMD docs.
> This patch adds this limitation to the docs and describes application
> requirements.
> 
> Signed-off-by: Dariusz Sosnowski <dsosnowski@nvidia.com>
> Acked-by: Ori Kam <orika@nvidia.com>

Patch applied to next-net-mlx,

Kindest regards,
Raslan Darawsheh
diff mbox series

Patch

diff --git a/doc/guides/nics/mlx5.rst b/doc/guides/nics/mlx5.rst
index 505873ecfd..43aef669e6 100644
--- a/doc/guides/nics/mlx5.rst
+++ b/doc/guides/nics/mlx5.rst
@@ -480,6 +480,14 @@  Limitations
   - The input buffer, providing the removal size, is not validated.
   - The buffer size must match the length of the headers to be removed.
 
+- Outer UDP checksum calculation for encapsulation flow actions:
+
+  - Currently available NVIDIA NICs and DPUs do not have a capability to calculate
+    the UDP checksum in the header added using encapsulation flow actions.
+
+    Applications are required to use 0 in UDP checksum field in such flow actions.
+    Resulting packet will have outer UDP checksum equal to 0.
+
 - ICMP(code/type/identifier/sequence number) / ICMP6(code/type/identifier/sequence number) matching,
   IP-in-IP and MPLS flow matching are all mutually exclusive features which cannot be supported together
   (see :ref:`mlx5_firmware_config`).