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Tue, 22 Aug 2023 03:36:14 -0700 From: Michael Baum To: CC: Matan Azrad , Raslan Darawsheh , Viacheslav Ovsiienko , Ori Kam , Suanming Mou Subject: [PATCH 2/2] net/mlx5: add random item support Date: Tue, 22 Aug 2023 13:36:00 +0300 Message-ID: <20230822103600.3247680-3-michaelba@nvidia.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230822103600.3247680-1-michaelba@nvidia.com> References: <20230822103600.3247680-1-michaelba@nvidia.com> MIME-Version: 1.0 X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CY4PEPF0000EE33:EE_|MN2PR12MB4454:EE_ X-MS-Office365-Filtering-Correlation-Id: 2dfae625-7bd8-40fd-cbb0-08dba2fba478 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: JfB9Or8XHt+55vv+Jdv39oALkrudagALTLJ8Pwp9bCUyxSTdEgHAwb/xQP4mmp3XTSgYk5UbGf3zkusUMHUyh57NPcda5eFsRcoYysLqA1tivPdlScztqLGFKrfLah0l9oXimBEFRYrnCqnHrawWbav/f3M7pCY4bSt/2W3Rl8Uo8gqA/mu+GjgzdJA+YlG60vbkG5NNl4qI5dEQOWy3ugwN9cIFkaUMD58hnGGPJ93Zna6SpHCJO2tGKLXAkIT2Bv+K0bSuCqChoXVzqXsWaJGVMcnbw+x6Q7oi3aBOslaXikRbsqntYZVMkZ66VAT18iaypzpsluqzxQM6Pq32Q8TFgiArQ8ocn8MItMKlN7/mi3V872BcGQ7zIhbJe7hqgMck9rw8OWulv+fES1c8zbXTt5cYVRs/2AVEZrLlx5bq7taYy82tiZz+E3gIqzT2YNkLYCqffCzl4dZgP8AuPOglL3dVSGgP+mwBeXcQhVtTrVPR4o9B6T1LxLo5uHpNspdLepA/7Syp6yVdnLcro1za+yYQ4Bc51y/yQhk0hqzJKlNNEVkMtarG2lXJG4opQUxiSyIoAhQPJ6LiVYwPQc29z+pR+4hWlGTv124lVolZcB9FPd7J+ch4ZAj6mdyIEriy+X++vvJTfuF40KhAV5NU9J4TSd7jvUQqHwxo+CKTwaA86shpgHgl3B+E3Pcl1fhNUxCtJXI/HZHoA3BdY4emLWXRyfDBf8PprguCKL2hsCKqQ62pKB/UuY+OTYA5 X-Forefront-Antispam-Report: CIP:216.228.117.161; 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Signed-off-by: Michael Baum Acked-by: Ori Kam --- doc/guides/nics/features/mlx5.ini | 1 + doc/guides/nics/mlx5.rst | 10 +++++++++- doc/guides/rel_notes/release_23_11.rst | 4 ++++ drivers/net/mlx5/mlx5_flow_dv.c | 5 +++++ drivers/net/mlx5/mlx5_flow_hw.c | 5 +++++ 5 files changed, 24 insertions(+), 1 deletion(-) diff --git a/doc/guides/nics/features/mlx5.ini b/doc/guides/nics/features/mlx5.ini index c0e0b779cf..5606f435f2 100644 --- a/doc/guides/nics/features/mlx5.ini +++ b/doc/guides/nics/features/mlx5.ini @@ -86,6 +86,7 @@ nvgre = Y port_id = Y port_representor = Y quota = Y +random = Y tag = Y tcp = Y udp = Y diff --git a/doc/guides/nics/mlx5.rst b/doc/guides/nics/mlx5.rst index eac67a7864..f754fab3e1 100644 --- a/doc/guides/nics/mlx5.rst +++ b/doc/guides/nics/mlx5.rst @@ -165,7 +165,7 @@ Features - Sub-Function. - Matching on represented port. - Matching on aggregated affinity. - +- Matching on random value. Limitations ----------- @@ -554,6 +554,7 @@ Limitations - Modification of the MPLS header is supported only in HWS and only to copy from, the encapsulation level is always 0. - Modification of the 802.1Q Tag, VXLAN Network or GENEVE Network ID's is not supported. + - Modify field action using ``RTE_FLOW_FIELD_RANDOM`` is not supported. - Encapsulation levels are not supported, can modify outermost header fields only. - Offsets cannot skip past the boundary of a field. - If the field type is ``RTE_FLOW_FIELD_MAC_TYPE`` @@ -712,6 +713,13 @@ Limitations - The NIC egress flow rules on representor port are not supported. +- Match on random value: + + - Supported only with HW Steering enabled (``dv_flow_en`` = 2). + - Supported only in table with ``nb_flows=1``. + - NIC ingress flow in group 0 is not supported. + - Supports matching only 16 bits (LSB). + - During live migration to a new process set its flow engine as standby mode, the user should only program flow rules in group 0 (``fdb_def_rule_en=0``). Live migration is only supported under SWS (``dv_flow_en=1``). diff --git a/doc/guides/rel_notes/release_23_11.rst b/doc/guides/rel_notes/release_23_11.rst index 1e90bf83e7..8a4c04ed75 100644 --- a/doc/guides/rel_notes/release_23_11.rst +++ b/doc/guides/rel_notes/release_23_11.rst @@ -76,6 +76,10 @@ New Features Added ``RTE_FLOW_ITEM_RANDOM`` to match random value. +* **Updated NVIDIA mlx5 net driver.** + + * Added support for random value matching. + Removed Items ------------- diff --git a/drivers/net/mlx5/mlx5_flow_dv.c b/drivers/net/mlx5/mlx5_flow_dv.c index a8dd9920e6..1238d00073 100644 --- a/drivers/net/mlx5/mlx5_flow_dv.c +++ b/drivers/net/mlx5/mlx5_flow_dv.c @@ -5385,6 +5385,11 @@ flow_dv_validate_action_modify_field(struct rte_eth_dev *dev, RTE_FLOW_ERROR_TYPE_ACTION, action, "modifications of the MPLS header " "is not supported"); + if (dst_data->field == RTE_FLOW_FIELD_RANDOM || + src_data->field == RTE_FLOW_FIELD_RANDOM) + return rte_flow_error_set(error, ENOTSUP, + RTE_FLOW_ERROR_TYPE_ACTION, action, + "modifications of random value is not supported"); if (dst_data->field == RTE_FLOW_FIELD_MARK || src_data->field == RTE_FLOW_FIELD_MARK) if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY || diff --git a/drivers/net/mlx5/mlx5_flow_hw.c b/drivers/net/mlx5/mlx5_flow_hw.c index 5395969eb0..6fe6103a37 100644 --- a/drivers/net/mlx5/mlx5_flow_hw.c +++ b/drivers/net/mlx5/mlx5_flow_hw.c @@ -3893,6 +3893,10 @@ flow_hw_validate_action_modify_field(const struct rte_flow_action *action, return rte_flow_error_set(error, EINVAL, RTE_FLOW_ERROR_TYPE_ACTION, action, "modifying Geneve VNI is not supported"); + if (flow_hw_modify_field_is_used(action_conf, RTE_FLOW_FIELD_RANDOM)) + return rte_flow_error_set(error, EINVAL, + RTE_FLOW_ERROR_TYPE_ACTION, action, + "modifying random value is not supported"); /* Due to HW bug, tunnel MPLS header is read only. */ if (action_conf->dst.field == RTE_FLOW_FIELD_MPLS) return rte_flow_error_set(error, EINVAL, @@ -5375,6 +5379,7 @@ flow_hw_pattern_validate(struct rte_eth_dev *dev, case RTE_FLOW_ITEM_TYPE_ESP: case RTE_FLOW_ITEM_TYPE_FLEX: case RTE_FLOW_ITEM_TYPE_IB_BTH: + case RTE_FLOW_ITEM_TYPE_RANDOM: break; case RTE_FLOW_ITEM_TYPE_INTEGRITY: /*