From patchwork Tue Sep 12 10:00:38 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Qi Zhang X-Patchwork-Id: 131341 X-Patchwork-Delegate: qi.z.zhang@intel.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 7705B42575; Tue, 12 Sep 2023 03:40:54 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 3A370402DB; Tue, 12 Sep 2023 03:40:44 +0200 (CEST) Received: from mgamail.intel.com (mgamail.intel.com [134.134.136.65]) by mails.dpdk.org (Postfix) with ESMTP id 94C1E40293 for ; Tue, 12 Sep 2023 03:40:40 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1694482840; x=1726018840; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=ATB5MceJF0UcWpZPrSB/ZPsLo35NzcdRapn8pz1L42Y=; b=OLgejoy4kQLZ4ORLVRtJkSbHkYILJ4/jjhxbtznIfdbL+kOlKddJjSdH iGy8FSBhHK7/0cDbKR3FaUDNf/aclpAVhbd7vlVKZdMkcCbfv/u9WqCgF TBEKEUNy/FJLoYgt01LtUgKrkVQrk6PHYD2j+YQUtvikObfWCtQH1OpXU 95/Lgrvu2bGTD5wZr/o06u6csmOX3148S8sbJuSpzInI+GO1vRdyDRt0t pg9/VyuvSNS3RlB9JNuoeIhLlzrgC/nLWh4t+lLppHEjiD6t+X3cnxJlH VwTWNzHc+3l/ICtsXoptRQeC3vW+V0J+reYe86TY+Ks8gs4NRUTlRM6iH A==; X-IronPort-AV: E=McAfee;i="6600,9927,10830"; a="382063144" X-IronPort-AV: E=Sophos;i="6.02,244,1688454000"; d="scan'208";a="382063144" Received: from orsmga004.jf.intel.com ([10.7.209.38]) by orsmga103.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 11 Sep 2023 18:40:40 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10830"; a="867168267" X-IronPort-AV: E=Sophos;i="6.02,244,1688454000"; d="scan'208";a="867168267" Received: from dpdk-qzhan15-test02.sh.intel.com ([10.67.115.37]) by orsmga004.jf.intel.com with ESMTP; 11 Sep 2023 18:40:38 -0700 From: Qi Zhang To: qiming.yang@intel.com Cc: zhichaox.zeng@intel.com, dev@dpdk.org, Qi Zhang Subject: [PATCH v3 2/5] net/ice: refine flow engine disabling Date: Tue, 12 Sep 2023 06:00:38 -0400 Message-Id: <20230912100041.3697012-3-qi.z.zhang@intel.com> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20230912100041.3697012-1-qi.z.zhang@intel.com> References: <20230814202616.3346652-1-qi.z.zhang@intel.com> <20230912100041.3697012-1-qi.z.zhang@intel.com> MIME-Version: 1.0 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Only use "disable_engine_mask" for flow engine disabling In PF mode, only ACL engine will be disabled. In DCF mode, FDIR and HASH engine will be disabled. In DCF mode with "acl=off", ACL engine will also be disabled. Signed-off-by: Qi Zhang --- drivers/net/ice/ice_acl_filter.c | 3 --- drivers/net/ice/ice_dcf_parent.c | 3 +++ drivers/net/ice/ice_ethdev.c | 1 + drivers/net/ice/ice_fdir_filter.c | 3 --- drivers/net/ice/ice_hash.c | 3 --- 5 files changed, 4 insertions(+), 9 deletions(-) diff --git a/drivers/net/ice/ice_acl_filter.c b/drivers/net/ice/ice_acl_filter.c index f2ddbd7b9b..51f4feced4 100644 --- a/drivers/net/ice/ice_acl_filter.c +++ b/drivers/net/ice/ice_acl_filter.c @@ -995,9 +995,6 @@ ice_acl_init(struct ice_adapter *ad) struct ice_hw *hw = ICE_PF_TO_HW(pf); struct ice_flow_parser *parser = &ice_acl_parser; - if (!ad->hw.dcf_enabled) - return 0; - ret = ice_acl_prof_alloc(hw); if (ret) { PMD_DRV_LOG(ERR, "Cannot allocate memory for " diff --git a/drivers/net/ice/ice_dcf_parent.c b/drivers/net/ice/ice_dcf_parent.c index ad98a531de..0a20f6b4ca 100644 --- a/drivers/net/ice/ice_dcf_parent.c +++ b/drivers/net/ice/ice_dcf_parent.c @@ -475,6 +475,9 @@ ice_dcf_init_parent_adapter(struct rte_eth_dev *eth_dev) if (ice_devargs_check(eth_dev->device->devargs, ICE_DCF_DEVARG_ACL)) parent_adapter->disabled_engine_mask |= BIT(ICE_FLOW_ENGINE_ACL); + parent_adapter->disabled_engine_mask |= BIT(ICE_FLOW_ENGINE_FDIR); + parent_adapter->disabled_engine_mask |= BIT(ICE_FLOW_ENGINE_HASH); + err = ice_flow_init(parent_adapter); if (err) { PMD_INIT_LOG(ERR, "Failed to initialize flow"); diff --git a/drivers/net/ice/ice_ethdev.c b/drivers/net/ice/ice_ethdev.c index 036b068c22..f744bde8f4 100644 --- a/drivers/net/ice/ice_ethdev.c +++ b/drivers/net/ice/ice_ethdev.c @@ -2442,6 +2442,7 @@ ice_dev_init(struct rte_eth_dev *dev) } if (!ad->is_safe_mode) { + ad->disabled_engine_mask |= BIT(ICE_FLOW_ENGINE_ACL); ret = ice_flow_init(ad); if (ret) { PMD_INIT_LOG(ERR, "Failed to initialize flow"); diff --git a/drivers/net/ice/ice_fdir_filter.c b/drivers/net/ice/ice_fdir_filter.c index e9ee5a57d6..bc43883a92 100644 --- a/drivers/net/ice/ice_fdir_filter.c +++ b/drivers/net/ice/ice_fdir_filter.c @@ -1150,9 +1150,6 @@ ice_fdir_init(struct ice_adapter *ad) struct ice_flow_parser *parser; int ret; - if (ad->hw.dcf_enabled) - return 0; - ret = ice_fdir_setup(pf); if (ret) return ret; diff --git a/drivers/net/ice/ice_hash.c b/drivers/net/ice/ice_hash.c index e36e7da2b5..37bee808c6 100644 --- a/drivers/net/ice/ice_hash.c +++ b/drivers/net/ice/ice_hash.c @@ -591,9 +591,6 @@ ice_hash_init(struct ice_adapter *ad) { struct ice_flow_parser *parser = NULL; - if (ad->hw.dcf_enabled) - return 0; - parser = &ice_hash_parser; return ice_register_parser(parser, ad);