From patchwork Fri Sep 15 10:00:46 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Zhang, Yuying" X-Patchwork-Id: 131474 X-Patchwork-Delegate: ferruh.yigit@amd.com Return-Path: X-Original-To: patchwork@inbox.dpdk.org Delivered-To: patchwork@inbox.dpdk.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 16D1C425A3; Fri, 15 Sep 2023 11:03:17 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id C551640E7C; Fri, 15 Sep 2023 11:02:45 +0200 (CEST) Received: from mgamail.intel.com (mgamail.intel.com [192.55.52.120]) by mails.dpdk.org (Postfix) with ESMTP id 1670A40A71; Fri, 15 Sep 2023 11:02:43 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1694768564; x=1726304564; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=8MYoGPxd+kw5nNghlTl3WRiwXiRybRKIj03aPEizVFs=; b=UG3GrhGhMOW/twJ/7G0x5jys76KI4F8b/NtAAMwTHQb/h5M64b53pgmw DSJAM8/05qqrzMMe2l/svooCf9Xyy2ZF3bL8cE2OzEqzB7/cnb0fI70Q3 mgJY6+8nkNLnpAUtlN9FER6V2UZBglNua6z98nfVYzR4hNNaI4d4adOKH M4g1Gv3icLB2WSBApJd2yyhNnTAdARp52w2MoRAfIBOuHYRTmSlKiytvE RqiKoA13cSio1suJvg9PZFyY+KgkormqYQONGAJiRrbRJsmoYOehKNgYp HaEwevqQApBGFFOLKhlSHAdzpZ0fYmtYxl3p6uIXEOFQHL73pKK2YmWbq Q==; X-IronPort-AV: E=McAfee;i="6600,9927,10833"; a="378118058" X-IronPort-AV: E=Sophos;i="6.02,148,1688454000"; d="scan'208";a="378118058" Received: from orsmga004.jf.intel.com ([10.7.209.38]) by fmsmga104.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 15 Sep 2023 02:02:15 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10833"; a="868631040" X-IronPort-AV: E=Sophos;i="6.02,148,1688454000"; d="scan'208";a="868631040" Received: from dpdk-pengyuan-mev.sh.intel.com ([10.67.119.128]) by orsmga004.jf.intel.com with ESMTP; 15 Sep 2023 02:02:13 -0700 From: "Zhang, Yuying" To: yuying.zhang@intel.com, dev@dpdk.org, qi.z.zhang@intel.com, beilei.xing@intel.com, jingjing.wu@intel.com Cc: mingxia.liu@intel.com, stable@dpdk.org Subject: [PATCH v5 8/9] app/test-pmd: refine encap content Date: Fri, 15 Sep 2023 10:00:46 +0000 Message-Id: <20230915100047.90153-9-yuying.zhang@intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230915100047.90153-1-yuying.zhang@intel.com> References: <20230906093407.3635038-1-wenjing.qiao@intel.com> <20230915100047.90153-1-yuying.zhang@intel.com> MIME-Version: 1.0 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org From: Yuying Zhang Refine vxlan encap content of all protocol headers. Fixes: 1960be7d32f8 ("app/testpmd: add VXLAN encap/decap") Cc: stable@dpdk.org Signed-off-by: Yuying Zhang --- app/test-pmd/cmdline_flow.c | 12 ++++++++++-- 1 file changed, 10 insertions(+), 2 deletions(-) diff --git a/app/test-pmd/cmdline_flow.c b/app/test-pmd/cmdline_flow.c index 94827bcc4a..b6cc0d9620 100644 --- a/app/test-pmd/cmdline_flow.c +++ b/app/test-pmd/cmdline_flow.c @@ -8514,7 +8514,7 @@ parse_setup_vxlan_encap_data(struct action_vxlan_encap_data *action_vxlan_encap_ .type = RTE_FLOW_ITEM_TYPE_END, }, }, - .item_eth.hdr.ether_type = 0, + .item_eth.hdr.ether_type = rte_cpu_to_be_16(RTE_ETHER_TYPE_IPV4), .item_vlan = { .hdr.vlan_tci = vxlan_encap_conf.vlan_tci, .hdr.eth_proto = 0, @@ -8522,24 +8522,32 @@ parse_setup_vxlan_encap_data(struct action_vxlan_encap_data *action_vxlan_encap_ .item_ipv4.hdr = { .src_addr = vxlan_encap_conf.ipv4_src, .dst_addr = vxlan_encap_conf.ipv4_dst, + .version_ihl = RTE_IPV4_VHL_DEF, + .next_proto_id = IPPROTO_UDP, + .time_to_live = IPDEFTTL, + .hdr_checksum = rte_cpu_to_be_16(1), }, .item_udp.hdr = { .src_port = vxlan_encap_conf.udp_src, .dst_port = vxlan_encap_conf.udp_dst, + .dgram_cksum = RTE_BE16(0x01), }, - .item_vxlan.hdr.flags = 0, + .item_vxlan.hdr.flags = 0x08, }; memcpy(action_vxlan_encap_data->item_eth.hdr.dst_addr.addr_bytes, vxlan_encap_conf.eth_dst, RTE_ETHER_ADDR_LEN); memcpy(action_vxlan_encap_data->item_eth.hdr.src_addr.addr_bytes, vxlan_encap_conf.eth_src, RTE_ETHER_ADDR_LEN); if (!vxlan_encap_conf.select_ipv4) { + action_vxlan_encap_data->item_eth.type = RTE_BE16(RTE_ETHER_TYPE_IPV6); memcpy(&action_vxlan_encap_data->item_ipv6.hdr.src_addr, &vxlan_encap_conf.ipv6_src, sizeof(vxlan_encap_conf.ipv6_src)); memcpy(&action_vxlan_encap_data->item_ipv6.hdr.dst_addr, &vxlan_encap_conf.ipv6_dst, sizeof(vxlan_encap_conf.ipv6_dst)); + action_vxlan_encap_data->item_ipv6.hdr.proto = IPPROTO_UDP; + action_vxlan_encap_data->item_ipv6.hdr.hop_limits = IPDEFTTL; action_vxlan_encap_data->items[2] = (struct rte_flow_item){ .type = RTE_FLOW_ITEM_TYPE_IPV6, .spec = &action_vxlan_encap_data->item_ipv6,