net/mlx5/hws: remove csum check from L3 ok check
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Commit Message
From: Michael Baum <michaelba@nvidia.com>
This patch changes the integrity item behavior for HW steering.
Old behavior: the "ipv4_csum_ok" checks only IPv4 checksum and "l3_ok"
checks everything is ok including IPv4 checksum.
New behavior: the "l3_ok" checks everything is ok excluding IPv4
checksum.
This change enables matching "l3_ok" in IPv6 packets since for IPv6
packets "ipv4_csum_ok" is always miss.
For SW steering the old behavior is kept as same as for L4 ok.
Signed-off-by: Michael Baum <michaelba@nvidia.com>
---
doc/guides/nics/mlx5.rst | 11 ++++++++---
drivers/net/mlx5/hws/mlx5dr_definer.c | 6 ++----
2 files changed, 10 insertions(+), 7 deletions(-)
Comments
Hi Alex
> -----Original Message-----
> From: Alexander Kozyrev <akozyrev@nvidia.com>
> Sent: Wednesday, October 25, 2023 11:39 PM
>
> From: Michael Baum <michaelba@nvidia.com>
>
> This patch changes the integrity item behavior for HW steering.
>
> Old behavior: the "ipv4_csum_ok" checks only IPv4 checksum and "l3_ok"
> checks everything is ok including IPv4 checksum.
>
> New behavior: the "l3_ok" checks everything is ok excluding IPv4
> checksum.
>
> This change enables matching "l3_ok" in IPv6 packets since for IPv6
> packets "ipv4_csum_ok" is always miss.
> For SW steering the old behavior is kept as same as for L4 ok.
>
> Signed-off-by: Michael Baum <michaelba@nvidia.com>
> ---
Acked-by: Ori Kam <orika@nvidia.com>
Best,
Ori
Hi,
> -----Original Message-----
> From: Alexander Kozyrev <akozyrev@nvidia.com>
> Sent: Wednesday, October 25, 2023 11:39 PM
> To: dev@dpdk.org
> Cc: Ori Kam <orika@nvidia.com>; Matan Azrad <matan@nvidia.com>; Michael
> Baum <michaelba@nvidia.com>; Alex Vesker <valex@nvidia.com>; Suanming
> Mou <suanmingm@nvidia.com>; Slava Ovsiienko <viacheslavo@nvidia.com>;
> Erez Shitrit <erezsh@nvidia.com>
> Subject: [PATCH] net/mlx5/hws: remove csum check from L3 ok check
>
> From: Michael Baum <michaelba@nvidia.com>
>
> This patch changes the integrity item behavior for HW steering.
>
> Old behavior: the "ipv4_csum_ok" checks only IPv4 checksum and "l3_ok"
> checks everything is ok including IPv4 checksum.
>
> New behavior: the "l3_ok" checks everything is ok excluding IPv4 checksum.
>
> This change enables matching "l3_ok" in IPv6 packets since for IPv6 packets
> "ipv4_csum_ok" is always miss.
> For SW steering the old behavior is kept as same as for L4 ok.
>
> Signed-off-by: Michael Baum <michaelba@nvidia.com>
Patch applied to next-net-mlx,
Kindest regards,
Raslan Darawsheh
@@ -648,12 +648,13 @@ Limitations
- Integrity:
- - Integrity offload is enabled starting from **ConnectX-6 Dx**.
- Verification bits provided by the hardware are ``l3_ok``, ``ipv4_csum_ok``, ``l4_ok``, ``l4_csum_ok``.
- ``level`` value 0 references outer headers.
- Negative integrity item verification is not supported.
- - Multiple integrity items not supported in a single flow rule.
- - Flow rule items supplied by application must explicitly specify network headers referred by integrity item.
+ - With SW steering (``dv_flow_en=1``)
+ - Integrity offload is enabled starting from **ConnectX-6 Dx**.
+ - Multiple integrity items not supported in a single flow rule.
+ - Flow rule items supplied by application must explicitly specify network headers referred by integrity item.
For example, if integrity item mask sets ``l4_ok`` or ``l4_csum_ok`` bits, reference to L4 network header,
TCP or UDP, must be in the rule pattern as well::
@@ -661,6 +662,10 @@ Limitations
flow create 0 ingress pattern integrity level is 0 value mask l4_ok value spec l4_ok / eth / ipv4 proto is udp / end …
+ - With HW steering (``dv_flow_en=2``)
+ - The ``l3_ok`` field represents all L3 checks, but nothing about whether IPv4 checksum ok.
+ - The ``l4_ok`` field represents all L4 checks including L4 checksum ok.
+
- Connection tracking:
- Cannot co-exist with ASO meter, ASO age action in a single flow rule.
@@ -287,10 +287,8 @@ mlx5dr_definer_integrity_set(struct mlx5dr_definer_fc *fc,
uint32_t ok1_bits = 0;
if (v->l3_ok)
- ok1_bits |= inner ? BIT(MLX5DR_DEFINER_OKS1_SECOND_L3_OK) |
- BIT(MLX5DR_DEFINER_OKS1_SECOND_IPV4_CSUM_OK) :
- BIT(MLX5DR_DEFINER_OKS1_FIRST_L3_OK) |
- BIT(MLX5DR_DEFINER_OKS1_FIRST_IPV4_CSUM_OK);
+ ok1_bits |= inner ? BIT(MLX5DR_DEFINER_OKS1_SECOND_L3_OK) :
+ BIT(MLX5DR_DEFINER_OKS1_FIRST_L3_OK);
if (v->ipv4_csum_ok)
ok1_bits |= inner ? BIT(MLX5DR_DEFINER_OKS1_SECOND_IPV4_CSUM_OK) :