diff mbox series

[11/30] net/mlx5: fix query for NIC flow cap

Message ID 20231029163202.216450-11-getelson@nvidia.com (mailing list archive)
State Superseded, archived
Delegated to: Raslan Darawsheh
Headers
Series [01/30] net/mlx5/hws: Definer, add mlx5dr context to definer_conv_data |

Checks

Context Check Description
ci/checkpatch success coding style OK

Commit Message

Gregory Etelson Oct. 29, 2023, 4:31 p.m. UTC 
  From: Ori Kam <orika@nvidia.com>

Add query for nic flow table support bit.

Fixes: 5f44fb1958e5 ("common/mlx5: query capability of registers")
Cc: bingz@nvidia.com

Signed-off-by: Ori Kam <orika@nvidia.com>
---
 drivers/common/mlx5/mlx5_devx_cmds.c | 1 +
 1 file changed, 1 insertion(+)
diff mbox series

Patch

diff --git a/drivers/common/mlx5/mlx5_devx_cmds.c b/drivers/common/mlx5/mlx5_devx_cmds.c
index ff2d6d10b7..3afb2e9f80 100644
--- a/drivers/common/mlx5/mlx5_devx_cmds.c
+++ b/drivers/common/mlx5/mlx5_devx_cmds.c
@@ -1082,6 +1082,7 @@  mlx5_devx_cmd_query_hca_attr(void *ctx,
 	attr->striding_rq = MLX5_GET(cmd_hca_cap, hcattr, striding_rq);
 	attr->ext_stride_num_range =
 		MLX5_GET(cmd_hca_cap, hcattr, ext_stride_num_range);
+	attr->nic_flow_table = MLX5_GET(cmd_hca_cap, hcattr, nic_flow_table);
 	attr->max_flow_counter_15_0 = MLX5_GET(cmd_hca_cap, hcattr,
 			max_flow_counter_15_0);
 	attr->max_flow_counter_31_16 = MLX5_GET(cmd_hca_cap, hcattr,